JP2020501474A - 電圧クランプ回路 - Google Patents

電圧クランプ回路 Download PDF

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Publication number
JP2020501474A
JP2020501474A JP2019551241A JP2019551241A JP2020501474A JP 2020501474 A JP2020501474 A JP 2020501474A JP 2019551241 A JP2019551241 A JP 2019551241A JP 2019551241 A JP2019551241 A JP 2019551241A JP 2020501474 A JP2020501474 A JP 2020501474A
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JP
Japan
Prior art keywords
voltage
input
comparator
clamping
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2019551241A
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English (en)
Japanese (ja)
Other versions
JP2020501474A5 (enExample
Inventor
シェ ティエンリン
シェ ティエンリン
Original Assignee
日本テキサス・インスツルメンツ合同会社
テキサス インスツルメンツ インコーポレイテッド
テキサス インスツルメンツ インコーポレイテッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本テキサス・インスツルメンツ合同会社, テキサス インスツルメンツ インコーポレイテッド, テキサス インスツルメンツ インコーポレイテッド filed Critical 日本テキサス・インスツルメンツ合同会社
Publication of JP2020501474A publication Critical patent/JP2020501474A/ja
Publication of JP2020501474A5 publication Critical patent/JP2020501474A5/ja
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01—Shaping pulses
    • H03K5/08—Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
    • H03K5/24—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
    • H03K5/2472—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
    • H03M1/129—Means for adapting the input signal to the range the converter can handle, e.g. limiting, pre-scaling ; Out-of-range indication
    • H03M1/1295—Clamping, i.e. adjusting the DC level of the input signal to a predetermined value

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Manipulation Of Pulses (AREA)
  • Logic Circuits (AREA)
  • Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
  • Analogue/Digital Conversion (AREA)
JP2019551241A 2016-12-05 2017-12-04 電圧クランプ回路 Pending JP2020501474A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US15/369,225 US9793882B1 (en) 2016-12-05 2016-12-05 Voltage clamp circuit
US15/369,225 2016-12-05
PCT/US2017/064528 WO2018106600A1 (en) 2016-12-05 2017-12-04 Voltage clamp circuit

Publications (2)

Publication Number Publication Date
JP2020501474A true JP2020501474A (ja) 2020-01-16
JP2020501474A5 JP2020501474A5 (enExample) 2021-01-21

Family

ID=60021800

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2019551241A Pending JP2020501474A (ja) 2016-12-05 2017-12-04 電圧クランプ回路

Country Status (5)

Country Link
US (1) US9793882B1 (enExample)
EP (1) EP3548982B1 (enExample)
JP (1) JP2020501474A (enExample)
CN (1) CN109923493A (enExample)
WO (1) WO2018106600A1 (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10622980B1 (en) 2018-11-09 2020-04-14 Analog Devices, Inc. Apparatus and methods for setting and clamping a node voltage
CN111162786B (zh) * 2020-01-20 2022-03-29 电子科技大学 一种消除回踢噪声的比较器
CN116318080A (zh) * 2021-12-13 2023-06-23 圣邦微电子(苏州)有限责任公司 比较器电路

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49121458A (enExample) * 1973-03-19 1974-11-20
US5528190A (en) * 1994-10-03 1996-06-18 Delco Electronics Corporation CMOS input voltage clamp
JPH11150469A (ja) * 1997-09-11 1999-06-02 Mitsubishi Electric Corp 半導体集積回路
JP2002237742A (ja) * 2001-02-07 2002-08-23 Toshiba Microelectronics Corp 半導体集積回路
JP2003124811A (ja) * 2001-10-15 2003-04-25 Denso Corp クランプ回路
US20030090309A1 (en) * 2001-11-09 2003-05-15 Hunt Ken S. Voltage clamp circuit
JP2003258581A (ja) * 2002-02-26 2003-09-12 Denso Corp クランプ回路
JP2013187755A (ja) * 2012-03-08 2013-09-19 Azbil Corp レベル制限回路

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SU1027814A2 (ru) * 1982-02-11 1983-07-07 Предприятие П/Я М-5619 Аналого-цифровой преобразователь
US4445160A (en) * 1982-03-30 1984-04-24 Westinghouse Electric Corp. Fault-powered low-level voltage clamp circuit
US4751405A (en) * 1985-08-26 1988-06-14 Gould Inc. Externally programmable, process and temperature insensitive threshold receiver circuit
US5070259A (en) * 1989-12-26 1991-12-03 Linear Technology Corporation Constant current, highspeed, auto-zeroed, CMOS comparator
JP3058699B2 (ja) * 1990-02-16 2000-07-04 テキサス インスツルメンツ インコーポレイテツド 誘導性負荷中の電流制御のための負電圧クランプ回路
US5329252A (en) * 1992-11-05 1994-07-12 Northern Telecom Limited Slew-rate limited voltage controlled oscillator control voltage clamp circuit
JP3864864B2 (ja) * 2002-07-11 2007-01-10 株式会社デンソー クランプ回路
RU162000U1 (ru) * 2016-01-11 2016-05-20 федеральное государственное бюджетное образовательное учреждение высшего образования "Ставропольский государственный аграрный университет" Стабилизатор постоянного напряжения

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49121458A (enExample) * 1973-03-19 1974-11-20
US5528190A (en) * 1994-10-03 1996-06-18 Delco Electronics Corporation CMOS input voltage clamp
JPH11150469A (ja) * 1997-09-11 1999-06-02 Mitsubishi Electric Corp 半導体集積回路
JP2002237742A (ja) * 2001-02-07 2002-08-23 Toshiba Microelectronics Corp 半導体集積回路
JP2003124811A (ja) * 2001-10-15 2003-04-25 Denso Corp クランプ回路
US20030090309A1 (en) * 2001-11-09 2003-05-15 Hunt Ken S. Voltage clamp circuit
JP2003258581A (ja) * 2002-02-26 2003-09-12 Denso Corp クランプ回路
JP2013187755A (ja) * 2012-03-08 2013-09-19 Azbil Corp レベル制限回路

Also Published As

Publication number Publication date
EP3548982B1 (en) 2025-06-11
EP3548982A4 (en) 2019-12-25
US9793882B1 (en) 2017-10-17
EP3548982A1 (en) 2019-10-09
CN109923493A (zh) 2019-06-21
WO2018106600A1 (en) 2018-06-14

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