JP2019527477A - ドナー基材を再生するための方法 - Google Patents

ドナー基材を再生するための方法 Download PDF

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Publication number
JP2019527477A
JP2019527477A JP2019501489A JP2019501489A JP2019527477A JP 2019527477 A JP2019527477 A JP 2019527477A JP 2019501489 A JP2019501489 A JP 2019501489A JP 2019501489 A JP2019501489 A JP 2019501489A JP 2019527477 A JP2019527477 A JP 2019527477A
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Prior art keywords
substrate
donor substrate
donor
gan
backing
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Pending
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JP2019501489A
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English (en)
Japanese (ja)
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JP2019527477A5 (enExample
Inventor
ヘンリー，フランソワ・ジェイ
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キューエムエイティ・インコーポレーテッド
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Priority claimed from US15/643,370 external-priority patent/US20180019169A1/en
Priority claimed from US15/643,384 external-priority patent/US20180033609A1/en
Application filed by キューエムエイティ・インコーポレーテッド filed Critical キューエムエイティ・インコーポレーテッド
Priority claimed from PCT/IB2017/054209 external-priority patent/WO2018011731A1/en
Publication of JP2019527477A publication Critical patent/JP2019527477A/ja
Publication of JP2019527477A5 publication Critical patent/JP2019527477A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02032—Preparing bulk and homogeneous wafers by reclaiming or re-processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
    • H10H20/018—Bonding of wafers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/0254—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/02546—Arsenides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
    • H10H20/013—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Recrystallisation Techniques (AREA)
  • Led Devices (AREA)
JP2019501489A 2016-07-12 2017-07-12 ドナー基材を再生するための方法 Pending JP2019527477A (ja)

Applications Claiming Priority (9)

Application Number Priority Date Filing Date Title
US201662361468P 2016-07-12 2016-07-12
US62/361,468 2016-07-12
US201662367911P 2016-07-28 2016-07-28
US62/367,911 2016-07-28
US15/643,370 US20180019169A1 (en) 2016-07-12 2017-07-06 Backing substrate stabilizing donor substrate for implant or reclamation
US15/643,370 2017-07-06
US15/643,384 2017-07-06
US15/643,384 US20180033609A1 (en) 2016-07-28 2017-07-06 Removal of non-cleaved/non-transferred material from donor substrate
PCT/IB2017/054209 WO2018011731A1 (en) 2016-07-12 2017-07-12 Method of a donor substrate undergoing reclamation

Publications (2)

Publication Number Publication Date
JP2019527477A true JP2019527477A (ja) 2019-09-26
JP2019527477A5 JP2019527477A5 (enExample) 2020-08-20

Family

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Family Applications (1)

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JP2019501489A Pending JP2019527477A (ja) 2016-07-12 2017-07-12 ドナー基材を再生するための方法

Country Status (4)

Country Link
EP (1) EP3485505A1 (enExample)
JP (1) JP2019527477A (enExample)
KR (1) KR20190027821A (enExample)
CN (1) CN109478493A (enExample)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6915191B1 (ja) * 2021-01-21 2021-08-04 信越エンジニアリング株式会社 ワーク分離装置及びワーク分離方法
WO2022168217A1 (ja) * 2021-02-04 2022-08-11 三菱電機株式会社 半導体基板の製造方法および半導体装置の製造方法
WO2022185906A1 (ja) * 2021-03-04 2022-09-09 信越半導体株式会社 紫外線発光素子用エピタキシャルウェーハの製造方法、紫外線発光素子用基板の製造方法、紫外線発光素子用エピタキシャルウェーハ及び紫外線発光素子用基板
JP2024506797A (ja) * 2021-02-23 2024-02-15 ソイテック 剥離によって層が除去されたドナー基板の残留物を調製するための方法

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110190163B (zh) * 2019-05-24 2020-04-28 康佳集团股份有限公司 图形化衬底、外延片、制作方法、存储介质及led芯片

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003224042A (ja) * 2001-12-21 2003-08-08 Soi Tec Silicon On Insulator Technologies 半導体薄層の移し換え方法とそれに使用するドナーウエハの製造方法
JP2007116161A (ja) * 2005-10-18 2007-05-10 Soi Tec Silicon On Insulator Technologies エピタキシ済みドナー・ウェファをリサイクルする方法
WO2009031270A1 (ja) * 2007-09-03 2009-03-12 Panasonic Corporation ウエハ再生方法およびウエハ再生装置
JP2010087492A (ja) * 2008-09-05 2010-04-15 Semiconductor Energy Lab Co Ltd Ｓｏｉ基板の作製方法
US20100127353A1 (en) * 2008-11-26 2010-05-27 S.O.I.Tec Silicon On Insulator Technologies, S.A. Strain engineered composite semiconductor substrates and methods of forming same
JP2014157979A (ja) * 2013-02-18 2014-08-28 Sumitomo Electric Ind Ltd Ｉｉｉ族窒化物複合基板およびその製造方法、積層ｉｉｉ族窒化物複合基板、ならびにｉｉｉ族窒化物半導体デバイスおよびその製造方法
WO2016007582A1 (en) * 2014-07-11 2016-01-14 Gtat Corporation Support substrate for ion beam exfoliation of a crystalline lamina

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003224042A (ja) * 2001-12-21 2003-08-08 Soi Tec Silicon On Insulator Technologies 半導体薄層の移し換え方法とそれに使用するドナーウエハの製造方法
JP2007116161A (ja) * 2005-10-18 2007-05-10 Soi Tec Silicon On Insulator Technologies エピタキシ済みドナー・ウェファをリサイクルする方法
WO2009031270A1 (ja) * 2007-09-03 2009-03-12 Panasonic Corporation ウエハ再生方法およびウエハ再生装置
JP2010087492A (ja) * 2008-09-05 2010-04-15 Semiconductor Energy Lab Co Ltd Ｓｏｉ基板の作製方法
US20100127353A1 (en) * 2008-11-26 2010-05-27 S.O.I.Tec Silicon On Insulator Technologies, S.A. Strain engineered composite semiconductor substrates and methods of forming same
JP2014157979A (ja) * 2013-02-18 2014-08-28 Sumitomo Electric Ind Ltd Ｉｉｉ族窒化物複合基板およびその製造方法、積層ｉｉｉ族窒化物複合基板、ならびにｉｉｉ族窒化物半導体デバイスおよびその製造方法
WO2016007582A1 (en) * 2014-07-11 2016-01-14 Gtat Corporation Support substrate for ion beam exfoliation of a crystalline lamina

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6915191B1 (ja) * 2021-01-21 2021-08-04 信越エンジニアリング株式会社 ワーク分離装置及びワーク分離方法
WO2022168217A1 (ja) * 2021-02-04 2022-08-11 三菱電機株式会社 半導体基板の製造方法および半導体装置の製造方法
JPWO2022168217A1 (enExample) * 2021-02-04 2022-08-11
JP7475503B2 (ja) 2021-02-04 2024-04-26 三菱電機株式会社 半導体基板の製造方法および半導体装置の製造方法
JP2024506797A (ja) * 2021-02-23 2024-02-15 ソイテック 剥離によって層が除去されたドナー基板の残留物を調製するための方法
WO2022185906A1 (ja) * 2021-03-04 2022-09-09 信越半導体株式会社 紫外線発光素子用エピタキシャルウェーハの製造方法、紫外線発光素子用基板の製造方法、紫外線発光素子用エピタキシャルウェーハ及び紫外線発光素子用基板
JP2022134799A (ja) * 2021-03-04 2022-09-15 信越半導体株式会社 紫外線発光素子用エピタキシャルウェーハの製造方法、紫外線発光素子用基板の製造方法、紫外線発光素子用エピタキシャルウェーハ及び紫外線発光素子用基板
JP7484773B2 (ja) 2021-03-04 2024-05-16 信越半導体株式会社 紫外線発光素子用エピタキシャルウェーハの製造方法、紫外線発光素子用基板の製造方法及び紫外線発光素子用エピタキシャルウェーハ

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KR20190027821A (ko) 2019-03-15
EP3485505A1 (en) 2019-05-22
CN109478493A (zh) 2019-03-15

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