JP2019514207A - 導電めっきのためのレーザシーディング - Google Patents
導電めっきのためのレーザシーディング Download PDFInfo
- Publication number
- JP2019514207A JP2019514207A JP2018551419A JP2018551419A JP2019514207A JP 2019514207 A JP2019514207 A JP 2019514207A JP 2018551419 A JP2018551419 A JP 2018551419A JP 2018551419 A JP2018551419 A JP 2018551419A JP 2019514207 A JP2019514207 A JP 2019514207A
- Authority
- JP
- Japan
- Prior art keywords
- workpiece
- substrate
- laser
- features
- donor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/15—Ceramic or glass substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4857—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/486—Via connections through the substrate with or without pins
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/142—Metallic substrates having insulating layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/145—Organic substrates, e.g. plastic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/147—Semiconductor insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/04—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
- H05K3/046—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by selective transfer or selective detachment of a conductive layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
- H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
- H05K3/182—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method
- H05K3/185—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method by making a catalytic pattern by photo-imaging
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73267—Layer and HDI connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92244—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/05—Patterning and lithography; Masks; Details of resist
- H05K2203/0502—Patterning and lithography
- H05K2203/0528—Patterning during transfer, i.e. without preformed pattern, e.g. by using a die, a programmed tool or a laser
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/10—Using electric, magnetic and electromagnetic fields; Using laser light
- H05K2203/107—Using laser light
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- High Energy & Nuclear Physics (AREA)
- Electromagnetism (AREA)
- Optics & Photonics (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Laser Beam Processing (AREA)
- Chemically Coating (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2022164917A JP2023011656A (ja) | 2016-03-31 | 2022-10-13 | 導電めっきのためのレーザシーディング |
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201662315913P | 2016-03-31 | 2016-03-31 | |
| US62/315,913 | 2016-03-31 | ||
| US201662407848P | 2016-10-13 | 2016-10-13 | |
| US62/407,848 | 2016-10-13 | ||
| PCT/US2017/025392 WO2017173281A1 (en) | 2016-03-31 | 2017-03-31 | Laser-seeding for electro-conductive plating |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2022164917A Division JP2023011656A (ja) | 2016-03-31 | 2022-10-13 | 導電めっきのためのレーザシーディング |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2019514207A true JP2019514207A (ja) | 2019-05-30 |
| JP2019514207A5 JP2019514207A5 (enExample) | 2020-04-30 |
Family
ID=59966483
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2018551419A Ceased JP2019514207A (ja) | 2016-03-31 | 2017-03-31 | 導電めっきのためのレーザシーディング |
| JP2022164917A Pending JP2023011656A (ja) | 2016-03-31 | 2022-10-13 | 導電めっきのためのレーザシーディング |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2022164917A Pending JP2023011656A (ja) | 2016-03-31 | 2022-10-13 | 導電めっきのためのレーザシーディング |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US10957615B2 (enExample) |
| EP (1) | EP3437127A4 (enExample) |
| JP (2) | JP2019514207A (enExample) |
| KR (1) | KR102437034B1 (enExample) |
| CN (1) | CN108604575B (enExample) |
| TW (2) | TW202224211A (enExample) |
| WO (1) | WO2017173281A1 (enExample) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2022115801A (ja) * | 2020-12-17 | 2022-08-09 | フィジカルニ ウースタヴ アーヴェー チェーエル ヴェーヴェーイー | ナノマテリアル構造体を製造する方法およびデバイス |
| JP2022548474A (ja) * | 2019-09-18 | 2022-11-21 | インテル・コーポレーション | パターニングを含むガラス誘電体層 |
Families Citing this family (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102018207181B4 (de) * | 2018-05-08 | 2023-06-29 | Hegla Boraident Gmbh & Co. Kg | Verfahren zum Markieren von Glastafeln, vorzugsweise von Einscheiben-Sicherheitsglastafeln |
| KR102391800B1 (ko) * | 2018-06-15 | 2022-04-29 | 주식회사 엘지화학 | 비정질 박막의 제조방법 |
| US11167375B2 (en) | 2018-08-10 | 2021-11-09 | The Research Foundation For The State University Of New York | Additive manufacturing processes and additively manufactured products |
| DE102019133955B4 (de) * | 2019-12-11 | 2021-08-19 | Lpkf Laser & Electronics Aktiengesellschaft | Verfahren zur Herstellung einer Verbundstruktur aus mindestens einer leitfähigen Struktur |
| WO2021217056A1 (en) * | 2020-04-23 | 2021-10-28 | Akash Systems, Inc. | High-efficiency structures for improved wireless communications |
| JP2024510548A (ja) * | 2021-02-11 | 2024-03-08 | アイオー テック グループ リミテッド | レーザシステムによるプリント基板製造法 |
| US11877398B2 (en) * | 2021-02-11 | 2024-01-16 | Io Tech Group Ltd. | PCB production by laser systems |
| US20220266382A1 (en) * | 2021-02-25 | 2022-08-25 | Electro Scientific Industries, Inc. | Laser-seeding for electro-conductive plating |
| US11705365B2 (en) * | 2021-05-18 | 2023-07-18 | Applied Materials, Inc. | Methods of micro-via formation for advanced packaging |
| US20220399206A1 (en) * | 2021-06-11 | 2022-12-15 | V-Finity Inc. | Method for building conductive through-hole vias in glass substrates |
| US20220406725A1 (en) * | 2021-06-17 | 2022-12-22 | Intel Corporation | Glass package core with planar structures |
| CN113410339B (zh) * | 2021-06-18 | 2023-08-15 | 中科检测技术服务(重庆)有限公司 | 一种高稳定性纳米铜导电薄膜的制备及其应用 |
| EP4120023A1 (en) | 2021-07-15 | 2023-01-18 | Wuhan Dr Laser Technology Corp., Ltd. | Pattern transfer sheet, method of monitoring pattern transfer printing, and pattern transfer printing system |
| IL297544A (en) | 2021-10-22 | 2023-05-01 | Wuhan Dr Laser Tech Corp Ltd | Sheets and methods for transferring a pattern with a release layer and/or paste mixtures |
| IL289428B2 (en) * | 2021-12-27 | 2025-10-01 | Wuhan Dr Laser Tech Corp Ltd | Transfer printing of multi-layered details |
| EP4201574A1 (en) * | 2021-12-27 | 2023-06-28 | Wuhan Dr Laser Technology Corp., Ltd. | Pattern transfer printing of multi-layered features |
| US12349497B2 (en) * | 2021-12-27 | 2025-07-01 | Wuhan Dr Laser Technology Corp,. Ltd | Pattern transfer printing of multi-layered features |
| TWI846031B (zh) * | 2022-08-25 | 2024-06-21 | 華龍國際科技股份有限公司 | 可吸收電路板變形量的均熱片及形成該均熱片的製造方法 |
| KR20240031738A (ko) * | 2022-09-01 | 2024-03-08 | 주식회사 익스톨 | 관통 비아 금속 배선 형성방법 |
| US20240312888A1 (en) * | 2023-03-14 | 2024-09-19 | Intel Corporation | Via structures in bonded glass substrates |
| US20240332155A1 (en) * | 2023-03-31 | 2024-10-03 | Intel Corporation | Substrates with a glass core and glass buildup layers |
| EP4537935A1 (en) * | 2023-10-10 | 2025-04-16 | Johnson Matthey Public Limited Company | Method of coating a catalyst on flat or textured substrates |
Citations (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001102724A (ja) * | 1999-09-30 | 2001-04-13 | Ngk Spark Plug Co Ltd | 配線基板の製造方法 |
| JP2005079245A (ja) * | 2003-08-29 | 2005-03-24 | Institute Of Physical & Chemical Research | 金属配線形成方法および金属配線形成装置 |
| WO2006100790A1 (ja) * | 2005-03-22 | 2006-09-28 | Cluster Technology Co., Ltd. | 配線基板の製造方法及び配線基板 |
| US20080026543A1 (en) * | 2006-07-28 | 2008-01-31 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing semiconductor device |
| JP2010533977A (ja) * | 2007-07-17 | 2010-10-28 | スリーエム イノベイティブ プロパティズ カンパニー | 基材のパターニング方法 |
| JP2011503348A (ja) * | 2007-10-23 | 2011-01-27 | イー・アイ・デュポン・ドウ・ヌムール・アンド・カンパニー | 組成物および高い伝導性を有するパターニングされた金属層の提供方法 |
| US20110298135A1 (en) * | 2007-10-24 | 2011-12-08 | Charan Gurumurthy | Integrated circuit and process for fabricating thereof |
| JP2014165263A (ja) * | 2013-02-22 | 2014-09-08 | Seiren Co Ltd | 透明電極材の製造方法 |
| JP2015138921A (ja) * | 2014-01-24 | 2015-07-30 | 日本ゼオン株式会社 | 電子材料用基板 |
| JP2015144252A (ja) * | 2013-12-15 | 2015-08-06 | オーボテック リミテッド | プリント回路配線の修復 |
| JP2016039239A (ja) * | 2014-08-07 | 2016-03-22 | 株式会社 M&M研究所 | 配線基板の製造方法、配線基板及び配線基板製造用の分散液 |
Family Cites Families (32)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5266446A (en) * | 1990-11-15 | 1993-11-30 | International Business Machines Corporation | Method of making a multilayer thin film structure |
| US6815015B2 (en) | 1999-01-27 | 2004-11-09 | The United States Of America As Represented By The Secretary Of The Navy | Jetting behavior in the laser forward transfer of rheological systems |
| US6805918B2 (en) * | 1999-01-27 | 2004-10-19 | The United States Of America As Represented By The Secretary Of The Navy | Laser forward transfer of rheological systems |
| TWI224382B (en) * | 2001-07-12 | 2004-11-21 | Hitachi Ltd | Wiring glass substrate and manufacturing method thereof, conductive paste and semiconductor module used for the same, and conductor forming method |
| US20040197541A1 (en) * | 2001-08-02 | 2004-10-07 | Joseph Zahka | Selective electroless deposition and interconnects made therefrom |
| GB2381274A (en) * | 2001-10-29 | 2003-04-30 | Qinetiq Ltd | High resolution patterning method |
| CN1195397C (zh) * | 2002-06-06 | 2005-03-30 | 华中科技大学 | 一种电路板制作和修复方法 |
| JP4031704B2 (ja) * | 2002-12-18 | 2008-01-09 | 東京エレクトロン株式会社 | 成膜方法 |
| JP2007525011A (ja) * | 2003-06-26 | 2007-08-30 | イー・アイ・デュポン・ドウ・ヌムール・アンド・カンパニー | 基材上に充填誘電体材料のパターンを形成するための方法 |
| US7358169B2 (en) * | 2005-04-13 | 2008-04-15 | Hewlett-Packard Development Company, L.P. | Laser-assisted deposition |
| CN101121575B (zh) | 2007-07-06 | 2010-11-03 | 中国科学院上海光学精密机械研究所 | 利用飞秒激光实现玻璃表面选择性金属化的方法 |
| JP4682285B2 (ja) * | 2007-08-30 | 2011-05-11 | 日立電線株式会社 | 配線及び層間接続ビアの形成方法 |
| US8728589B2 (en) * | 2007-09-14 | 2014-05-20 | Photon Dynamics, Inc. | Laser decal transfer of electronic materials |
| US8017022B2 (en) * | 2007-12-28 | 2011-09-13 | Intel Corporation | Selective electroless plating for electronic substrates |
| JP5238544B2 (ja) * | 2008-03-07 | 2013-07-17 | 株式会社半導体エネルギー研究所 | 成膜方法及び発光装置の作製方法 |
| EP2197253A1 (en) * | 2008-12-12 | 2010-06-16 | Nederlandse Organisatie voor toegepast-natuurwetenschappelijk Onderzoek TNO | Method for electric circuit deposition |
| WO2011011764A2 (en) * | 2009-07-23 | 2011-01-27 | Gigasi Solar, Inc. | Systems, methods and materials involving crystallization of substrates using a seed layer, as well as products produced by such processes |
| JP2011129345A (ja) * | 2009-12-17 | 2011-06-30 | Fujifilm Corp | 光熱変換シート、並びに、それを用いた有機電界発光素材シート、及び有機電界発光装置の製造方法 |
| JP2011178642A (ja) * | 2010-03-03 | 2011-09-15 | Nippon Sheet Glass Co Ltd | 貫通電極付きガラス板の製造方法および電子部品 |
| FR2957916B1 (fr) | 2010-03-29 | 2018-02-09 | Universite Des Sciences Et Technologies De Lille | Procede de metallisation selective d'un monolithe de verre a base de silice, et produit obtenu par ce procede |
| TW201205761A (en) | 2010-05-17 | 2012-02-01 | Tno | Through silicon via treatment device and method arranged for treatment of TSVs in a chip manufacturing process |
| US8552564B2 (en) * | 2010-12-09 | 2013-10-08 | Intel Corporation | Hybrid-core through holes and vias |
| EP2660352A1 (en) | 2012-05-02 | 2013-11-06 | Nederlandse Organisatie voor toegepast -natuurwetenschappelijk onderzoek TNO | Donor sheet and method for light induced forward transfer manufacturing |
| US9526184B2 (en) * | 2012-06-29 | 2016-12-20 | Viasystems, Inc. | Circuit board multi-functional hole system and method |
| EP2685515A1 (en) * | 2012-07-12 | 2014-01-15 | Nederlandse Organisatie voor toegepast -natuurwetenschappelijk onderzoek TNO | Method and system for dividing a barrier foil |
| US10023955B2 (en) * | 2012-08-31 | 2018-07-17 | Fei Company | Seed layer laser-induced deposition |
| US9130016B2 (en) * | 2013-04-15 | 2015-09-08 | Schott Corporation | Method of manufacturing through-glass vias |
| EP2824699A1 (en) | 2013-07-08 | 2015-01-14 | Nederlandse Organisatie voor toegepast -natuurwetenschappelijk onderzoek TNO | Providing a chip die with electrically conductive elements |
| US10629442B2 (en) * | 2013-10-14 | 2020-04-21 | Orbotech Ltd. | Lift printing of multi-composition material structures |
| US9646854B2 (en) * | 2014-03-28 | 2017-05-09 | Intel Corporation | Embedded circuit patterning feature selective electroless copper plating |
| US20150309600A1 (en) * | 2014-04-23 | 2015-10-29 | Uni-Pixel Displays, Inc. | Method of fabricating a conductive pattern with high optical transmission, low reflectance, and low visibility |
| JP2017528902A (ja) * | 2014-05-27 | 2017-09-28 | オーボテック リミテッド | レーザ誘起前方転写法による3d構造印刷 |
-
2017
- 2017-03-31 JP JP2018551419A patent/JP2019514207A/ja not_active Ceased
- 2017-03-31 KR KR1020187030972A patent/KR102437034B1/ko active Active
- 2017-03-31 WO PCT/US2017/025392 patent/WO2017173281A1/en not_active Ceased
- 2017-03-31 TW TW111105458A patent/TW202224211A/zh unknown
- 2017-03-31 CN CN201780011096.3A patent/CN108604575B/zh not_active Expired - Fee Related
- 2017-03-31 US US16/067,693 patent/US10957615B2/en not_active Expired - Fee Related
- 2017-03-31 EP EP17776782.9A patent/EP3437127A4/en not_active Withdrawn
- 2017-03-31 TW TW106111099A patent/TWI757279B/zh not_active IP Right Cessation
-
2022
- 2022-10-13 JP JP2022164917A patent/JP2023011656A/ja active Pending
Patent Citations (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001102724A (ja) * | 1999-09-30 | 2001-04-13 | Ngk Spark Plug Co Ltd | 配線基板の製造方法 |
| JP2005079245A (ja) * | 2003-08-29 | 2005-03-24 | Institute Of Physical & Chemical Research | 金属配線形成方法および金属配線形成装置 |
| WO2006100790A1 (ja) * | 2005-03-22 | 2006-09-28 | Cluster Technology Co., Ltd. | 配線基板の製造方法及び配線基板 |
| US20080026543A1 (en) * | 2006-07-28 | 2008-01-31 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing semiconductor device |
| JP2010533977A (ja) * | 2007-07-17 | 2010-10-28 | スリーエム イノベイティブ プロパティズ カンパニー | 基材のパターニング方法 |
| JP2011503348A (ja) * | 2007-10-23 | 2011-01-27 | イー・アイ・デュポン・ドウ・ヌムール・アンド・カンパニー | 組成物および高い伝導性を有するパターニングされた金属層の提供方法 |
| US20110298135A1 (en) * | 2007-10-24 | 2011-12-08 | Charan Gurumurthy | Integrated circuit and process for fabricating thereof |
| JP2014165263A (ja) * | 2013-02-22 | 2014-09-08 | Seiren Co Ltd | 透明電極材の製造方法 |
| JP2015144252A (ja) * | 2013-12-15 | 2015-08-06 | オーボテック リミテッド | プリント回路配線の修復 |
| JP2015138921A (ja) * | 2014-01-24 | 2015-07-30 | 日本ゼオン株式会社 | 電子材料用基板 |
| JP2016039239A (ja) * | 2014-08-07 | 2016-03-22 | 株式会社 M&M研究所 | 配線基板の製造方法、配線基板及び配線基板製造用の分散液 |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2022548474A (ja) * | 2019-09-18 | 2022-11-21 | インテル・コーポレーション | パターニングを含むガラス誘電体層 |
| JP7647001B2 (ja) | 2019-09-18 | 2025-03-18 | インテル・コーポレーション | パターニングを含むガラス誘電体層 |
| JP2022115801A (ja) * | 2020-12-17 | 2022-08-09 | フィジカルニ ウースタヴ アーヴェー チェーエル ヴェーヴェーイー | ナノマテリアル構造体を製造する方法およびデバイス |
| JP7527588B2 (ja) | 2020-12-17 | 2024-08-05 | フィジカルニ ウースタヴ アーヴェー チェーエル ヴェーヴェーイー | ナノマテリアル構造体を製造する方法およびデバイス |
Also Published As
| Publication number | Publication date |
|---|---|
| US20190019736A1 (en) | 2019-01-17 |
| WO2017173281A1 (en) | 2017-10-05 |
| CN108604575B (zh) | 2023-05-26 |
| JP2023011656A (ja) | 2023-01-24 |
| CN108604575A (zh) | 2018-09-28 |
| US10957615B2 (en) | 2021-03-23 |
| EP3437127A4 (en) | 2019-11-27 |
| TW201737512A (zh) | 2017-10-16 |
| EP3437127A1 (en) | 2019-02-06 |
| TW202224211A (zh) | 2022-06-16 |
| TWI757279B (zh) | 2022-03-11 |
| KR20180122462A (ko) | 2018-11-12 |
| KR102437034B1 (ko) | 2022-08-29 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2023011656A (ja) | 導電めっきのためのレーザシーディング | |
| CN103781285B (zh) | 陶瓷基板表面导电线路的制作与修复方法 | |
| TWI494384B (zh) | 金屬油墨 | |
| US9150966B2 (en) | Solar cell metallization using inline electroless plating | |
| Min et al. | Fabrication of 10 µm-scale conductive Cu patterns by selective laser sintering of Cu complex ink | |
| TWI474765B (zh) | 在接受體上形成金屬材料之方法及經圖案化基板 | |
| CN104105353B (zh) | 一种高精度陶瓷电路板的制作方法 | |
| CN101002515A (zh) | 通过直接写入技术制造电子电路器件的方法 | |
| CN104750311A (zh) | 金属网格导电膜的制作方法、金属网格导电膜及触控面板 | |
| CN101546792A (zh) | 形成硅光电池的多层电极结构的方法 | |
| WO2000010736A1 (en) | Printing of electronic circuits and components | |
| TW201525166A (zh) | 用於材料沈積之方法和裝置以及供體器件 | |
| Hernandez-Castaneda et al. | Laser sintering of Cu nanoparticles on PET polymer substrate for printed electronics at different wavelengths and process conditions | |
| KR101808741B1 (ko) | 잉크젯 프린팅에 의한 도전층 패턴 형성방법 | |
| US20220266382A1 (en) | Laser-seeding for electro-conductive plating | |
| Pique et al. | Direct writing of electronic materials using a new laser-assisted transfer/annealing technique | |
| Cao et al. | Laser micro/nano-fabrication techniques and their applications in electronics | |
| CN119676970A (zh) | 液态金属薄膜及其制备方法和应用 | |
| Ko et al. | Subtractive laser processing of low temperature inkjet printed micro electric components of functional nano-ink for flexible electronics | |
| Schrauben | Laser ablation and seeding for the preparation of highly transparent copper conductive networks on glass | |
| Kordás | Laser-assisted chemical liquid-phase deposition of metals for micro-and optoelectronics | |
| CN113395837B (zh) | 一种纳米金属线路及结构的湿法激光成形方法 | |
| Schrauben et al. | Laser-Based Methodology for the Application of Glass as a Dielectric and Cu Pattern Carrier for Printed Circuit Boards | |
| Stankevič et al. | Electronics on any surface: SSAIL brings innovations to chip packaging, displays, and PCBs | |
| CN120963226A (zh) | 光电等离子合成法直写烧结纳微米电路 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20200317 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20200317 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20200318 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20210323 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20210420 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20210707 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20211124 |
|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20220712 |
|
| C60 | Trial request (containing other claim documents, opposition documents) |
Free format text: JAPANESE INTERMEDIATE CODE: C60 Effective date: 20221013 |
|
| A045 | Written measure of dismissal of application [lapsed due to lack of payment] |
Free format text: JAPANESE INTERMEDIATE CODE: A045 Effective date: 20240423 |