JP2019186243A5 - - Google Patents
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- Publication number
- JP2019186243A5 JP2019186243A5 JP2018070751A JP2018070751A JP2019186243A5 JP 2019186243 A5 JP2019186243 A5 JP 2019186243A5 JP 2018070751 A JP2018070751 A JP 2018070751A JP 2018070751 A JP2018070751 A JP 2018070751A JP 2019186243 A5 JP2019186243 A5 JP 2019186243A5
- Authority
- JP
- Japan
- Prior art keywords
- columnar electrode
- bump
- wiring board
- solder resist
- resist layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 229910000679 solder Inorganic materials 0.000 claims 11
- 238000002844 melting Methods 0.000 claims 6
- 230000008018 melting Effects 0.000 claims 6
- 238000000034 method Methods 0.000 claims 6
- 238000004519 manufacturing process Methods 0.000 claims 4
- 239000004065 semiconductor Substances 0.000 claims 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims 2
- 238000009713 electroplating Methods 0.000 claims 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims 1
- 230000015572 biosynthetic process Effects 0.000 claims 1
- 229910052802 copper Inorganic materials 0.000 claims 1
- 239000010949 copper Substances 0.000 claims 1
- 229910052759 nickel Inorganic materials 0.000 claims 1
- 239000000758 substrate Substances 0.000 claims 1
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2018070751A JP7032212B2 (ja) | 2018-04-02 | 2018-04-02 | 配線基板、半導体パッケージ及び配線基板の製造方法 |
| US16/364,740 US11121107B2 (en) | 2018-04-02 | 2019-03-26 | Interconnect substrate having columnar electrodes |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2018070751A JP7032212B2 (ja) | 2018-04-02 | 2018-04-02 | 配線基板、半導体パッケージ及び配線基板の製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2019186243A JP2019186243A (ja) | 2019-10-24 |
| JP2019186243A5 true JP2019186243A5 (enExample) | 2021-02-12 |
| JP7032212B2 JP7032212B2 (ja) | 2022-03-08 |
Family
ID=68053863
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2018070751A Active JP7032212B2 (ja) | 2018-04-02 | 2018-04-02 | 配線基板、半導体パッケージ及び配線基板の製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US11121107B2 (enExample) |
| JP (1) | JP7032212B2 (enExample) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2019140174A (ja) * | 2018-02-07 | 2019-08-22 | イビデン株式会社 | プリント配線板およびプリント配線板の製造方法 |
| US11109481B2 (en) * | 2019-02-15 | 2021-08-31 | Ibiden Co., Ltd. | Method for manufacturing printed wiring board and printed wiring board |
| JP7760246B2 (ja) | 2021-01-13 | 2025-10-27 | 新光電気工業株式会社 | 配線基板及び配線基板の製造方法 |
| US11855017B2 (en) * | 2021-01-14 | 2023-12-26 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor device and method |
| JP7599348B2 (ja) * | 2021-02-08 | 2024-12-13 | イビデン株式会社 | プリント配線板およびその製造方法 |
| JP2022161248A (ja) * | 2021-04-08 | 2022-10-21 | イビデン株式会社 | プリント配線板およびその製造方法 |
| JP2022161152A (ja) | 2021-04-08 | 2022-10-21 | イビデン株式会社 | プリント配線板およびプリント配線板の製造方法 |
| CN113471090B (zh) * | 2021-05-25 | 2024-06-18 | 清华大学 | 一种金属凸点的键合方法及键合机构 |
| KR20220161177A (ko) * | 2021-05-28 | 2022-12-06 | 닛토덴코 가부시키가이샤 | 배선 회로 기판 및 그 제조 방법 |
| US12334422B2 (en) * | 2021-09-24 | 2025-06-17 | Intel Corporation | Methods and apparatus to reduce defects in interconnects between semicondcutor dies and package substrates |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4769056B2 (ja) | 2005-10-07 | 2011-09-07 | 日本特殊陶業株式会社 | 配線基板及びその製法方法 |
| US8803319B2 (en) * | 2010-02-11 | 2014-08-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Pillar structure having a non-planar surface for semiconductor devices |
| JP6076020B2 (ja) * | 2012-02-29 | 2017-02-08 | ルネサスエレクトロニクス株式会社 | 半導体装置及び半導体装置の製造方法 |
| JP2017152646A (ja) | 2016-02-26 | 2017-08-31 | 富士通株式会社 | 電子部品、電子装置及び電子機器 |
| JP2019140174A (ja) | 2018-02-07 | 2019-08-22 | イビデン株式会社 | プリント配線板およびプリント配線板の製造方法 |
-
2018
- 2018-04-02 JP JP2018070751A patent/JP7032212B2/ja active Active
-
2019
- 2019-03-26 US US16/364,740 patent/US11121107B2/en active Active
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