JP2019087591A5 - - Google Patents
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- Publication number
- JP2019087591A5 JP2019087591A5 JP2017213329A JP2017213329A JP2019087591A5 JP 2019087591 A5 JP2019087591 A5 JP 2019087591A5 JP 2017213329 A JP2017213329 A JP 2017213329A JP 2017213329 A JP2017213329 A JP 2017213329A JP 2019087591 A5 JP2019087591 A5 JP 2019087591A5
- Authority
- JP
- Japan
- Prior art keywords
- trench
- layer
- base layer
- conductivity type
- semiconductor substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims description 13
- 239000000758 substrate Substances 0.000 claims description 8
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 4
- 229920005591 polysilicon Polymers 0.000 claims description 4
- 239000002245 particle Substances 0.000 claims 1
- 239000010410 layer Substances 0.000 description 12
- 230000000149 penetrating effect Effects 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2017213329A JP7009933B2 (ja) | 2017-11-03 | 2017-11-03 | 半導体装置 |
| PCT/JP2018/040772 WO2019088241A1 (ja) | 2017-11-03 | 2018-11-01 | 半導体装置 |
| CN201880071034.6A CN111295765B (zh) | 2017-11-03 | 2018-11-01 | 半导体装置 |
| US16/862,790 US11508836B2 (en) | 2017-11-03 | 2020-04-30 | Semiconductor device including trench gate structure with specific volume ratio of gate electrodes |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2017213329A JP7009933B2 (ja) | 2017-11-03 | 2017-11-03 | 半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2019087591A JP2019087591A (ja) | 2019-06-06 |
| JP2019087591A5 true JP2019087591A5 (https=) | 2020-04-09 |
| JP7009933B2 JP7009933B2 (ja) | 2022-01-26 |
Family
ID=66333276
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2017213329A Active JP7009933B2 (ja) | 2017-11-03 | 2017-11-03 | 半導体装置 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US11508836B2 (https=) |
| JP (1) | JP7009933B2 (https=) |
| CN (1) | CN111295765B (https=) |
| WO (1) | WO2019088241A1 (https=) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20250142878A1 (en) * | 2023-10-25 | 2025-05-01 | Hon Young Semiconductor Corporation | Semiconductor device and manufacturing method thereof |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2874062B2 (ja) * | 1991-02-25 | 1999-03-24 | 松下電子工業株式会社 | 薄膜トランジスタの製造方法 |
| TW442972B (en) * | 1999-10-01 | 2001-06-23 | Anpec Electronics Corp | Fabricating method of trench-type gate power metal oxide semiconductor field effect transistor |
| US7217950B2 (en) * | 2002-10-11 | 2007-05-15 | Nissan Motor Co., Ltd. | Insulated gate tunnel-injection device having heterojunction and method for manufacturing the same |
| JP4534500B2 (ja) * | 2003-05-14 | 2010-09-01 | 株式会社デンソー | 半導体装置の製造方法 |
| JP4791723B2 (ja) * | 2004-10-18 | 2011-10-12 | 株式会社東芝 | 半導体装置及びその製造方法 |
| JP2007005723A (ja) * | 2005-06-27 | 2007-01-11 | Toshiba Corp | 半導体装置 |
| JP2007043123A (ja) | 2005-07-01 | 2007-02-15 | Toshiba Corp | 半導体装置 |
| JP2007088010A (ja) | 2005-09-20 | 2007-04-05 | Denso Corp | 半導体装置およびその製造方法 |
| JP5609939B2 (ja) * | 2011-09-27 | 2014-10-22 | 株式会社デンソー | 半導体装置 |
| JP2013251397A (ja) | 2012-05-31 | 2013-12-12 | Denso Corp | 半導体装置 |
| JP5935948B2 (ja) * | 2013-08-06 | 2016-06-15 | 富士電機株式会社 | トレンチゲートｍｏｓ型半導体装置およびその製造方法 |
| JP6566512B2 (ja) | 2014-04-15 | 2019-08-28 | ローム株式会社 | 半導体装置および半導体装置の製造方法 |
| JP6459791B2 (ja) * | 2014-07-14 | 2019-01-30 | 株式会社デンソー | 半導体装置およびその製造方法 |
| JP2014232895A (ja) | 2014-09-11 | 2014-12-11 | 株式会社村田製作所 | 積層セラミックコンデンサ |
| KR102509260B1 (ko) * | 2015-11-20 | 2023-03-14 | 삼성디스플레이 주식회사 | 실리콘 연마 슬러리, 다결정 실리콘의 연마방법 및 박막 트랜지스터 기판의 제조방법 |
| US10643852B2 (en) * | 2016-09-30 | 2020-05-05 | Semiconductor Components Industries, Llc | Process of forming an electronic device including exposing a substrate to an oxidizing ambient |
-
2017
- 2017-11-03 JP JP2017213329A patent/JP7009933B2/ja active Active
-
2018
- 2018-11-01 WO PCT/JP2018/040772 patent/WO2019088241A1/ja not_active Ceased
- 2018-11-01 CN CN201880071034.6A patent/CN111295765B/zh active Active
-
2020
- 2020-04-30 US US16/862,790 patent/US11508836B2/en active Active