JP2019040993A - 半導体装置、半導体装置の製造方法、インバータ回路、駆動装置、車両、及び、昇降機 - Google Patents
半導体装置、半導体装置の製造方法、インバータ回路、駆動装置、車両、及び、昇降機 Download PDFInfo
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- JP2019040993A JP2019040993A JP2017161712A JP2017161712A JP2019040993A JP 2019040993 A JP2019040993 A JP 2019040993A JP 2017161712 A JP2017161712 A JP 2017161712A JP 2017161712 A JP2017161712 A JP 2017161712A JP 2019040993 A JP2019040993 A JP 2019040993A
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- silicon oxide
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
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- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
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- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
- H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
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Abstract
Description
本実施形態の半導体装置は、第1の面と第2の面を有し、第1の面が(0001)面に対し0度以上10度以下傾斜する炭化珪素層と、第1の面に接する第1の電極と、第2の面に接する第2の電極と、炭化珪素層の中に位置する第1導電型の第1の半導体領域と、第1の半導体領域と第1の面との間に位置する第2導電型の第2の半導体領域と、第2の半導体領域と第1の面との間に位置する第1導電型の第3の半導体領域と、ゲート電極と、第2の半導体領域とゲート電極との間に位置する酸化シリコン層と、第2の半導体領域と酸化シリコン層との間に位置し、炭素間の一重結合が炭素間の二重結合よりも多い領域と、を備える。
酸素(O)、イオウ(S)、セレン(Se)、テルル(Te)、水素(H)、重水素(D)、又は、フッ素(F)を第1の終端元素として、炭素間のπ結合を終端させることが可能である。
本実施形態の半導体装置は、領域中に、窒素(N)、リン(P)、ヒ素(As)、アンチモン(Sb)、ビスマス(Bi)、バリウム(Ba)、ボロン(B)、スカンジウム(Sc)、イットリウム(Y)、及び、ランタノイド(La、Ce、Pr、Nd、Pm、Sm、Eu、Gd、Tb、Dy、Ho、Er、Tm、Yb、Lu)から成る群から選ばれる少なくとも一つの第2の元素を含む点で、第1の実施形態と異なっている。以下、第1の実施形態と重複する内容については、記述を省略する。
本実施形態の半導体装置は、MOSFETの終端領域に界面領域が設けられる点で第1或いは第2の実施形態と異なっている。第1或いは第2の実施形態と重複する内容については記述を省略する。
本実施形態のインバータ回路及び駆動装置は、第1の実施形態の半導体装置を備える駆動装置である。
本実施形態の車両は、第1の実施形態の半導体装置を備える車両である。
本実施形態の車両は、第1の実施形態の半導体装置を備える車両である。
本実施形態の昇降機は、第1の実施形態の半導体装置を備える昇降機である。
14 ドリフト領域(第1の半導体領域)
16 pウェル領域(第2の半導体領域)
18 ソース領域(第3の半導体領域)
28 酸化シリコン層
30 ゲート電極
34 ソース電極(第1の電極)
36 ドレイン電極(第2の電極)
40 界面領域(領域)
100 MOSFET(半導体装置)
150 インバータ回路
200 MOSFET(半導体装置)
300 駆動装置
400 車両
500 車両
600 昇降機
Claims (20)
- (0001)面に対し0度以上10度以下傾斜した表面を有する炭化珪素層と、
酸化シリコン層と、
前記表面と前記酸化シリコン層との間に位置し、炭素間の一重結合が炭素間の二重結合よりも多い領域と、
を備える半導体装置。 - 前記領域の中に、酸素(O)、イオウ(S)、セレン(Se)、及び、テルル(Te)から成る群から選ばれる1個の第1の元素が、一重結合する2個の炭素に共有されて結合する構造を有する請求項1記載の半導体装置。
- 前記領域の中に、水素(H)、重水素(D)、及び、フッ素(F)から成る群から選ばれる第1の元素が、一重結合する2個の炭素のそれぞれに1個ずつ結合する構造を有する請求項1記載の半導体装置。
- 前記領域中に、窒素(N)、リン(P)、ヒ素(As)、アンチモン(Sb)、ビスマス(Bi)、バリウム(Ba)、ボロン(B)、スカンジウム(Sc)、イットリウム(Y)、及び、ランタノイド(La、Ce、Pr、Nd、Pm、Sm、Eu、Gd、Tb、Dy、Ho、Er、Tm、Yb、Lu)から成る群から選ばれる少なくとも一つの第2の元素を含む請求項1ないし請求項3いずれか一項記載の半導体装置。
- 前記領域中に、前記少なくとも一つの第2の元素の濃度分布のピークが存在する請求項4記載の半導体装置。
- 前記少なくとも一つの第2の元素の濃度分布のピークが、4×1016cm−3以上7.5×1021cm−3以下である請求項4記載の半導体装置。
- 前記少なくとも一つの第2の元素の濃度分布の半値全幅が1nm以下である請求項5又は請求項6記載の半導体装置。
- 前記炭化珪素層との間に前記酸化シリコン層が位置するゲート電極を、更に備える請求項1ないし請求項7いずれか一項記載の半導体装置。
- 第1の面と第2の面を有し、前記第1の面が(0001)面に対し0度以上10度以下傾斜する炭化珪素層と、
前記第1の面に接する第1の電極と、
前記第2の面に接する第2の電極と、
前記炭化珪素層の中に位置する第1導電型の第1の半導体領域と、
前記第1の半導体領域と前記第1の面との間に位置する第2導電型の第2の半導体領域と、
前記第2の半導体領域と前記第1の面との間に位置する第1導電型の第3の半導体領域と、
ゲート電極と、
前記第2の半導体領域と前記ゲート電極との間に位置する酸化シリコン層と、
前記第2の半導体領域と前記酸化シリコン層との間に位置し、炭素間の一重結合が炭素間の二重結合よりも多い領域と、
を備える半導体装置。 - 前記領域の中に、酸素(O)、イオウ(S)、セレン(Se)、及び、テルル(Te)から成る群から選ばれる1個の第1の元素が、一重結合する2個の炭素に共有されて結合する構造を有する請求項9記載の半導体装置。
- 前記領域の中に、水素(H)、重水素(D)、及び、フッ素(F)から成る群から選ばれる第1の元素が、一重結合する2個の炭素のそれぞれに1個ずつ結合する構造を有する請求項9記載の半導体装置。
- 前記領域中に、窒素(N)、リン(P)、ヒ素(As)、アンチモン(Sb)、ビスマス(Bi)、バリウム(Ba)、ボロン(B)、スカンジウム(Sc)、イットリウム(Y)、及び、ランタノイド(La、Ce、Pr、Nd、Pm、Sm、Eu、Gd、Tb、Dy、Ho、Er、Tm、Yb、Lu)から成る群から選ばれる少なくとも一つの第2の元素を含む請求項9ないし請求項11いずれか一項記載の半導体装置。
- 前記領域中に、前記少なくとも一つの第2の元素の濃度分布のピークが存在する請求項12記載の半導体装置。
- 請求項1ないし請求項13いずれか一項記載の半導体装置を備えるインバータ回路。
- 請求項1ないし請求項13いずれか一項記載の半導体装置を備える駆動装置。
- 請求項1ないし請求項13いずれか一項記載の半導体装置を備える車両。
- 請求項1ないし請求項13いずれか一項記載の半導体装置を備える昇降機。
- (0001)面に対し0度以上10度以下傾斜した表面を有する炭化珪素層の前記表面に酸化シリコン層を形成し、
オゾンの分圧が10%以下、又は、酸素ラジカルの分圧が10%以下で、かつ、温度が400℃以下の第1の熱処理を行う半導体装置の製造方法。 - 前記酸化シリコン層を形成した後、前記第1の熱処理を行う前に、窒素を含む雰囲気中で第2の熱処理を行う請求項18記載の半導体装置の製造方法。
- 前記酸化シリコン層は、気相成長法により形成される請求項18又は請求項19記載の半導体装置の製造方法。
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