JP2018534806A - 電力ゲーティングデバイスおよび方法 - Google Patents

電力ゲーティングデバイスおよび方法 Download PDF

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Publication number
JP2018534806A
JP2018534806A JP2018511657A JP2018511657A JP2018534806A JP 2018534806 A JP2018534806 A JP 2018534806A JP 2018511657 A JP2018511657 A JP 2018511657A JP 2018511657 A JP2018511657 A JP 2018511657A JP 2018534806 A JP2018534806 A JP 2018534806A
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JP
Japan
Prior art keywords
voltage
transistor
inverter
rail
power
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Pending
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JP2018511657A
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English (en)
Japanese (ja)
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JP2018534806A5 (enExample
Inventor
ジュン・ピル・キム
スンリュル・キム
テヒョン・キム
Original Assignee
クアルコム，インコーポレイテッド
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Application filed by クアルコム，インコーポレイテッド filed Critical クアルコム，インコーポレイテッド
Publication of JP2018534806A publication Critical patent/JP2018534806A/ja
Publication of JP2018534806A5 publication Critical patent/JP2018534806A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K17/6871—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0016—Arrangements for reducing power consumption by using a control or a clock signal, e.g. in order to apply power supply
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K17/693—Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP2018511657A 2015-09-08 2016-08-12 電力ゲーティングデバイスおよび方法 Pending JP2018534806A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/847,387 US20170070225A1 (en) 2015-09-08 2015-09-08 Power gating devices and methods
US14/847,387 2015-09-08
PCT/US2016/046815 WO2017044249A1 (en) 2015-09-08 2016-08-12 Power gating devices and methods

Publications (2)

Publication Number Publication Date
JP2018534806A true JP2018534806A (ja) 2018-11-22
JP2018534806A5 JP2018534806A5 (enExample) 2019-09-05

Family

ID=56853814

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2018511657A Pending JP2018534806A (ja) 2015-09-08 2016-08-12 電力ゲーティングデバイスおよび方法

Country Status (9)

Country Link
US (1) US20170070225A1 (enExample)
EP (1) EP3347989A1 (enExample)
JP (1) JP2018534806A (enExample)
KR (1) KR20180051592A (enExample)
CN (1) CN108028652A (enExample)
AU (1) AU2016320677A1 (enExample)
BR (1) BR112018004461A2 (enExample)
TW (1) TW201729539A (enExample)
WO (1) WO2017044249A1 (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20180127776A (ko) * 2017-05-22 2018-11-30 에스케이하이닉스 주식회사 전원 게이팅 회로를 포함하는 반도체 장치 및 이의 리페어 방법
US10312912B2 (en) * 2017-06-28 2019-06-04 Texas Instruments Incorporated Gate control for a tristate output buffer
US10529407B2 (en) * 2017-07-20 2020-01-07 Samsung Electronics Co., Ltd. Memory device including a plurality of power rails and method of operating the same
KR102652805B1 (ko) * 2018-03-12 2024-04-01 에스케이하이닉스 주식회사 파워 게이팅 회로 및 그 제어 시스템
US12217793B2 (en) 2021-11-16 2025-02-04 Samsung Electronics Co., Ltd. Data transfer circuits in nonvolatile memory devices and nonvolatile memory devices including the same
US12034442B2 (en) * 2022-09-20 2024-07-09 Cirrus Logic Inc. Configurable ground switch to support power delivery between two supply domains
US20250110538A1 (en) * 2023-09-28 2025-04-03 Advanced Micro Devices, Inc. Granular power gating override

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0883487A (ja) * 1994-09-09 1996-03-26 Mitsubishi Electric Corp 半導体集積回路装置
JPH09231756A (ja) * 1995-12-21 1997-09-05 Hitachi Ltd 半導体集積回路装置と半導体集積回路の動作方法及び半導体集積回路装置の回路接続検証方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3721964A (en) * 1970-02-18 1973-03-20 Hewlett Packard Co Integrated circuit read only memory bit organized in coincident select structure
US5583457A (en) * 1992-04-14 1996-12-10 Hitachi, Ltd. Semiconductor integrated circuit device having power reduction mechanism
JP3725911B2 (ja) * 1994-06-02 2005-12-14 株式会社ルネサステクノロジ 半導体装置
JP4390305B2 (ja) * 1999-01-04 2009-12-24 株式会社ルネサステクノロジ 半導体装置
US6977519B2 (en) * 2003-05-14 2005-12-20 International Business Machines Corporation Digital logic with reduced leakage
US7126370B2 (en) * 2004-10-28 2006-10-24 International Business Machines Corporation Power gating techniques able to have data retention and variability immunity properties
US20080197914A1 (en) * 2007-02-15 2008-08-21 Daniel Shimizu Dynamic leakage control using selective back-biasing
US8648654B1 (en) * 2012-09-25 2014-02-11 Arm Limited Integrated circuit and method for generating a layout of such an integrated circuit
EP2804313B1 (en) * 2013-05-17 2018-09-12 Nxp B.V. Transconductance amplifier

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0883487A (ja) * 1994-09-09 1996-03-26 Mitsubishi Electric Corp 半導体集積回路装置
JPH09231756A (ja) * 1995-12-21 1997-09-05 Hitachi Ltd 半導体集積回路装置と半導体集積回路の動作方法及び半導体集積回路装置の回路接続検証方法

Also Published As

Publication number Publication date
AU2016320677A1 (en) 2018-02-15
KR20180051592A (ko) 2018-05-16
US20170070225A1 (en) 2017-03-09
TW201729539A (zh) 2017-08-16
CN108028652A (zh) 2018-05-11
WO2017044249A1 (en) 2017-03-16
BR112018004461A2 (pt) 2018-09-25
EP3347989A1 (en) 2018-07-18

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