JP2017519418A - Ｎ階乗電圧モードドライバ - Google Patents

Ｎ階乗電圧モードドライバ Download PDF

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Publication number
JP2017519418A
JP2017519418A JP2016567410A JP2016567410A JP2017519418A JP 2017519418 A JP2017519418 A JP 2017519418A JP 2016567410 A JP2016567410 A JP 2016567410A JP 2016567410 A JP2016567410 A JP 2016567410A JP 2017519418 A JP2017519418 A JP 2017519418A
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JP
Japan
Prior art keywords
wire
wires
current flow
voltage sources
combination
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
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JP2016567410A
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English (en)
Japanese (ja)
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JP2017519418A5 (enExample
Inventor
祥一郎 仙石
祥一郎 仙石
Original Assignee
クアルコム，インコーポレイテッド
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Application filed by クアルコム，インコーポレイテッド filed Critical クアルコム，インコーポレイテッド
Publication of JP2017519418A publication Critical patent/JP2017519418A/ja
Publication of JP2017519418A5 publication Critical patent/JP2017519418A5/ja
Pending legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/0272—Arrangements for coupling to multiple lines, e.g. for differential transmission
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/0278—Arrangements for impedance matching
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/028—Arrangements specific to the transmitter end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/20—Arrangements affording multiple use of the transmission path using different combinations of lines, e.g. phantom working

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  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Power Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Dc Digital Transmission (AREA)
JP2016567410A 2014-05-15 2015-05-11 Ｎ階乗電圧モードドライバ Pending JP2017519418A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/278,682 US9710412B2 (en) 2014-05-15 2014-05-15 N-factorial voltage mode driver
US14/278,682 2014-05-15
PCT/US2015/030227 WO2015175439A1 (en) 2014-05-15 2015-05-11 N-factorial voltage mode driver

Publications (2)

Publication Number Publication Date
JP2017519418A true JP2017519418A (ja) 2017-07-13
JP2017519418A5 JP2017519418A5 (enExample) 2018-06-14

Family

ID=53277048

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016567410A Pending JP2017519418A (ja) 2014-05-15 2015-05-11 Ｎ階乗電圧モードドライバ

Country Status (6)

Country Link
US (1) US9710412B2 (enExample)
EP (1) EP3143740A1 (enExample)
JP (1) JP2017519418A (enExample)
KR (1) KR20170005102A (enExample)
CN (1) CN106462527B (enExample)
WO (1) WO2015175439A1 (enExample)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9288089B2 (en) 2010-04-30 2016-03-15 Ecole Polytechnique Federale De Lausanne (Epfl) Orthogonal differential vector signaling
US9251873B1 (en) 2010-05-20 2016-02-02 Kandou Labs, S.A. Methods and systems for pin-efficient memory controller interface using vector signaling codes for chip-to-chip communications
WO2014172377A1 (en) 2013-04-16 2014-10-23 Kandou Labs, S.A. Methods and systems for high bandwidth communications interface
JP6317474B2 (ja) 2014-02-02 2018-04-25 カンドウ ラボズ ソシエテ アノニム 制約ｉｓｉ比を用いる低電力チップ間通信の方法および装置
KR102240544B1 (ko) 2014-02-28 2021-04-19 칸도우 랩스 에스에이 클록 임베디드 벡터 시그널링 코드
US11240076B2 (en) 2014-05-13 2022-02-01 Kandou Labs, S.A. Vector signaling code with improved noise margin
US9509437B2 (en) 2014-05-13 2016-11-29 Kandou Labs, S.A. Vector signaling code with improved noise margin
US9112550B1 (en) 2014-06-25 2015-08-18 Kandou Labs, SA Multilevel driver for high speed chip-to-chip communications
US9900186B2 (en) 2014-07-10 2018-02-20 Kandou Labs, S.A. Vector signaling codes with increased signal to noise characteristics
US9432082B2 (en) 2014-07-17 2016-08-30 Kandou Labs, S.A. Bus reversable orthogonal differential vector signaling codes
US9461862B2 (en) 2014-08-01 2016-10-04 Kandou Labs, S.A. Orthogonal differential vector signaling codes with embedded clock
EP3700154B1 (en) 2015-06-26 2024-10-02 Kandou Labs, S.A. High speed communications system
US10055372B2 (en) 2015-11-25 2018-08-21 Kandou Labs, S.A. Orthogonal differential vector signaling codes with embedded clock
WO2017190102A1 (en) * 2016-04-28 2017-11-02 Kandou Labs, S.A. Low power multilevel driver
EP3610576B1 (en) 2017-04-14 2022-12-28 Kandou Labs, S.A. Pipelined forward error correction for vector signaling code channel
DE112018002643T5 (de) 2017-05-22 2020-05-07 Invention Mine, Llc Multimodale datengetriebene taktwiederherstellungsschaltung
US10116468B1 (en) 2017-06-28 2018-10-30 Kandou Labs, S.A. Low power chip-to-chip bidirectional communications
US10693587B2 (en) 2017-07-10 2020-06-23 Kandou Labs, S.A. Multi-wire permuted forward error correction
KR102349415B1 (ko) * 2017-08-07 2022-01-11 삼성전자주식회사 펄스 진폭 변조 송신기 및 펄스 진폭 변조 수신기
US10496583B2 (en) 2017-09-07 2019-12-03 Kandou Labs, S.A. Low power multilevel driver for generating wire signals according to summations of a plurality of weighted analog signal components having wire-specific sub-channel weights
US10467177B2 (en) 2017-12-08 2019-11-05 Kandou Labs, S.A. High speed memory interface
EP3732840B1 (en) 2017-12-28 2024-05-01 Kandou Labs, S.A. Synchronously-switched multi-input demodulating comparator
US10554450B2 (en) * 2018-03-14 2020-02-04 Samsung Display Co., Ltd. High resolution voltage-mode driver
US12063034B2 (en) 2022-08-30 2024-08-13 Kandou Labs SA Line driver impedance calibration for multi-wire data bus
WO2024049482A1 (en) 2022-08-30 2024-03-07 Kandou Labs SA Pre-scaler for orthogonal differential vector signalling

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06261092A (ja) * 1993-03-02 1994-09-16 Sony Kihara Kenkyusho:Kk シリアルディジタルデータの伝送方法及び伝送装置
US6452420B1 (en) * 2001-05-24 2002-09-17 National Semiconductor Corporation Multi-dimensional differential signaling (MDDS)
US20020186777A1 (en) * 1996-12-20 2002-12-12 Perino Donald V. Apparatus for multilevel signaling
US6556628B1 (en) * 1999-04-29 2003-04-29 The University Of North Carolina At Chapel Hill Methods and systems for transmitting and receiving differential signals over a plurality of conductors
WO2007125963A1 (ja) * 2006-04-27 2007-11-08 Panasonic Corporation 多重差動伝送システム
JP2011517159A (ja) * 2008-03-05 2011-05-26 クゥアルコム・インコーポレイテッド 多元送信機システム及び方法

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7167527B1 (en) * 2002-05-02 2007-01-23 Integrated Memory Logic, Inc. System and method for multi-symbol interfacing
US7358869B1 (en) 2003-08-20 2008-04-15 University Of Pittsburgh Power efficient, high bandwidth communication using multi-signal-differential channels
JP2005086662A (ja) * 2003-09-10 2005-03-31 Seiko Epson Corp 半導体装置
US7227382B1 (en) 2005-02-01 2007-06-05 Advanced Micro Devices, Inc. Transmit based equalization using a voltage mode driver
US7567616B2 (en) * 2005-02-17 2009-07-28 Realtek Semiconductor Corp. Feedback equalizer for a communications receiver
US8222917B2 (en) * 2005-11-03 2012-07-17 Agate Logic, Inc. Impedance matching and trimming apparatuses and methods using programmable resistance devices
US7746937B2 (en) * 2006-04-14 2010-06-29 Formfactor, Inc. Efficient wired interface for differential signals
US8649460B2 (en) * 2007-06-05 2014-02-11 Rambus Inc. Techniques for multi-wire encoding with an embedded clock
US8159375B2 (en) * 2007-10-01 2012-04-17 Rambus Inc. Simplified receiver for use in multi-wire communication
US7710144B2 (en) * 2008-07-01 2010-05-04 International Business Machines Corporation Controlling for variable impedance and voltage in a memory system
EP2412136B1 (en) 2009-03-27 2017-03-01 Rambus Inc. Voltage mode transmitter equalizer
US20110133773A1 (en) 2009-12-04 2011-06-09 Uniram Technology Inc. High Performance Output Drivers and Anti-Reflection Circuits
US9319043B2 (en) 2010-02-02 2016-04-19 Nokia Technologies Oy Generation of differential signals
US8208578B2 (en) * 2010-06-21 2012-06-26 North Carolina State University Systems, methods, and computer readable media for fractional pre-emphasis of multi-mode interconnect
US9071220B2 (en) 2013-03-07 2015-06-30 Qualcomm Incorporated Efficient N-factorial differential signaling termination network

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06261092A (ja) * 1993-03-02 1994-09-16 Sony Kihara Kenkyusho:Kk シリアルディジタルデータの伝送方法及び伝送装置
US20020186777A1 (en) * 1996-12-20 2002-12-12 Perino Donald V. Apparatus for multilevel signaling
US6556628B1 (en) * 1999-04-29 2003-04-29 The University Of North Carolina At Chapel Hill Methods and systems for transmitting and receiving differential signals over a plurality of conductors
US6452420B1 (en) * 2001-05-24 2002-09-17 National Semiconductor Corporation Multi-dimensional differential signaling (MDDS)
WO2007125963A1 (ja) * 2006-04-27 2007-11-08 Panasonic Corporation 多重差動伝送システム
JP2011517159A (ja) * 2008-03-05 2011-05-26 クゥアルコム・インコーポレイテッド 多元送信機システム及び方法

Also Published As

Publication number Publication date
US20150331820A1 (en) 2015-11-19
EP3143740A1 (en) 2017-03-22
CN106462527A (zh) 2017-02-22
US9710412B2 (en) 2017-07-18
WO2015175439A1 (en) 2015-11-19
KR20170005102A (ko) 2017-01-11
CN106462527B (zh) 2019-08-02

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