JP2017519418A5 - - Google Patents

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Publication number
JP2017519418A5
JP2017519418A5 JP2016567410A JP2016567410A JP2017519418A5 JP 2017519418 A5 JP2017519418 A5 JP 2017519418A5 JP 2016567410 A JP2016567410 A JP 2016567410A JP 2016567410 A JP2016567410 A JP 2016567410A JP 2017519418 A5 JP2017519418 A5 JP 2017519418A5
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JP
Japan
Prior art keywords
wires
wire
current
current flow
voltage sources
Prior art date
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Pending
Application number
JP2016567410A
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English (en)
Japanese (ja)
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JP2017519418A (ja
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Publication date
Priority claimed from US14/278,682 external-priority patent/US9710412B2/en
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Publication of JP2017519418A publication Critical patent/JP2017519418A/ja
Publication of JP2017519418A5 publication Critical patent/JP2017519418A5/ja
Pending legal-status Critical Current

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JP2016567410A 2014-05-15 2015-05-11 Ｎ階乗電圧モードドライバ Pending JP2017519418A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/278,682 US9710412B2 (en) 2014-05-15 2014-05-15 N-factorial voltage mode driver
US14/278,682 2014-05-15
PCT/US2015/030227 WO2015175439A1 (en) 2014-05-15 2015-05-11 N-factorial voltage mode driver

Publications (2)

Publication Number Publication Date
JP2017519418A JP2017519418A (ja) 2017-07-13
JP2017519418A5 true JP2017519418A5 (enExample) 2018-06-14

Family

ID=53277048

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016567410A Pending JP2017519418A (ja) 2014-05-15 2015-05-11 Ｎ階乗電圧モードドライバ

Country Status (6)

Country Link
US (1) US9710412B2 (enExample)
EP (1) EP3143740A1 (enExample)
JP (1) JP2017519418A (enExample)
KR (1) KR20170005102A (enExample)
CN (1) CN106462527B (enExample)
WO (1) WO2015175439A1 (enExample)

Families Citing this family (25)

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Publication number Priority date Publication date Assignee Title
US9288089B2 (en) 2010-04-30 2016-03-15 Ecole Polytechnique Federale De Lausanne (Epfl) Orthogonal differential vector signaling
US9251873B1 (en) 2010-05-20 2016-02-02 Kandou Labs, S.A. Methods and systems for pin-efficient memory controller interface using vector signaling codes for chip-to-chip communications
WO2014172377A1 (en) 2013-04-16 2014-10-23 Kandou Labs, S.A. Methods and systems for high bandwidth communications interface
US9100232B1 (en) 2014-02-02 2015-08-04 Kandou Labs, S.A. Method for code evaluation using ISI ratio
CN106105123B (zh) 2014-02-28 2019-06-28 康杜实验室公司 用于发送时钟嵌入式向量信令码的方法和系统
US9509437B2 (en) 2014-05-13 2016-11-29 Kandou Labs, S.A. Vector signaling code with improved noise margin
US11240076B2 (en) 2014-05-13 2022-02-01 Kandou Labs, S.A. Vector signaling code with improved noise margin
US9112550B1 (en) 2014-06-25 2015-08-18 Kandou Labs, SA Multilevel driver for high speed chip-to-chip communications
WO2016007863A2 (en) 2014-07-10 2016-01-14 Kandou Labs, S.A. Vector signaling codes with increased signal to noise characteristics
US9432082B2 (en) 2014-07-17 2016-08-30 Kandou Labs, S.A. Bus reversable orthogonal differential vector signaling codes
CN110008166B (zh) 2014-08-01 2023-07-18 康杜实验室公司 带内嵌时钟的正交差分向量信令码
EP3700154B1 (en) 2015-06-26 2024-10-02 Kandou Labs, S.A. High speed communications system
US10055372B2 (en) 2015-11-25 2018-08-21 Kandou Labs, S.A. Orthogonal differential vector signaling codes with embedded clock
EP3449606A4 (en) * 2016-04-28 2019-11-27 Kandou Labs S.A. MULTI-STAGE DRIVER WITH LOW POWER CONSUMPTION
WO2018191749A1 (en) 2017-04-14 2018-10-18 Kandou Labs, S.A. Pipelined forward error correction for vector signaling code channel
CN115333530A (zh) 2017-05-22 2022-11-11 康杜实验室公司 多模式数据驱动型时钟恢复方法和装置
US10116468B1 (en) 2017-06-28 2018-10-30 Kandou Labs, S.A. Low power chip-to-chip bidirectional communications
US10693587B2 (en) 2017-07-10 2020-06-23 Kandou Labs, S.A. Multi-wire permuted forward error correction
KR102349415B1 (ko) * 2017-08-07 2022-01-11 삼성전자주식회사 펄스 진폭 변조 송신기 및 펄스 진폭 변조 수신기
US10496583B2 (en) 2017-09-07 2019-12-03 Kandou Labs, S.A. Low power multilevel driver for generating wire signals according to summations of a plurality of weighted analog signal components having wire-specific sub-channel weights
US10467177B2 (en) 2017-12-08 2019-11-05 Kandou Labs, S.A. High speed memory interface
KR102347396B1 (ko) 2017-12-28 2022-01-04 칸도우 랩스 에스에이 동기식으로 스위칭된 다중 입력 복조 비교기
US10554450B2 (en) * 2018-03-14 2020-02-04 Samsung Display Co., Ltd. High resolution voltage-mode driver
US12063034B2 (en) 2022-08-30 2024-08-13 Kandou Labs SA Line driver impedance calibration for multi-wire data bus
US11831472B1 (en) 2022-08-30 2023-11-28 Kandou Labs SA Pre-scaler for orthogonal differential vector signalling

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US6005895A (en) * 1996-12-20 1999-12-21 Rambus Inc. Apparatus and method for multilevel signaling
US6556628B1 (en) * 1999-04-29 2003-04-29 The University Of North Carolina At Chapel Hill Methods and systems for transmitting and receiving differential signals over a plurality of conductors
US6452420B1 (en) * 2001-05-24 2002-09-17 National Semiconductor Corporation Multi-dimensional differential signaling (MDDS)
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US8208578B2 (en) * 2010-06-21 2012-06-26 North Carolina State University Systems, methods, and computer readable media for fractional pre-emphasis of multi-mode interconnect
US9071220B2 (en) * 2013-03-07 2015-06-30 Qualcomm Incorporated Efficient N-factorial differential signaling termination network

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