JP2017183487A5 - - Google Patents

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Publication number
JP2017183487A5
JP2017183487A5 JP2016068137A JP2016068137A JP2017183487A5 JP 2017183487 A5 JP2017183487 A5 JP 2017183487A5 JP 2016068137 A JP2016068137 A JP 2016068137A JP 2016068137 A JP2016068137 A JP 2016068137A JP 2017183487 A5 JP2017183487 A5 JP 2017183487A5
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JP
Japan
Prior art keywords
metal film
region
substrate
processing chamber
plasma
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JP2016068137A
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English (en)
Japanese (ja)
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JP2017183487A (ja
JP6538604B2 (ja
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Priority to JP2016068137A priority Critical patent/JP6538604B2/ja
Priority claimed from JP2016068137A external-priority patent/JP6538604B2/ja
Priority to US15/465,891 priority patent/US10014226B2/en
Publication of JP2017183487A publication Critical patent/JP2017183487A/ja
Publication of JP2017183487A5 publication Critical patent/JP2017183487A5/ja
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JP2016068137A 2016-03-30 2016-03-30 半導体装置の製造方法および基板処理装置 Active JP6538604B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2016068137A JP6538604B2 (ja) 2016-03-30 2016-03-30 半導体装置の製造方法および基板処理装置
US15/465,891 US10014226B2 (en) 2016-03-30 2017-03-22 Method of manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2016068137A JP6538604B2 (ja) 2016-03-30 2016-03-30 半導体装置の製造方法および基板処理装置

Publications (3)

Publication Number Publication Date
JP2017183487A JP2017183487A (ja) 2017-10-05
JP2017183487A5 true JP2017183487A5 (enExample) 2018-05-17
JP6538604B2 JP6538604B2 (ja) 2019-07-03

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ID=59961889

Family Applications (1)

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JP2016068137A Active JP6538604B2 (ja) 2016-03-30 2016-03-30 半導体装置の製造方法および基板処理装置

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US (1) US10014226B2 (enExample)
JP (1) JP6538604B2 (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102553773B1 (ko) * 2019-01-09 2023-07-11 어플라이드 머티어리얼스, 인코포레이티드 반도체 디바이스에 구조를 형성하는 방법
JP7117354B2 (ja) 2020-09-14 2022-08-12 株式会社Kokusai Electric 半導体装置の製造方法、基板処理装置、およびプログラム

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6027961A (en) * 1998-06-30 2000-02-22 Motorola, Inc. CMOS semiconductor devices and method of formation
US6291282B1 (en) * 1999-02-26 2001-09-18 Texas Instruments Incorporated Method of forming dual metal gate structures or CMOS devices
US7514310B2 (en) * 2004-12-01 2009-04-07 Samsung Electronics Co., Ltd. Dual work function metal gate structure and related method of manufacture
US7612422B2 (en) * 2006-12-29 2009-11-03 Texas Instruments Incorporated Structure for dual work function metal gate electrodes by control of interface dipoles
JP5774822B2 (ja) 2009-05-25 2015-09-09 株式会社日立国際電気 半導体デバイスの製造方法及び基板処理装置
JP5462885B2 (ja) * 2009-12-18 2014-04-02 株式会社日立国際電気 半導体装置の製造方法および基板処理装置
US20130149852A1 (en) * 2011-12-08 2013-06-13 Tokyo Electron Limited Method for forming a semiconductor device
JP6308584B2 (ja) 2013-02-28 2018-04-11 株式会社日立国際電気 半導体装置の製造方法、基板処理装置、基板処理システム及びプログラム
JP6086933B2 (ja) 2015-01-06 2017-03-01 株式会社日立国際電気 半導体装置の製造方法、基板処理装置およびプログラム

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