JP2017142799A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2017142799A5 JP2017142799A5 JP2017022453A JP2017022453A JP2017142799A5 JP 2017142799 A5 JP2017142799 A5 JP 2017142799A5 JP 2017022453 A JP2017022453 A JP 2017022453A JP 2017022453 A JP2017022453 A JP 2017022453A JP 2017142799 A5 JP2017142799 A5 JP 2017142799A5
- Authority
- JP
- Japan
- Prior art keywords
- source operand
- μop
- execution
- value
- functional unit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US14/229,183 | 2014-03-28 | ||
| US14/229,183 US20150277904A1 (en) | 2014-03-28 | 2014-03-28 | Method and apparatus for performing a plurality of multiplication operations |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2015011008A Division JP6092904B2 (ja) | 2014-03-28 | 2015-01-23 | プロセッサおよび方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2017142799A JP2017142799A (ja) | 2017-08-17 |
| JP2017142799A5 true JP2017142799A5 (enExample) | 2018-11-15 |
| JP6498226B2 JP6498226B2 (ja) | 2019-04-10 |
Family
ID=53016263
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2015011008A Active JP6092904B2 (ja) | 2014-03-28 | 2015-01-23 | プロセッサおよび方法 |
| JP2017022453A Active JP6498226B2 (ja) | 2014-03-28 | 2017-02-09 | プロセッサおよび方法 |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2015011008A Active JP6092904B2 (ja) | 2014-03-28 | 2015-01-23 | プロセッサおよび方法 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US20150277904A1 (enExample) |
| JP (2) | JP6092904B2 (enExample) |
| KR (1) | KR101729829B1 (enExample) |
| CN (1) | CN104951278A (enExample) |
| DE (1) | DE102015002253A1 (enExample) |
| GB (1) | GB2526406B (enExample) |
| TW (1) | TWI578230B (enExample) |
Families Citing this family (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20170177361A1 (en) * | 2015-12-22 | 2017-06-22 | Michael Anderson | Apparatus and method for accelerating graph analytics |
| US10387988B2 (en) | 2016-02-26 | 2019-08-20 | Google Llc | Compiler techniques for mapping program code to a high performance, power efficient, programmable image processing hardware platform |
| GB2548600B (en) * | 2016-03-23 | 2018-05-09 | Advanced Risc Mach Ltd | Vector predication instruction |
| US10089110B2 (en) * | 2016-07-02 | 2018-10-02 | Intel Corporation | Systems, apparatuses, and methods for cumulative product |
| US10275243B2 (en) * | 2016-07-02 | 2019-04-30 | Intel Corporation | Interruptible and restartable matrix multiplication instructions, processors, methods, and systems |
| CN115480730A (zh) * | 2016-10-20 | 2022-12-16 | 英特尔公司 | 用于经融合的乘加的系统、装置和方法 |
| CN106951211B (zh) * | 2017-03-27 | 2019-10-18 | 南京大学 | 一种可重构定浮点通用乘法器 |
| US10417731B2 (en) * | 2017-04-24 | 2019-09-17 | Intel Corporation | Compute optimization mechanism for deep neural networks |
| US10824938B2 (en) * | 2017-04-24 | 2020-11-03 | Intel Corporation | Specialized fixed function hardware for efficient convolution |
| US10776699B2 (en) | 2017-05-05 | 2020-09-15 | Intel Corporation | Optimized compute hardware for machine learning operations |
| WO2019066796A1 (en) * | 2017-09-27 | 2019-04-04 | Intel Corporation | INSTRUCTIONS FOR THE VECTORIAL MULTIPLICATION OF WORDS SIGNED AT BOROUGH |
| WO2019066797A1 (en) * | 2017-09-27 | 2019-04-04 | Intel Corporation | INSTRUCTIONS FOR VECTORIC MULTIPLICATION OF NOT SIGNED WORDS WITH BOROUGH |
| US10802826B2 (en) * | 2017-09-29 | 2020-10-13 | Intel Corporation | Apparatus and method for performing dual signed and unsigned multiplication of packed data elements |
| US10572568B2 (en) * | 2018-03-28 | 2020-02-25 | Intel Corporation | Accelerator for sparse-dense matrix multiplication |
| US10459688B1 (en) * | 2019-02-06 | 2019-10-29 | Arm Limited | Encoding special value in anchored-data element |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2580371B2 (ja) * | 1990-07-18 | 1997-02-12 | 株式会社日立製作所 | ベクトルデ―タ処理装置 |
| US5606677A (en) * | 1992-11-30 | 1997-02-25 | Texas Instruments Incorporated | Packed word pair multiply operation forming output including most significant bits of product and other bits of one input |
| US7254698B2 (en) * | 2003-05-12 | 2007-08-07 | International Business Machines Corporation | Multifunction hexadecimal instructions |
| US7873815B2 (en) * | 2004-03-04 | 2011-01-18 | Qualcomm Incorporated | Digital signal processors with configurable dual-MAC and dual-ALU |
| US8589663B2 (en) * | 2006-06-27 | 2013-11-19 | Intel Corporation | Technique to perform three-source operations |
| US8549264B2 (en) * | 2009-12-22 | 2013-10-01 | Intel Corporation | Add instructions to add three source operands |
| US8583902B2 (en) * | 2010-05-07 | 2013-11-12 | Oracle International Corporation | Instruction support for performing montgomery multiplication |
| WO2013095619A1 (en) * | 2011-12-23 | 2013-06-27 | Intel Corporation | Super multiply add (super madd) instruction with three scalar terms |
-
2014
- 2014-03-28 US US14/229,183 patent/US20150277904A1/en not_active Abandoned
-
2015
- 2015-01-23 JP JP2015011008A patent/JP6092904B2/ja active Active
- 2015-02-16 TW TW104105354A patent/TWI578230B/zh active
- 2015-02-23 DE DE102015002253.9A patent/DE102015002253A1/de not_active Withdrawn
- 2015-02-26 KR KR1020150027626A patent/KR101729829B1/ko not_active Expired - Fee Related
- 2015-02-28 CN CN201510090366.7A patent/CN104951278A/zh active Pending
- 2015-03-17 GB GB1504489.4A patent/GB2526406B/en active Active
-
2017
- 2017-02-09 JP JP2017022453A patent/JP6498226B2/ja active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2017142799A5 (enExample) | ||
| US9395996B2 (en) | Pipelining out-of-order instructions | |
| WO2016100142A3 (en) | Advanced processor architecture | |
| TW200500878A (en) | A method, apparatus, and instruction for performing a sign operation that multiplies | |
| TW200731739A (en) | Cryptography system and elliptic curve operation method involved thereof | |
| BR112017024301A2 (pt) | janela de instruções e buffer de operandos de processador dissociados | |
| US9009450B2 (en) | Mixed operand size instruction processing for execution of indirect addressing load instruction specifying registers for different size operands | |
| US20140215189A1 (en) | Data processing apparatus and method for controlling use of an issue queue | |
| JP5491071B2 (ja) | 命令融合演算装置および命令融合演算方法 | |
| IN2014CN02111A (enExample) | ||
| WO2007095397A3 (en) | Programmable processing unit | |
| JP2016042382A (ja) | 複数のテストソースを用いた論理和テストおよび論理積テスト機能を実現する融合可能な命令と論理 | |
| TW200705266A (en) | System and method wherein conditional instructions unconditionally provide output | |
| RU2016135016A (ru) | Процессоры, способы, системы и команды для сложения трех операндов-источников с плавающей запятой | |
| EP3719638A3 (en) | Apparatuses, methods, and systems for transpose instructions of a matrix operations accelerator | |
| TWI502490B (zh) | 用以處理加法指令之方法、及用以執行加法指令之裝置與系統 | |
| WO2017052811A3 (en) | Secure modular exponentiation processors, methods, systems, and instructions | |
| EP2919112A3 (en) | Packed two source inter-element shift merge processors, methods, systems, and instructions | |
| JP2019525294A5 (enExample) | ||
| BR112017011104A2 (pt) | sistemas, aparelhos e métodos para execução de especulação de dados | |
| JP2013543175A (ja) | 汎用論理演算の方法および装置 | |
| ATE493703T1 (de) | Programmierbare datenverarbeitungsschaltung, die simd-befehle unterstützt | |
| JP2014059870A5 (enExample) | ||
| WO2015017129A4 (en) | Multi-threaded gpu pipeline | |
| BRPI0608750A2 (pt) | método e sistema emitir e processar instruções superescalar e vliw misturadas |