CN104951278A - 用于执行多个乘法操作的方法和装置 - Google Patents

用于执行多个乘法操作的方法和装置 Download PDF

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Publication number
CN104951278A
CN104951278A CN201510090366.7A CN201510090366A CN104951278A CN 104951278 A CN104951278 A CN 104951278A CN 201510090366 A CN201510090366 A CN 201510090366A CN 104951278 A CN104951278 A CN 104951278A
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China
Prior art keywords
instruction
uop
processor
field
execution
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Pending
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CN201510090366.7A
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English (en)
Chinese (zh)
Inventor
R·艾斯帕萨
G·索尔
M·费尔南德斯
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Intel Corp
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Intel Corp
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Publication of CN104951278A publication Critical patent/CN104951278A/zh
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G06F9/30109—Register structure having multiple operands in a single register
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G06F7/53—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G06F9/30014—Arithmetic instructions with variable precision
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G06F9/30038—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations using a mask
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3887—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple data lanes [SIMD]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3893—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Mathematical Analysis (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
  • Complex Calculations (AREA)
CN201510090366.7A 2014-03-28 2015-02-28 用于执行多个乘法操作的方法和装置 Pending CN104951278A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US14/229,183 2014-03-28
US14/229,183 US20150277904A1 (en) 2014-03-28 2014-03-28 Method and apparatus for performing a plurality of multiplication operations

Publications (1)

Publication Number Publication Date
CN104951278A true CN104951278A (zh) 2015-09-30

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CN201510090366.7A Pending CN104951278A (zh) 2014-03-28 2015-02-28 用于执行多个乘法操作的方法和装置

Country Status (7)

Country Link
US (1) US20150277904A1 (enExample)
JP (2) JP6092904B2 (enExample)
KR (1) KR101729829B1 (enExample)
CN (1) CN104951278A (enExample)
DE (1) DE102015002253A1 (enExample)
GB (1) GB2526406B (enExample)
TW (1) TWI578230B (enExample)

Cited By (9)

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CN106951211A (zh) * 2017-03-27 2017-07-14 南京大学 一种可重构定浮点通用乘法器
CN108292220A (zh) * 2015-12-22 2018-07-17 英特尔公司 用于加速图形分析的装置和方法
CN108805797A (zh) * 2017-05-05 2018-11-13 英特尔公司 用于机器学习操作的经优化计算硬件
CN109313556A (zh) * 2016-07-02 2019-02-05 英特尔公司 可中断和可重启矩阵乘法指令、处理器、方法和系统
CN109328333A (zh) * 2016-07-02 2019-02-12 英特尔公司 用于累积式乘积的系统、装置和方法
CN109582365A (zh) * 2017-09-29 2019-04-05 英特尔公司 用于执行紧缩数据元素的双有符号和无符号乘法的装置和方法
CN111539518A (zh) * 2017-04-24 2020-08-14 英特尔公司 用于深度神经网络的计算优化机制
CN113885833A (zh) * 2016-10-20 2022-01-04 英特尔公司 用于经融合的乘加的系统、装置和方法
CN114626973A (zh) * 2017-04-24 2022-06-14 英特尔公司 用于高效卷积的专用固定功能硬件

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US10387988B2 (en) 2016-02-26 2019-08-20 Google Llc Compiler techniques for mapping program code to a high performance, power efficient, programmable image processing hardware platform
GB2548600B (en) * 2016-03-23 2018-05-09 Advanced Risc Mach Ltd Vector predication instruction
US11221849B2 (en) 2017-09-27 2022-01-11 Intel Corporation Instructions for vector multiplication of unsigned words with rounding
US11392379B2 (en) * 2017-09-27 2022-07-19 Intel Corporation Instructions for vector multiplication of signed words with rounding
US10572568B2 (en) * 2018-03-28 2020-02-25 Intel Corporation Accelerator for sparse-dense matrix multiplication
US10459688B1 (en) * 2019-02-06 2019-10-29 Arm Limited Encoding special value in anchored-data element

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US5606677A (en) * 1992-11-30 1997-02-25 Texas Instruments Incorporated Packed word pair multiply operation forming output including most significant bits of product and other bits of one input
US20070300049A1 (en) * 2006-06-27 2007-12-27 Avinash Sodani Technique to perform three-source operations
CN102103486A (zh) * 2009-12-22 2011-06-22 英特尔公司 用于将三个源操作数相加的加法指令

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JP2580371B2 (ja) * 1990-07-18 1997-02-12 株式会社日立製作所 ベクトルデ―タ処理装置
US7254698B2 (en) * 2003-05-12 2007-08-07 International Business Machines Corporation Multifunction hexadecimal instructions
US7873815B2 (en) * 2004-03-04 2011-01-18 Qualcomm Incorporated Digital signal processors with configurable dual-MAC and dual-ALU
US8583902B2 (en) * 2010-05-07 2013-11-12 Oracle International Corporation Instruction support for performing montgomery multiplication
WO2013095619A1 (en) * 2011-12-23 2013-06-27 Intel Corporation Super multiply add (super madd) instruction with three scalar terms

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US5606677A (en) * 1992-11-30 1997-02-25 Texas Instruments Incorporated Packed word pair multiply operation forming output including most significant bits of product and other bits of one input
US20070300049A1 (en) * 2006-06-27 2007-12-27 Avinash Sodani Technique to perform three-source operations
CN102103486A (zh) * 2009-12-22 2011-06-22 英特尔公司 用于将三个源操作数相加的加法指令
US20110153993A1 (en) * 2009-12-22 2011-06-23 Vinodh Gopal Add Instructions to Add Three Source Operands

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HIDEAKI KOBAYASHI: "A Fast Multi-Operand Multiplication Scheme", 《COMPUTER ARITHMETIC (ARITH)，1981 IEEE 5TH SYMPOSIUM ON》 *
INTEL: "IA-64 Application Developer’s Architecture Guide", 《IA-64 APPLICATION DEVELOPER’S ARCHITECTURE GUIDE》 *

Cited By (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108292220B (zh) * 2015-12-22 2024-05-28 英特尔公司 用于加速图形分析的装置和方法
CN108292220A (zh) * 2015-12-22 2018-07-17 英特尔公司 用于加速图形分析的装置和方法
CN109328333B (zh) * 2016-07-02 2023-12-19 英特尔公司 用于累积式乘积的系统、装置和方法
US11698787B2 (en) 2016-07-02 2023-07-11 Intel Corporation Interruptible and restartable matrix multiplication instructions, processors, methods, and systems
CN109328333A (zh) * 2016-07-02 2019-02-12 英特尔公司 用于累积式乘积的系统、装置和方法
US12204898B2 (en) 2016-07-02 2025-01-21 Intel Corporation Interruptible and restartable matrix multiplication instructions, processors, methods, and systems
US12050912B2 (en) 2016-07-02 2024-07-30 Intel Corporation Interruptible and restartable matrix multiplication instructions, processors, methods, and systems
CN109313556B (zh) * 2016-07-02 2024-01-23 英特尔公司 可中断和可重启矩阵乘法指令、处理器、方法和系统
CN109313556A (zh) * 2016-07-02 2019-02-05 英特尔公司 可中断和可重启矩阵乘法指令、处理器、方法和系统
CN113885833A (zh) * 2016-10-20 2022-01-04 英特尔公司 用于经融合的乘加的系统、装置和方法
CN106951211A (zh) * 2017-03-27 2017-07-14 南京大学 一种可重构定浮点通用乘法器
CN106951211B (zh) * 2017-03-27 2019-10-18 南京大学 一种可重构定浮点通用乘法器
CN111539518B (zh) * 2017-04-24 2023-05-23 英特尔公司 用于深度神经网络的计算优化机制
CN114626973A (zh) * 2017-04-24 2022-06-14 英特尔公司 用于高效卷积的专用固定功能硬件
CN111539518A (zh) * 2017-04-24 2020-08-14 英特尔公司 用于深度神经网络的计算优化机制
CN108805797A (zh) * 2017-05-05 2018-11-13 英特尔公司 用于机器学习操作的经优化计算硬件
US12314727B2 (en) 2017-05-05 2025-05-27 Intel Corporation Optimized compute hardware for machine learning operations
CN109582365A (zh) * 2017-09-29 2019-04-05 英特尔公司 用于执行紧缩数据元素的双有符号和无符号乘法的装置和方法

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Publication number Publication date
GB2526406B (en) 2017-01-04
TWI578230B (zh) 2017-04-11
JP6092904B2 (ja) 2017-03-08
US20150277904A1 (en) 2015-10-01
TW201602905A (zh) 2016-01-16
GB201504489D0 (en) 2015-04-29
GB2526406A (en) 2015-11-25
JP6498226B2 (ja) 2019-04-10
JP2015191661A (ja) 2015-11-02
KR101729829B1 (ko) 2017-04-24
KR20150112779A (ko) 2015-10-07
JP2017142799A (ja) 2017-08-17
DE102015002253A1 (de) 2015-10-01

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