JP2017038046A5 - - Google Patents

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Publication number
JP2017038046A5
JP2017038046A5 JP2016149036A JP2016149036A JP2017038046A5 JP 2017038046 A5 JP2017038046 A5 JP 2017038046A5 JP 2016149036 A JP2016149036 A JP 2016149036A JP 2016149036 A JP2016149036 A JP 2016149036A JP 2017038046 A5 JP2017038046 A5 JP 2017038046A5
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JP
Japan
Prior art keywords
substrate
electronic circuit
circuit element
opening
assembly
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2016149036A
Other languages
English (en)
Japanese (ja)
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JP2017038046A (ja
JP6803168B2 (ja
Filing date
Publication date
Priority claimed from US14/964,964 external-priority patent/US10206288B2/en
Application filed filed Critical
Publication of JP2017038046A publication Critical patent/JP2017038046A/ja
Publication of JP2017038046A5 publication Critical patent/JP2017038046A5/ja
Application granted granted Critical
Publication of JP6803168B2 publication Critical patent/JP6803168B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2016149036A 2015-08-13 2016-07-28 可撓性基板の上にある印刷された構成要素とのベアダイの集積化 Active JP6803168B2 (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201562204706P 2015-08-13 2015-08-13
US62/204,706 2015-08-13
US14/964,964 US10206288B2 (en) 2015-08-13 2015-12-10 Bare die integration with printed components on flexible substrate
US14/964,964 2015-12-10

Publications (3)

Publication Number Publication Date
JP2017038046A JP2017038046A (ja) 2017-02-16
JP2017038046A5 true JP2017038046A5 (enExample) 2019-09-12
JP6803168B2 JP6803168B2 (ja) 2020-12-23

Family

ID=56787268

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016149036A Active JP6803168B2 (ja) 2015-08-13 2016-07-28 可撓性基板の上にある印刷された構成要素とのベアダイの集積化

Country Status (3)

Country Link
US (1) US10206288B2 (enExample)
EP (1) EP3131114B1 (enExample)
JP (1) JP6803168B2 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10206288B2 (en) * 2015-08-13 2019-02-12 Palo Alto Research Center Incorporated Bare die integration with printed components on flexible substrate
US10165677B2 (en) 2015-12-10 2018-12-25 Palo Alto Research Center Incorporated Bare die integration with printed components on flexible substrate without laser cut
JP7203037B2 (ja) 2017-03-31 2023-01-12 スリーエム イノベイティブ プロパティズ カンパニー 固体半導体ダイを含む電子機器
US10847384B2 (en) 2017-05-31 2020-11-24 Palo Alto Research Center Incorporated Method and fixture for chip attachment to physical objects
US10795452B2 (en) 2018-02-07 2020-10-06 Microsoft Technology Licensing, Llc Multi-stage cure bare die light emitting diode
CN113130330B (zh) * 2021-03-17 2024-05-24 浙江臻镭科技股份有限公司 新型芯片表面贴装结构及其制备方法

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US4658330A (en) * 1985-09-09 1987-04-14 Tektronix, Inc. Mounting a hybrid circuit to a circuit board
JPH0821672B2 (ja) * 1987-07-04 1996-03-04 株式会社堀場製作所 イオン濃度測定用シート型電極の製造方法
KR100437437B1 (ko) 1994-03-18 2004-06-25 히다치 가세고교 가부시끼가이샤 반도체 패키지의 제조법 및 반도체 패키지
JPH11238956A (ja) * 1998-02-23 1999-08-31 Omron Corp 電子部品の実装構造、並びに、電磁波読み取り可能なicシート
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US7208345B2 (en) 2005-05-11 2007-04-24 Infineon Technologies Ag Method of manufacturing a semiconductor device comprising stacked chips and a corresponding semiconductor device
JP4538416B2 (ja) 2006-02-03 2010-09-08 株式会社日立メディアエレクトロニクス 光ピックアップ装置、その製造方法及び光ドライブ装置
US9681550B2 (en) * 2007-08-28 2017-06-13 Joseph C. Fjelstad Method of making a circuit subassembly
KR20100009896A (ko) 2008-07-21 2010-01-29 삼성전자주식회사 반도체 소자 패키지 및 그 제조 방법
JP2010251376A (ja) * 2009-04-10 2010-11-04 Sumitomo Electric Printed Circuit Inc 配線体,その製造方法および電子機器
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TWI461127B (zh) * 2012-12-25 2014-11-11 Univ Nat Taipei Technology 電子裝置及其製法
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US9396972B2 (en) 2014-02-11 2016-07-19 Palo Alto Research Center Incorporated Micro-assembly with planarized embedded microelectronic dies
US10206288B2 (en) * 2015-08-13 2019-02-12 Palo Alto Research Center Incorporated Bare die integration with printed components on flexible substrate
US10165677B2 (en) * 2015-12-10 2018-12-25 Palo Alto Research Center Incorporated Bare die integration with printed components on flexible substrate without laser cut

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