JP2016511933A5 - - Google Patents
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- Publication number
- JP2016511933A5 JP2016511933A5 JP2015552832A JP2015552832A JP2016511933A5 JP 2016511933 A5 JP2016511933 A5 JP 2016511933A5 JP 2015552832 A JP2015552832 A JP 2015552832A JP 2015552832 A JP2015552832 A JP 2015552832A JP 2016511933 A5 JP2016511933 A5 JP 2016511933A5
- Authority
- JP
- Japan
- Prior art keywords
- well
- pmos transistor
- high voltage
- mode
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000009977 dual effect Effects 0.000 description 22
- 230000015654 memory Effects 0.000 description 20
- 238000000034 method Methods 0.000 description 9
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000004044 response Effects 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 239000000969 carrier Substances 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000003071 parasitic effect Effects 0.000 description 2
- 230000002265 prevention Effects 0.000 description 2
- 238000004891 communication Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/742,964 US8787096B1 (en) | 2013-01-16 | 2013-01-16 | N-well switching circuit |
| US13/742,964 | 2013-01-16 | ||
| PCT/US2014/011138 WO2014113295A1 (en) | 2013-01-16 | 2014-01-10 | N-well switching circuit |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2016511933A JP2016511933A (ja) | 2016-04-21 |
| JP2016511933A5 true JP2016511933A5 (enExample) | 2017-01-19 |
| JP6092427B2 JP6092427B2 (ja) | 2017-03-08 |
Family
ID=50031588
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2015552832A Expired - Fee Related JP6092427B2 (ja) | 2013-01-16 | 2014-01-10 | nウェル切替回路 |
Country Status (6)
| Country | Link |
|---|---|
| US (2) | US8787096B1 (enExample) |
| EP (1) | EP2946474B1 (enExample) |
| JP (1) | JP6092427B2 (enExample) |
| KR (1) | KR101557812B1 (enExample) |
| CN (1) | CN104937848B (enExample) |
| WO (1) | WO2014113295A1 (enExample) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8787096B1 (en) | 2013-01-16 | 2014-07-22 | Qualcomm Incorporated | N-well switching circuit |
| US9082498B2 (en) * | 2013-08-08 | 2015-07-14 | Qualcomm Incorporated | N-well switching circuit |
| TWI739734B (zh) | 2015-02-23 | 2021-09-21 | 紐西蘭商藍瑟科技紐西蘭有限公司 | 用於將甲烷轉化為產物之重組產醋酸細菌 |
| CN105049029B (zh) * | 2015-07-06 | 2018-05-04 | 上海巨微集成电路有限公司 | 一种pmos管衬底切换电路 |
| JP6905518B2 (ja) | 2015-10-13 | 2021-07-21 | ランザテク・ニュージーランド・リミテッド | エネルギー発生発酵経路を含む遺伝子操作細菌 |
| KR20180127632A (ko) | 2015-12-03 | 2018-11-29 | 란자테크 뉴질랜드 리미티드 | 가스 발효 아세토젠에서의 효율을 개선하기 위한 아르기닌 보충 |
| KR20180118651A (ko) | 2016-02-01 | 2018-10-31 | 란자테크 뉴질랜드 리미티드 | 통합형 발효 및 전해 공정 |
| EP3420089B1 (en) | 2016-02-26 | 2021-12-29 | LanzaTech NZ, Inc. | Crispr/cas systems for c-1 fixing bacteria |
| US9570192B1 (en) | 2016-03-04 | 2017-02-14 | Qualcomm Incorporated | System and method for reducing programming voltage stress on memory cell devices |
| AU2019218389B2 (en) | 2018-02-12 | 2024-09-05 | Lanzatech, Inc. | A process for improving carbon conversion efficiency |
| AU2019257224B2 (en) | 2018-04-20 | 2024-12-19 | Lanzatech, Inc. | Intermittent electrolysis streams |
| CN113225056A (zh) * | 2021-05-21 | 2021-08-06 | 上海韦尔半导体股份有限公司 | 一种控制电路、电路控制方法及电子产品 |
| US12212315B1 (en) * | 2023-01-04 | 2025-01-28 | Cadence Design Systems, Inc. | Interface device |
Family Cites Families (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4670668A (en) | 1985-05-09 | 1987-06-02 | Advanced Micro Devices, Inc. | Substrate bias generator with power supply control means to sequence application of bias and power to prevent CMOS SCR latch-up |
| KR0169157B1 (ko) * | 1993-11-29 | 1999-02-01 | 기다오까 다까시 | 반도체 회로 및 mos-dram |
| JP3264622B2 (ja) | 1996-07-16 | 2002-03-11 | 株式会社東芝 | 半導体装置 |
| US5844425A (en) | 1996-07-19 | 1998-12-01 | Quality Semiconductor, Inc. | CMOS tristate output buffer with having overvoltage protection and increased stability against bus voltage variations |
| JP4105833B2 (ja) * | 1998-09-09 | 2008-06-25 | 株式会社ルネサステクノロジ | 半導体集積回路装置 |
| TW453032B (en) * | 1998-09-09 | 2001-09-01 | Hitachi Ltd | Semiconductor integrated circuit apparatus |
| US6452858B1 (en) * | 1999-11-05 | 2002-09-17 | Hitachi, Ltd. | Semiconductor device |
| US6377112B1 (en) | 2000-12-05 | 2002-04-23 | Semiconductor Components Industries Llc | Circuit and method for PMOS device N-well bias control |
| US6573134B2 (en) * | 2001-03-27 | 2003-06-03 | Sharp Laboratories Of America, Inc. | Dual metal gate CMOS devices and method for making the same |
| US7218151B1 (en) * | 2002-06-28 | 2007-05-15 | University Of Rochester | Domino logic with variable threshold voltage keeper |
| US6882188B1 (en) * | 2003-09-30 | 2005-04-19 | Faraday Technology Corp. | Input/output buffer |
| US7038274B2 (en) * | 2003-11-13 | 2006-05-02 | Volterra Semiconductor Corporation | Switching regulator with high-side p-type device |
| US7046493B2 (en) * | 2003-12-12 | 2006-05-16 | Faraday Technology Corp. | Input/output buffer protection circuit |
| KR100728950B1 (ko) * | 2004-03-11 | 2007-06-15 | 주식회사 하이닉스반도체 | 내부전압 발생장치 |
| FR2894373B1 (fr) * | 2005-12-07 | 2008-01-04 | Atmel Corp | Cellule anti-fusible autonome |
| US7355437B2 (en) * | 2006-03-06 | 2008-04-08 | Altera Corporation | Latch-up prevention circuitry for integrated circuits with transistor body biasing |
| US7330049B2 (en) * | 2006-03-06 | 2008-02-12 | Altera Corporation | Adjustable transistor body bias generation circuitry with latch-up prevention |
| TWI451697B (zh) * | 2006-05-03 | 2014-09-01 | Synopsys Inc | 極低功率類比補償電路 |
| US7863962B2 (en) * | 2008-04-17 | 2011-01-04 | National Semiconductor Corporation | High voltage CMOS output buffer constructed from low voltage CMOS transistors |
| US7800179B2 (en) * | 2009-02-04 | 2010-09-21 | Fairchild Semiconductor Corporation | High speed, low power consumption, isolated analog CMOS unit |
| CN101997305B (zh) | 2009-08-26 | 2013-04-10 | 安凯(广州)微电子技术有限公司 | 一种反向电压保护电路及功率管装置 |
| US8787096B1 (en) | 2013-01-16 | 2014-07-22 | Qualcomm Incorporated | N-well switching circuit |
-
2013
- 2013-01-16 US US13/742,964 patent/US8787096B1/en active Active
-
2014
- 2014-01-10 JP JP2015552832A patent/JP6092427B2/ja not_active Expired - Fee Related
- 2014-01-10 EP EP14702369.1A patent/EP2946474B1/en not_active Not-in-force
- 2014-01-10 WO PCT/US2014/011138 patent/WO2014113295A1/en not_active Ceased
- 2014-01-10 KR KR1020157021577A patent/KR101557812B1/ko not_active Expired - Fee Related
- 2014-01-10 CN CN201480004776.9A patent/CN104937848B/zh active Active
- 2014-08-29 US US14/472,953 patent/US9252765B2/en active Active
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