JP2016178196A - 半導体装置及びその製造方法 - Google Patents

半導体装置及びその製造方法 Download PDF

Info

Publication number
JP2016178196A
JP2016178196A JP2015056981A JP2015056981A JP2016178196A JP 2016178196 A JP2016178196 A JP 2016178196A JP 2015056981 A JP2015056981 A JP 2015056981A JP 2015056981 A JP2015056981 A JP 2015056981A JP 2016178196 A JP2016178196 A JP 2016178196A
Authority
JP
Japan
Prior art keywords
semiconductor chip
wiring board
semiconductor device
semiconductor
resin member
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2015056981A
Other languages
English (en)
Inventor
真也 清水
Shinya Shimizu
真也 清水
美佳 桐谷
Miyoshi Kiritani
美佳 桐谷
健 村松
Takeshi Muramatsu
健 村松
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2015056981A priority Critical patent/JP2016178196A/ja
Priority to US15/061,965 priority patent/US20160276312A1/en
Publication of JP2016178196A publication Critical patent/JP2016178196A/ja
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657—Stacked arrangements of devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49575—Assemblies of semiconductor devices on lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/30—Structure, shape, material or disposition of the layer connectors prior to the connecting process of a plurality of layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • H01L24/92—Specific sequence of method steps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05553—Shape in top view being rectangular
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/061—Disposition
    • H01L2224/0612—Layout
    • H01L2224/0613—Square or rectangular array
    • H01L2224/06134—Square or rectangular array covering only portions of the surface to be connected
    • H01L2224/06135—Covering only the peripheral area of the surface to be connected, i.e. peripheral arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/273—Manufacturing methods by local deposition of the material of the layer connector
    • H01L2224/2733—Manufacturing methods by local deposition of the material of the layer connector in solid form
    • H01L2224/27334—Manufacturing methods by local deposition of the material of the layer connector in solid form using preformed layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29005—Structure
    • H01L2224/29007—Layer connector smaller than the underlying bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/2901—Shape
    • H01L2224/29012—Shape in top view
    • H01L2224/29013—Shape in top view being rectangular or square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/2901—Shape
    • H01L2224/29012—Shape in top view
    • H01L2224/29014—Shape in top view being circular or elliptic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29075—Plural core members
    • H01L2224/29078—Plural core members being disposed next to each other, e.g. side-to-side arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29075—Plural core members
    • H01L2224/2908—Plural core members being stacked
    • H01L2224/29082—Two-layer arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H01L2224/29191—The principal constituent being an elastomer, e.g. silicones, isoprene, neoprene
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/30—Structure, shape, material or disposition of the layer connectors prior to the connecting process of a plurality of layer connectors
    • H01L2224/301—Disposition
    • H01L2224/3012—Layout
    • H01L2224/3015—Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry
    • H01L2224/30151—Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry being uniform, i.e. having a uniform pitch across the array
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3201—Structure
    • H01L2224/32012—Structure relative to the bonding area, e.g. bond pad
    • H01L2224/32014—Structure relative to the bonding area, e.g. bond pad the layer connector being smaller than the bonding area, e.g. bond pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3205—Shape
    • H01L2224/32052—Shape in top view
    • H01L2224/32054—Shape in top view being rectangular or square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3205—Shape
    • H01L2224/32052—Shape in top view
    • H01L2224/32055—Shape in top view being circular or elliptic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • H01L2224/3301—Structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45147—Copper (Cu) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48145—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/4905—Shape
    • H01L2224/49051—Connectors having different shapes
    • H01L2224/49052—Different loop heights
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73215—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83007—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a permanent auxiliary member being left in the finished device, e.g. aids for holding or protecting the layer connector during or after the bonding process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8312—Aligning
    • H01L2224/83136—Aligning involving guiding structures, e.g. spacers or supporting members
    • H01L2224/83138—Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
    • H01L2224/8314—Guiding structures outside the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83193—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
    • H01L2224/83856—Pre-cured adhesive, i.e. B-stage adhesive
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
    • H01L2224/83862—Heat curing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85007—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector involving a permanent auxiliary member being left in the finished device, e.g. aids for holding or protecting the wire connector during or after the bonding process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/921—Connecting a surface with connectors of different types
    • H01L2224/9212—Sequential connecting processes
    • H01L2224/92162—Sequential connecting processes the first connecting process involving a wire connector
    • H01L2224/92165—Sequential connecting processes the first connecting process involving a wire connector the second connecting process involving a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222—Sequential connecting processes
    • H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06506—Wire or wire-like electrical connections between devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/0651—Wire or wire-like electrical connections from device to substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06555—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
    • H01L2225/06562—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking at least one device in the stack being rotated or offset
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06575—Auxiliary carrier between devices, the carrier having no electrical connection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49589—Capacitor integral with or on the leadframe
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H01L2924/141—Analog devices
    • H01L2924/142—HF devices
    • H01L2924/1421—RF devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H01L2924/143—Digital devices
    • H01L2924/1431—Logic devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H01L2924/143—Digital devices
    • H01L2924/1434—Memory
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H01L2924/143—Digital devices
    • H01L2924/1434—Memory
    • H01L2924/1435—Random access memory [RAM]
    • H01L2924/1438—Flash memory
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15313—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a land array, e.g. LGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/157—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19042—Component type being an inductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19043—Component type being a resistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19102—Disposition of discrete passive components in a stacked assembly with the semiconductor or solid state device
    • H01L2924/19103—Disposition of discrete passive components in a stacked assembly with the semiconductor or solid state device interposed between the semiconductor or solid-state device and the die mounting substrate, i.e. chip-on-passive
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

Abstract

【課題】高信頼性な半導体装置及びその製造方法を提供する。
【解決手段】本実施形態に係る半導体装置は、配線基板と、前記配線基板上に配置された
第一半導体チップと、前記配線基板上に、前記配線基板に垂直な方向からの平面視におい
て、前記第一半導体チップと重ならない領域に配置された支持部材と、前記第一半導体チ
ップ上に配置された樹脂部材と、前記支持部材と前記樹脂部材上に配置された第二半導体
チップと、を有する。本実施形態に係る半導体装置の製造方法は、配線基板上の第一領域
に第一半導体チップを配置し、前記配線基板上の第二領域に支持部材を配置し、前記第一
半導体チップ上の少なくとも一部に樹脂部材を配置し、前記支持部材と前記樹脂部材上に
第二半導体チップを配置する。
【選択図】図３

Description

本実施形態は半導体装置及びその製造方法に関する。
１つの半導体パッケージ内に複数の半導体チップが封止された半導体装置が実用化され
ている。
米国特許第８８９６１１１号明細書 特開２０１４−１８７２２１号公報
高機能で高信頼性な半導体装置及びその製造方法を提供する。
本実施形態に係る半導体装置は、配線基板と、前記配線基板上に配置された第一半導体
チップと、前記配線基板上に、前記配線基板に垂直な方向からの平面視において、前記第
一半導体チップと重ならない領域に配置された支持部材と、前記第一半導体チップ上に配
置された樹脂部材と、前記支持部材と前記樹脂部材上に配置された第二半導体チップと、
を有する。
第一実施形態に係る半導体装置の平面図（その１） 第一実施形態に係る半導体装置の平面図（その２） 図１及び図２におけるＡ−Ａ’線に沿った断面図を示した図 第一実施形態に係る半導体装置の製造方法の途中工程を示した断面図（その１） 第一実施形態に係る半導体装置の製造方法の途中工程を示した断面図（その２） 第一実施形態に係る半導体装置の製造方法の途中工程を示した断面図（その３） 第二実施形態に係る半導体装置の平面図 第三実施形態に係る半導体装置の平面図
以下、第一実施形態について図面を参照して説明する。なお、各図面において、同様の
構成要素については同一の符号を付して詳細な説明は適宜省略する。
また、便宜的に配線基板１０に直交する方向を第一方向と称する。特に断らずに面積と
表現する場合、上から見た面積を意味する。
（第一実施形態）
第一実施形態に係る半導体装置を図１〜図３を用いて説明する。なお、図１及び図２は
、便宜的に封止樹脂層９０は省略して記載されている。図３は、便宜的に封止樹脂層９０
は透明として記載されている。
まず、図３を用いて半導体装置５の断面について説明する。
図３に示す半導体装置５は、配線基板１０を備えている。配線基板１０は、例えば表面
や内部に配線層（図示しない）を設けた絶縁樹脂配線基板やセラミックス配線基板などで
ある。具体的には、例えば、ガラスーエポキシ樹脂を使用したプリント配線板等が用いら
れる。または、シリコンインターポーザやリードフレーム等を用いてもよい。
配線基板１０は、第一の表面１０ａと第二の表面１０ｂを備える。第一の表面１０ａに
は、ＢＧＡパッケージ用の外部端子（半田ボール等による突起状端子）やＬＧＡパッケー
ジ用の外部端子（金属メッキ等による金属ランド、図示せず）が形成される。
配線基板１０の第二の表面１０ｂには、スペーサー（支持部材）２０、第一半導体チッ
プ３０、回路素子４０が配置される。
スペーサー２０は、第二半導体チップ７０ａ〜７０ｈを保持する。スペーサー２０によ
り、第二半導体チップ７０ａ〜７０ｈは配線基板１０から離隔した位置に支持される。ス
ペーサー２０は、例えば、シリコン等の固体状態の部材を用いる。
第一半導体チップ３０は、例えば、外部機器との間で信号を送受信するメモリコントロ
ーラーチップである。その他に、インターフェースチップ、ロジックチップ、ＲＦチップ
等のシステムＬＳＩチップ等を用いても良い。また、第一半導体チップ３０は、複数枚で
あってもよい。
第一半導体チップ３０には、第一半導体チップ３０と外部を接続するための第一電極パ
ッド１０５が設けられている。第一電極パッド１０５には、第一ボンディングワイヤ５０
の一端が接続されている。第一ボンディングワイヤ５０の他端は配線基板１０の電極１０
０に接続される。すなわち、第一半導体チップ３０は、第一ボンディングワイヤ５０を介
して配線基板１０に電気的に接続される。第一ボンディングワイヤ５０は、例えばＡｕワ
イヤやＣｕワイヤ等の金属ワイヤを用いる。
なお、第一半導体チップ３０は、第一ボンディングワイヤ５０の代わりに、第一半導体
チップ３０に設けられた貫通電極とその表面に設けられたバンプ電極を介して、配線基板
１０に電気的に接続しても良い。
回路素子４０は、例えば抵抗、コイル、キャパシタ等である。例えば、回路素子４０と
して用いるキャパシタは、半導体装置５、第一半導体チップ３０、後述する第二半導体チ
ップ７０ａ〜７０ｈ等の電源電圧を安定化させる。または、キャパシタに蓄えた電荷で、
停電時に一時的に半導体装置５等の動作を継続させる。または、キャパシタは、第二半導
体チップ７０ａ〜７０ｈ間のタイミング調整を行う。回路素子４０は、その接続端子（図
示せず）に、半田や導電性接着材料を設けることにより、配線基板１０に固定され、また
電気的に接続される。
第一半導体チップ３０上の一部の領域には、樹脂部材６０が設けられる。樹脂部材６０
は、例えば熱硬化性樹脂を用いる。より具体的には、シリコーン樹脂、アクリル樹脂、エ
ポキシ樹脂を用いる。
スペーサー２０及び樹脂部材６０上には、複数の第二半導体チップ７０ａ〜７０ｈが設
けられる。以下、第二半導体チップ７０ａ〜７０ｈの区別を要さない場合、単に第二半導
体チップ７０と呼ぶ。第二半導体チップ７０ａ〜７０ｈのうち、一番下側に配置されてい
る第二半導体チップが第二半導体チップ７０ａである。その上方には、順に７０ｂ、７０
ｃ、７０ｄ、７０ｅ、７０ｆ、７０ｇ、７０ｈが順に階段状に配置される。別の言い方を
すれば、それぞれの第二半導体チップ７０の上面の一部は、他の第二半導体チップ７０に
覆われない。さらに、別の言い方をすれば、それぞれの第二半導体チップ７０の上面の一
部は、封止樹脂層９０に接して配置される。 第二半導体チップ７０は、例えばＮＡＮＤ
型フラッシュメモリのような半導体メモリチップが挙げられるが、これに限られず、任意
の半導体チップを用いてよい。また、第二半導体チップ７０として、８枚を積層した構造
を記載したが、１枚以上の任意の枚数で構わない。
第二半導体チップ７０ａ〜７０ｈは、第二電極パッド１１０ａ〜１１０ｈを含む。以下
、第二電極パッド１１０ａ〜１１０ｈの区別を要さない場合、単に第二電極パッド１１０
と呼ぶ。第二電極パッド１１０は、第二半導体チップ上面の一部に配置される。
なお、第二電極パッド１１０が設けられる領域の少なくとも一部は、スペーサー２０と
重なる領域に設けられる。言い換えれば、第一方向に直交する平面にスペーサー２０及び
第二電極パッド１１０を第一方向に投影すると、両者は重なって設けられる。
第二電極パッド１１０には、第二ボンディングワイヤ８０が接続される。また、第二ボ
ンディングワイヤ８０は、配線基板１０上に設けられた電極１００に接続する。すなわち
、第二ボンディングワイヤ８０を介して、第二半導体チップ７０は配線基板１０に電気的
に接続する。第二ボンディングワイヤ８０は、例えばＡｕワイヤやＣｕワイヤ等の金属ワ
イヤが用いられる。
封止樹脂層９０が、第一半導体チップ３０、第二半導体チップ７０、回路素子４０、樹
脂部材６０、第一ボンディングワイヤ５０、第二ボンディングワイヤ８０等を一体として
封止して設けられる。
図１及び図２を用いて平面図について説明する。図２では、第二半導体チップ７０の下
方の構造を説明するため、第二半導体チップ７０を省略し、説明の便宜上、その輪郭を点
線として記載している。
図１に示されるように、第二半導体チップ７０は階段状に積層されて配置される。それ
ぞれの第二半導体チップ７０には、第二電極パッド１１０が設けられる。前述の通り、第
二ボンディングワイヤ８０が、第二電極パッド１１０及び電極１００に電気的に接続する
。第二ボンディングワイヤ８０の第二電極パッド１１０への接続は、例えばボールボンデ
ィングで形成される。また、第二ボンディングワイヤ８０の電極１００への接続は、例え
ばステッチボンディングで形成される。
なお、図１では第二半導体チップ７０のサイズをほぼ等サイズに記載したが、これに限
られない。例えば、第二半導体チップ７０ｈのサイズをその下方に存在する第二半導体チ
ップ７０ａ〜７０ｇよりも小さくすると、階段状に積層した時の物理的な安定性を良くす
ることも可能である。逆に、下方の第二半導体チップ７０ａのサイズをその上方に存在す
る第二半導体チップ７０ｂ〜７０ｈよりも小さくすると、回路素子４０等の他の部品を配
線基板１０上への実装が容易となる。
続いて、第二半導体チップ７０の下方の構造を図２を用いて説明する。
配線基板１０上に、スペーサー２０、第一半導体チップ３０、回路素子４０が配置され
る。それらは、上方からの平面視において、それぞれ重ならないように配置される。言い
換えれば、第一方向に直交する平面にスペーサー２０、第一半導体チップ３０、回路素子
４０を第一方向に投影すると、これらは重ならずに配置される。さらに別の言い方をすれ
ば、配線基板１０に、スペーサー２０、第一半導体チップ３０、回路素子４０を第一方向
に投影すると、スペーサー２０は第一の領域、第一半導体チップ３０は第二の領域、回路
素子４０は第三の領域に投影される。ただし、第一の領域、第二領域、第三の領域は互い
に異なる領域である。
第一半導体チップ３０の直上領域の一部には、樹脂部材６０が略長円状に配置される。
また、樹脂部材６０は、第二半導体チップ７０ａの直下領域の一部に形成される。言い換
えれば、第一方向に直交する平面に第一半導体チップ３０、第二半導体チップ７０ａ、樹
脂部材６０を第一方向に投影した場合、第一半導体チップ３０の一部に樹脂部材６０が重
なり、第二半導体チップ７０ａの一部に樹脂部材６０が重なる。
また、スペーサー２０、第一半導体チップ３０、回路素子４０、樹脂部材６０の上方に
第二半導体チップ７０が設けられている。言い換えれば、第二半導体チップ７０は、スペ
ーサー２０、第一半導体チップ３０、回路素子４０、樹脂部材６０に上方からの平面視で
重なる領域に配置される。そして、第二半導体チップ７０は、スペーサー２０、第一半導
体チップ３０、回路素子４０の何れよりも大きな面積を有している。
第一半導体チップ３０の第一電極パッド１０５には、前述の通り第一ボンディングワイ
ヤ５０の一端が、例えばボールボンディングで接続される。第一ボンディングワイヤ５０
の他端は、配線基板１０に設けられた電極１００に、例えばステッチボンディングで接続
される。
（第一実施形態の製造方法）
第一実施形態の製造方法について図４から図６を用いて説明する。まず、図４に示すよ
うに、配線基板１０に各種の部材が接着されるまでを説明する。
まず、回路素子４０が配線基板１０に接着される。具体的には、半田や導電性の接着剤
が配線基板１０に塗布される。回路素子４０の電極部分を接着材上に配置した後、加熱に
より回路素子４０は配線基板１０に接着される。
次に、スペーサー２０の接着を、例えば以下の方法により行う。ＤＡＦ（Die Attach F
ilm)が、スペーサー２０の一つの面に接着される。ＤＡＦを接着した面を下向きとして配
線基板１０上に、スペーサー２０は配置される。その後、加熱することで、ＤＡＦが硬化
し、スペーサー２０は接着される。
なお、この加熱による硬化は完全に硬化させず半硬化状態でも構わない。この場合は、
ＤＡＦによる第一半導体チップ３０、第二半導体チップ７０等の半硬化状態による接着の
後に再度加熱することで、硬化させればよい。
第一半導体チップ３０は、スペーサー２０と同様に配線基板１０上に接着される。すな
わち、第一半導体チップ３０にＤＡＦを接着し、第一半導体チップ３０を配線基板１０上
に配置し、加熱することで、第一半導体チップ３０は配線基板１０上に接着される。
第一半導体チップ３０を配置後、第一ボンディングワイヤ５０が第一半導体チップ３０
及び配線基板１０と接続して形成される。ボンディングの順番は、ノーマルボンディング
、リバースボンディング等の何れの方法でも良く、またそれぞれのボンディングもステッ
チボンディング、ボールボンディング等各種の方法を用いて構わない。
以上により、図４に示す状態となる。
図５に示すように、第一半導体チップ３０上の一部の領域に、樹脂部材６０が塗布され
る。樹脂部材６０の一番高い高さはスペーサー２０の高さよりも高いことが望ましい。こ
こで、樹脂部材６０は、液体状の樹脂であって、例えば、シリコーン樹脂、アクリル樹脂
、エポキシ樹脂等の熱硬化樹脂を用いる。樹脂部材６０は塗布された後、樹脂部材６０が
広がらずに、第一半導体チップ３０の側面や配線基板１０に流れない程度の粘性をもって
いるほうが望ましい。ただし、樹脂部材６０は、少なくとも第二半導体チップ７０を接着
するまでは完全に硬化した状態でないことが望ましい。
図６に示すように、スペーサー２０及び樹脂部材６０上に、第二半導体チップ７０ａが
接着される。第二半導体チップ７０ａの下側に配置する面にＤＡＦが接着された後、第二
半導体チップ７０ａは、樹脂部材６０及びスペーサー２０上に配置される。その後、加熱
することで、第二半導体チップ７０ａは接着される。
スペーサー２０はシリコン等の固体である。そのため、第二半導体チップ７０ａを接着
する際に、スペーサー２０はその高さをほぼ変えずに第二半導体チップ７０ａを支える。
スペーサー２０の上面と第二半導体チップ７０ａの下面が密着する。したがって、第二半
導体チップ７０ａの下面の高さはスペーサー２０の上面の高さとほぼ同じ高さとなる。
他方、樹脂部材６０は粘性をもつため、第二半導体チップ７０ａに押されて変形するこ
とになる。そして、第二半導体チップ７０ａの下面の高さはスペーサー２０の上面とほぼ
同じ高さになるため、樹脂部材６０の上面における高さはスペーサー２０の上面の高さと
ほぼ同じ高さに自己整合的（セルフアライン的）に調整される。したがって、樹脂部材６
０の高さは、第二半導体チップ７０ａの下面の高さとほぼ同じ高さとなる。
図６に示すように、第二半導体チップ７０ａの重心７５はスペーサー２０の直上の領域
にない。つまり、第二半導体チップ７０ａはスペーサー２０のみで支えることができない
。したがって、樹脂部材６０は、少なくとも半硬化の状態では、第二半導体チップ７０ａ
を支えることが可能な程度の適度な粘性があるほうが望ましい。具体的には、半硬化の状
態で少なくとも50~1000Pa・sの粘度が望ましい。
なお、樹脂部材６０は未硬化の状態では、第二半導体チップ７０ａを支えることができ
なくても構わない。例えば、第二半導体チップ７０ａをスペーサー２０及び樹脂部材６０
上に装置のアーム等で保持しながら、半導体装置５を加熱すればよい。また、仮に、重心
７５がスペーサー２０の直上の領域にある場合は、第二半導体チップ７０ａは、スペーサ
ー２０に支えられるため、必ずしも高い粘性は必要ない。
図３に示すように、第二半導体チップ７０ｂが、第二半導体チップ７０ａの上方に配置
される。例えば、第二半導体チップ７０ｂは、その下面にＤＡＦを予め接着しておき、第
二半導体チップ７０ａの上方に配置して、過熱することで接着される。
第二半導体チップ７０ｃ〜７０ｈも、第二半導体チップ７０ｂと同様に接着される。第
二半導体チップ７０ｈまでの接着が終わった後に、加熱を行う。加熱により、ＤＡＦ及び
樹脂部材６０は完全に硬化する。
第二半導体チップ７０の配置後、第二半導体チップ７０及び電極１００に接続して、第
二ボンディングワイヤ８０が形成される。ボンディングの順番は、ノーマルボンディング
、リバースボンディング等の何れの方法でも良く、またそれぞれのボンディングもステッ
チボンディング、ボールボンディング等各種の方法を用いて構わない。
その後、封止樹脂層９０が形成される。これは、例えば半導体装置５を型に入れたのち
、型に樹脂を流し込み、その後に硬化させることで形成する。なお、封止樹脂層９０は、
先に樹脂を入れた型に、半導体装置５を導入し、樹脂を硬化させることで形成してもよい
。すなわち、封止樹脂層９０はいわゆる圧縮成型法でも形成してもよい。圧縮成型法の場
合は、樹脂を流動させないため、第一ボンディングワイヤ５０、第二ボンディングワイヤ
８０の変形をさらに防ぐことができる。
（第一実施形態の効果）
本実施形態によれば、第二半導体チップ７０ａは、スペーサー２０及び樹脂部材６０上
に配置される。スペーサー２０は固体であるため、第二半導体チップ７０ａの下面は、ス
ペーサー２０の上面により支えられる。他方、第二半導体チップ７０ａの配置時には、樹
脂部材６０は未硬化の状態であるため、第二半導体チップ７０ａの下面に合わせて、樹脂
部材６０は形状を変化させる。そして、樹脂部材６０は変形したうえで、スペーサー２０
の高さに合わせて第二半導体チップ７０ａを支持することができる。
つまり、樹脂部材６０は変形するため、第一半導体チップ３０上に、スペーサー２０の
高さと第一半導体チップ３０の高さの差にあった部材を用意しなくとも、第一半導体チッ
プ３０上の樹脂部材６０を介して、第二半導体チップ７０ａを支持することが可能である
。特に、第一半導体チップ３０はその高さに製造上のばらつきがある。このばらつきの影
響を受けずに、本実施形態の半導体装置５は製造可能である。
本実施形態によれば、スペーサー２０と第一半導体チップ３０上に配置された樹脂部材
６０とにより第二半導体チップ７０を支えることが可能である。すなわち、スペーサー２
０の他に、配線基板１０上に別のスペーサーを配置する必要がない。余計なスペーサーを
配置しなくてよいため、半導体装置５の小型化が可能である。また、余計なスペーサーが
ないことで、封止樹脂層９０形成時に樹脂の流れを妨げるものが少なく、樹脂を流し込む
ことが容易に行うことができる。さらには、第一半導体チップ３０の面積を大きくとるこ
とも可能であり、高性能化が可能である。
また、本実施形態によれば、第二半導体チップ７０は、スペーサー２０、第一半導体チ
ップ３０、回路素子４０の何れよりも大きな面積を有している。そこで、スペーサー２０
、第一半導体チップ３０、回路素子４０、第一ボンディングワイヤ５０を、第二半導体チ
ップ７０と第一方向で射影して重なる領域に配置することで、半導体装置５の小型化が可
能である。
また、回路素子４０が第二半導体チップ７０と重なる領域に封止されることで、半導体
装置５の外部に回路素子を別に設ける場合に比べて、回路素子と半導体装置５を合わせた
面積を小さくすることができる。
さらに、本実施形態によれば、第一の方向に直交した平面に射影した第二電極パッド１
１０及びスペーサー２０は重なる領域に配置されている。この配置により、上述の第二ボ
ンディングワイヤ８０のボンディング時にかかる圧力をスペーサーで直接支えることがで
き、第二ボンディングワイヤ８０のボンディングを安定的に行うことができる。
さらに、本実施形態によれば、第一半導体チップ３０は配線基板１０に第二半導体チッ
プ７０よりも近い領域に形成される。第一半導体チップ３０が、例えばメモリコントロー
ラーであって、第二半導体チップ７０が半導体メモリチップの場合、第一半導体チップは
、第二半導体チップに比べ、多数のコマンドとデータのやり取りが必要である。第一半導
体チップ３０を配線基板１０の近くに形成することで、第一ボンディングワイヤ５０の長
さを均等に形成しやすく、第一ボンディングワイヤ５０間の信号の遅延を少なくすること
が可能である。これは高速動作に極めて重要である。
また、第一半導体チップ３０が、例えばメモリコントローラーであって、第二半導体チ
ップ７０が半導体メモリチップの場合、第二ボンディングワイヤ８０の本数よりも、第一
ボンディングワイヤ５０の本数が多い場合がある。このように第一ボンディングワイヤ５
０の本数が多いときは、第一半導体チップ３０を配線基板１０に近い領域に配置すること
で、第一半導体チップ３０に対するボンディングを容易に高い自由度で行うことが可能で
ある。例えば、図１に示されるように、第二半導体チップ７０ａ〜７０ｇは、上側から露
出した一辺に第二ボンディングワイヤを接続する必要がある。他方、第一半導体チップ３
０は、図２に示されるように、三辺に第一ボンディングワイヤ５０を接続することが可能
である。
（第二実施形態）
第二実施形態を図７を用いて説明する。図７は、図２相当の平面図である。
本実施形態では、液状の樹脂部材６０の代わりに、シート状の樹脂部材６０を用いる。
シート状の樹脂部材６０を用いることで、より容易に第一半導体チップ３０上に樹脂部材
６０を配置することが可能である。
また、第一実施形態で説明したような効果は本実施形態でも同様に認められる。
（第三実施形態）
第三実施形態を図８を用いて説明する。図８は、図２相当の平面図である。
本実施形態では、液状の樹脂部材６０を一か所でなく、３か所に分けて第一半導体チッ
プ３０上に塗布している。
このように、複数個所に配置することで、第二半導体チップ７０が均質にそれぞれの樹
脂部材６０によって支えられ、より高い信頼性を得ることが可能である。
本発明の実施形態を説明したが、本実施形態は、例として提示したものであり、発明の
範囲を限定することは意図していない。この新規な実施形態は、その他の様々な形態で実
施されることが可能であり、発明の趣旨を逸脱しない範囲で、種々の省略、置き換え、変
更を行うことができる。本実施形態やその変形は、発明の範囲や要旨に含まれるとともに
、特許請求の範囲に記載された発明とその均等の範囲に含まれる。
５・・・半導体装置
１０・・・回路配線基板
２０・・・スペーサー
３０・・・第一半導体チップ
４０・・・回路素子
５０・・・第一ボンディングワイヤ
６０・・・樹脂部材
７０・・・第二半導体チップ
８０・・・第二ボンディングワイヤ
９０・・・封止樹脂層
１００・・・電極
１０５・・・電極パッド

Claims (16)

  1. 配線基板と、
    前記配線基板上に配置された第一半導体チップと、
    前記配線基板上に、前記配線基板に垂直な方向からの平面視において、前記第一半導体
    チップと重ならない領域に配置された支持部材と、
    前記第一半導体チップ上に配置された樹脂部材と、
    前記支持部材と前記樹脂部材上に配置された第二半導体チップと、
    を有する半導体装置。
  2. 前記配線基板上に配置された回路素子と、
    をさらに有する請求項１記載の半導体装置。
  3. 前記第二半導体チップは、前記第一半導体チップ、前記支持部材、前記樹脂部材よりも
    第一方向から見た面積が大きい請求項１記載の半導体装置。
  4. 前記第一半導体チップ、前記回路素子は、前記配線基板に垂直な平面に射影した場合に
    、少なくともその一部が前記第二半導体チップと重なる領域に設けられている
    請求項２記載の半導体装置。
  5. 前記樹脂部材は、前記配線基板に垂直な平面に射影した場合に、前記第一半導体チップ
    と重なる領域に設けられている請求項１記載の半導体装置。
  6. 前記樹脂部材は、略長円状に設けられている請求項５記載の半導体装置。
  7. 前記樹脂部材は、複数の略長円状に設けられている請求項６記載の半導体装置。
  8. 前記樹脂部材は、未硬化状態において、50~1000Pa・sの粘度を持つ熱硬化樹脂を含む請
    求項１〜７何れか一項記載の半導体装置。
  9. 前記第二半導体チップは、電極パッドを介し、金属ワイヤに電気的に接続し、
    前記電極パッドは、前記配線基板に垂直な方向からの平面視において、前記支持部材と
    重なる領域に配置される、請求項１記載の半導体装置。
  10. 前記第一半導体チップは、前記配線基板と第一金属ワイヤにより電気的に接続しており
    、
    前記第二半導体チップは、前記配線基板と第二金属ワイヤにより電気的に接続しており
    、
    前記第一金属ワイヤの本数より、前記第二金属ワイヤの本数が多い、
    請求項１記載の半導体装置。
  11. 前記第二半導体チップは、メモリ素子を含む複数の半導体チップであって、
    前記第一半導体チップは、前記メモリ素子のコントローラーを含む半導体チップである
    、
    請求項１０項記載の半導体装置。
  12. 配線基板上の第一領域に第一半導体チップを配置し、
    前記配線基板上の第二領域に支持部材を配置し、
    前記第一半導体チップ上の少なくとも一部に樹脂部材を配置し、
    前記支持部材と前記樹脂部材上に第二半導体チップを配置する、
    半導体装置の製造方法。
  13. 前記配線基板上に前記第二半導体チップを配置する前に、前記配線基板上に回路素子を
    配置する、
    請求項１２記載の半導体装置の製造方法。
  14. 前記回路素子は前記第二半導体チップの下方に配置される
    請求項１３記載の半導体装置の製造方法。
  15. 前記第二半導体チップの配置後に、加熱することにより、前記樹脂部材を硬化させる、
    請求項１２記載の半導体装置の製造方法。
  16. 前記第一半導体チップの配置後に、前記配線基板と前記第一半導体チップを電気的に接
    続する第一金属ワイヤを形成し、
    前記第二半導体チップの配置後に、前記配線基板と前記第二半導体チップを電気的に接
    続する第二金属ワイヤを形成し、
    前記第一金属ワイヤの本数より、前記第二金属ワイヤの本数が多い、
    請求項１２記載の半導体装置の製造方法。
JP2015056981A 2015-03-19 2015-03-19 半導体装置及びその製造方法 Pending JP2016178196A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2015056981A JP2016178196A (ja) 2015-03-19 2015-03-19 半導体装置及びその製造方法
US15/061,965 US20160276312A1 (en) 2015-03-19 2016-03-04 Semiconductor device and method for manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2015056981A JP2016178196A (ja) 2015-03-19 2015-03-19 半導体装置及びその製造方法

Publications (1)

Publication Number Publication Date
JP2016178196A true JP2016178196A (ja) 2016-10-06

Family

ID=56925309

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015056981A Pending JP2016178196A (ja) 2015-03-19 2015-03-19 半導体装置及びその製造方法

Country Status (2)

Country Link
US (1) US20160276312A1 (ja)
JP (1) JP2016178196A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10658350B2 (en) 2018-02-05 2020-05-19 Samsung Electronics Co., Ltd. Semiconductor package

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9627367B2 (en) * 2014-11-21 2017-04-18 Micron Technology, Inc. Memory devices with controllers under memory packages and associated systems and methods
KR20180004413A (ko) * 2016-07-04 2018-01-12 삼성전자주식회사 반도체 패키지 및 이의 제조 방법
JP2019153619A (ja) 2018-02-28 2019-09-12 東芝メモリ株式会社 半導体装置
CN109192720B (zh) * 2018-08-14 2020-10-30 苏州德林泰精工科技有限公司 一种基于树脂垫片的阶梯式堆叠芯片封装结构及加工工艺
KR102556518B1 (ko) * 2018-10-18 2023-07-18 에스케이하이닉스 주식회사 상부 칩 스택을 지지하는 서포팅 블록을 포함하는 반도체 패키지
US11101214B2 (en) * 2019-01-02 2021-08-24 Taiwan Semiconductor Manufacturing Co., Ltd. Package structure with dam structure and method for forming the same
JP2021048195A (ja) 2019-09-17 2021-03-25 キオクシア株式会社 半導体装置及び半導体装置の製造方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1138460C (zh) * 1997-10-02 2004-02-11 松下电器产业株式会社 将半导体元件安装到电路板上的方法及半导体器件
US20120014915A9 (en) * 2001-04-25 2012-01-19 Rhonda Voskuhl Estriol Therapy for Autoimmune and Neurodegenerative Disease and Disorders
US20070017057A1 (en) * 2005-07-22 2007-01-25 Zimmerle Johnny W Convertible vacuum system
US20100279469A1 (en) * 2007-11-20 2010-11-04 Hwail Jin Low-Voiding Die Attach Film, Semiconductor Package, and Processes for Making and Using Same
KR101906269B1 (ko) * 2012-04-17 2018-10-10 삼성전자 주식회사 반도체 패키지 및 그 제조 방법
JP2016048756A (ja) * 2014-08-28 2016-04-07 マイクロン テクノロジー， インク． 半導体装置
KR102210332B1 (ko) * 2014-09-05 2021-02-01 삼성전자주식회사 반도체 패키지

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10658350B2 (en) 2018-02-05 2020-05-19 Samsung Electronics Co., Ltd. Semiconductor package

Also Published As

Publication number Publication date
US20160276312A1 (en) 2016-09-22

Similar Documents

Publication Publication Date Title
JP2016178196A (ja) 半導体装置及びその製造方法
US9099459B2 (en) Semiconductor device and manufacturing method of the same
JP5840479B2 (ja) 半導体装置およびその製造方法
US20090004774A1 (en) Method of multi-chip packaging in a tsop package
KR102367404B1 (ko) 반도체 패키지의 제조 방법
JP2012129464A (ja) 半導体装置およびその製造方法
US20110074037A1 (en) Semiconductor device
JP5843803B2 (ja) 半導体装置とその製造方法
JP2011066327A (ja) 樹脂封止型半導体装置及びその製造方法
JP2012216644A (ja) 半導体装置及びその製造方法
KR100800475B1 (ko) 적층형 반도체 패키지 및 그 제조방법
JP2014107554A (ja) 積層型半導体パッケージ
KR101474189B1 (ko) 집적회로 패키지
JP5378643B2 (ja) 半導体装置及びその製造方法
US20080224284A1 (en) Chip package structure
JP2015220235A (ja) 半導体装置
US8674519B2 (en) Microelectronic package and method of manufacturing same
TW202036734A (zh) 晶片封裝結構及其製造方法
TWI582905B (zh) 晶片封裝結構及其製作方法
JP4732138B2 (ja) 半導体装置及びその製造方法
US8975758B2 (en) Semiconductor package having interposer with openings containing conductive layer
JP2007081127A (ja) 半導体装置及び半導体装置の製造方法
JP5103155B2 (ja) 半導体装置およびその製造方法
JP2015012160A (ja) モールドパッケージおよびその製造方法
CN104392979A (zh) 芯片堆叠封装结构

Legal Events

Date Code Title Description
RD07 Notification of extinguishment of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7427

Effective date: 20170220

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20170301

A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A712

Effective date: 20170531

RD01 Notification of change of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7421

Effective date: 20170821