JP2016111072A - 実装構造体及びbgaボール - Google Patents
実装構造体及びbgaボール Download PDFInfo
- Publication number
- JP2016111072A JP2016111072A JP2014244619A JP2014244619A JP2016111072A JP 2016111072 A JP2016111072 A JP 2016111072A JP 2014244619 A JP2014244619 A JP 2014244619A JP 2014244619 A JP2014244619 A JP 2014244619A JP 2016111072 A JP2016111072 A JP 2016111072A
- Authority
- JP
- Japan
- Prior art keywords
- mass
- content
- bga
- electrode
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/17—Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
- B23K35/02—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape
- B23K35/0222—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape for use in soldering, brazing
- B23K35/0244—Powders, particles or spheres; Preforms made therefrom
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
- B23K35/22—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
- B23K35/24—Selection of soldering or welding materials proper
- B23K35/26—Selection of soldering or welding materials proper with the principal constituent melting at less than 400 degrees C
- B23K35/262—Sn as the principal constituent
-
- C—CHEMISTRY; METALLURGY
- C22—METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
- C22C—ALLOYS
- C22C13/00—Alloys based on tin
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01B—CABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
- H01B1/00—Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors
- H01B1/02—Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors mainly consisting of metals or alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
- H05K3/3463—Solder compositions in relation to features of the printed circuit board or the mounting process
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01049—Indium [In]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0105—Tin [Sn]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01083—Bismuth [Bi]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0135—Quinary Alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10734—Ball grid array [BGA]; Bump grid array
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Mechanical Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
Description
BGA電極を有するBGAと、
回路基板電極を有する回路基板と、
前記回路基板電極上に配置され前記BGA電極と接続されたはんだ接合部を有し、
前記はんだ接合部は、
Cuの含有率が0.6 mass%以上1.2mass%以下のCuと
Agの含有率が3.0 mass%以上4.0mass%以下のAgと、
Biの含有率が0 mass%以上1.0mass%以下のBiとを含み、
(1) Cuの含有率が0.6 mass%以上0.91mass%以下の範囲では、
Inの含有率が5.3+(6−(1.55×Cuの含有率+4.428)) mass%以上6.8+(6−(1.57×Cuの含有率+4.564)) mass%以下であり、残部はSnからなり、
(2) Cuの含有率が0.91mass%より大きく1.0mass%以下の範囲では、
Inの含有率が5.3+(6−(1.55×Cuの含有率+4.428)) mass%以上6.8mass%以下であり、
残部はSnからなり、
(3) Cuの含有率が1.0 mass%より大きく1.2mass%以下の範囲では、
Inの含有率が5.3 mass%以上6.8mass%以下であり、残部はSnからなり、
前記(1)から(3)の何れかを満たすことを特徴とする。
第1の本発明におけるはんだ接合部を形成するためのはんだボールであって、
Cuの含有率が0.6 mass%以上1.2mass%以下のCuと
Agの含有率が3.0 mass%以上4.0mass%以下のAgと、
Biの含有率が0 mass%以上1.0mass%以下のBiとを含み、
(1) Cuの含有率が0.6 mass%以上0.91mass%以下の範囲では、
Inの含有率が5.3+(6−(1.55×Cuの含有率+4.428)) mass%以上6.8+(6−(1.57×Cuの含有率+4.564)) mass%以下であり、残部はSnからなり、
(2) Cuの含有率が0.91mass%より大きく1.0mass%以下の範囲では、
Inの含有率が5.3+(6−(1.55×Cuの含有率+4.428)) mass%以上6.8mass%以下であり、
残部はSnからなり、
(3) Cuの含有率が1.0 mass%より大きく1.2mass%以下の範囲では、
Inの含有率が5.3 mass%以上6.8mass%以下であり、残部はSnからなり、
前記(1)から(3)の何れかを満たすことを特徴とする。
本発明の実装構造体の効果を明らかにするために、BGAボールを用いてBGAと回路基板を接合した実装構造体を作製し、評価を行う。
秤量したSnが、セラミック製のるつぼ内に投入され、温度が500℃に調整されている電気式ジャケットヒータの中に設置される。
そこで作製されたSn−3.5mass%Ag−0.5mass%Bi−5.9mass%In−0.8mass%CuのBGAボールを用いた場合、導通を確保できなくなるサイクル数は3300サイクルであり、自動車のエンジン近傍に搭載する車載商品に対する要求を満足することが確認できる。
Cuの含有率の詳細については後述するが、Cu6Sn5のCuの一部がNiに置換された(Cuy,Ni1−y)6Sn5を形成するためには、Cuの含有率の閾値があると考えられる。
(Nix,Cu1−x)3Sn4が反応層9として形成された場合、この反応層9は成長しやすく、繰り返し温度サイクル中の高温保持によりNiがはんだ側に拡散し成長する。
(数1)
(Inの含有率)=1.55×(Cuの含有率)+4.428
のグラフが得られ、
BGA電極のみに無電解Niめっきを施した場合で近似直線を描くと、一次関数
(数2)
(Inの含有率)=1.57×(Cuの含有率)+4.564
のグラフが得られる。
(数3)
(試験サイクル数)
=−1200×(Inの含有率)2+14460×(Inの含有率)−39900
のグラフとして図示されている。
Inの含有率の下限値は、
0.6 mass%≦Cuの含有率≦1.0mass%の範囲では、5.3+(6−(1.55×Cuの含有率+4.428)) mass%≦Inの含有率であり、
1.0mass%<Cuの含有率≦1.2mass%の範囲では、 5.3mass%≦Inの含有率である。
Inの含有率の上限値は、
0.6 mass%≦Cuの含有率≦0.91mass%の範囲では、Inの含有率≦6.8+(6−(1.57×Cuの含有率+4.564)) mass%であり、
0.91mass%<Cuの含有率≦1.2mass%の範囲では、 Inの含有率≦6.8mass%である。
BGA電極を有するBGAと、
回路基板電極を有する回路基板と、
前記回路基板電極上に配置され前記BGA電極と接続されたはんだ接合部を有し、
前記はんだ接合部は、
Cuの含有率が0.6 mass%以上1.2mass%以下のCuと
Agの含有率が3.0 mass%以上4.0mass%以下のAgと、
Biの含有率が0 mass%以上1.0mass%以下のBiとを含み、
(1) Cuの含有率が0.6 mass%以上0.91mass%以下の範囲では、
Inの含有率が5.3+(6−(1.55×Cuの含有率+4.428)) mass%以上6.8+(6−(1.57×Cuの含有率+4.564)) mass%以下であり、残部はSnからなり、
(2) Cuの含有率が0.91mass%より大きく1.0mass%以下の範囲では、
Inの含有率が5.3+(6−(1.55×Cuの含有率+4.428)) mass%以上6.8mass%以下であり、
残部はSnからなり、
(3) Cuの含有率が1.0 mass%より大きく1.2mass%以下の範囲では、
Inの含有率が5.3 mass%以上6.8mass%以下であり、残部はSnからなり、
前記(1)から(3)の何れかを満たすことを特徴とする実装構造体であれば、はんだ付け後のBGAの信頼性判定の基準を満足させることが可能となる。
BGA電極を有するBGAと、
回路基板電極を有する回路基板と、
前記回路基板電極上に配置され前記BGA電極と接続されたはんだ接合部を有し、
前記はんだ接合部は、
Cuの含有率が0.6 mass%以上1.2mass%以下のCuと
Agの含有率が3.0 mass%以上4.0mass%以下のAgと、
Biの含有率が0 mass%以上1.0mass%以下のBiとを含み、
(1) Cuの含有率が0.6 mass%以上0.91mass%以下の範囲では、
Inの含有率が5.5+(6−(1.55×Cuの含有率+4.428)) mass%以上6.3+(6−(1.57×Cuの含有率+4.564)) mass%以下であり、残部Snからなり、
(2) Cuの含有率が0.91mass%より大きく1.0mass%以下の範囲では、
Inの含有率が5.5+(6−(1.55×Cuの含有率+4.428)) mass%以上6.3mass%以下であり、
残部Snからなり、
(3) Cuの含有率が1.0 mass%より大きく1.2mass%以下の範囲では、
Inの含有率が5.5 mass%以上6.3mass%以下であり、残部はSnからなり、前記(1)から(3)の何れかを満たすことを特徴とする実装構造体であれば、はんだ付け後のBGAの信頼性をより高く保つことが可能となる。
2 BGA基板
3 BGA電極
4 回路基板
5 基材
6 回路基板電極
8 BGA
7 はんだ接合部
9 反応層
11 反応層
12 はんだペースト
13 はんだペースト
14 BGAボール
15 はんだ接合部
101 BGAボール
102 BGA基板
103 BGA電極
104 回路基板
105 基材
106 回路基板電極
107 はんだ接合部
108 BGA
109 反応層
110 はんだペースト
Claims (3)
- BGA電極を有するBGAと、
回路基板電極を有する回路基板と、
前記回路基板電極上に配置され前記BGA電極と接続されたはんだ接合部を有し、
前記はんだ接合部は、
Cuの含有率が0.6 mass%以上1.2mass%以下のCuと
Agの含有率が3.0 mass%以上4.0mass%以下のAgと、
Biの含有率が0 mass%以上1.0mass%以下のBiとを含み、
(1) Cuの含有率が0.6 mass%以上0.91mass%以下の範囲では、
Inの含有率が5.3+(6−(1.55×Cuの含有率+4.428)) mass%以上6.8+(6−(1.57×Cuの含有率+4.564)) mass%以下であり、残部はSnからなり、
(2) Cuの含有率が0.91mass%より大きく1.0mass%以下の範囲では、
Inの含有率が5.3+(6−(1.55×Cuの含有率+4.428)) mass%以上6.8mass%以下であり、
残部はSnからなり、
(3) Cuの含有率が1.0 mass%より大きく1.2mass%以下の範囲では、
Inの含有率が5.3 mass%以上6.8mass%以下であり、残部はSnからなり、
前記(1)から(3)の何れかを満たすことを特徴とする実装構造体。 - 回路基板電極およびBGA電極の少なくとも一方の表面にNiめっきを施しためっき層を有し、めっき層とはんだ接合部との接続界面の反応層が、Cu6Sn5にNiを含んだ(Cuy,Ni1−y)6Sn5層(但し0≦y≦1)であることを特徴とする請求項1に記載の実装構造体。
- 請求項1に記載の実装構造体のはんだ接合部を形成させるためのBGAボールであって
Cuの含有率が0.6 mass%以上1.2mass%以下のCuと
Agの含有率が3.0 mass%以上4.0mass%以下のAgと、
Biの含有率が0 mass%以上1.0mass%以下のBiとを含み、
(1) Cuの含有率が0.6 mass%以上0.91mass%以下の範囲では、
Inの含有率が5.3+(6−(1.55×Cuの含有率+4.428)) mass%以上6.8+(6−(1.57×Cuの含有率+4.564)) mass%以下であり、残部はSnからなり、
(2) Cuの含有率が0.91mass%より大きく1.0mass%以下の範囲では、
Inの含有率が5.3+(6−(1.55×Cuの含有率+4.428)) mass%以上6.8mass%以下であり、
残部はSnからなり、
(3) Cuの含有率が1.0 mass%より大きく1.2mass%以下の範囲では、
Inの含有率が5.3 mass%以上6.8mass%以下であり、残部はSnからなり、
前記(1)から(3)の何れかを満たすことを特徴とするBGAボール。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014244619A JP6387522B2 (ja) | 2014-12-03 | 2014-12-03 | 実装構造体 |
US14/880,942 US10068869B2 (en) | 2014-12-03 | 2015-10-12 | Mounting structure and BGA ball |
CN201510725892.6A CN105682374B (zh) | 2014-12-03 | 2015-10-29 | 安装结构体和bga球 |
DE102015223015.5A DE102015223015A1 (de) | 2014-12-03 | 2015-11-23 | Montagestruktur und BGA-Kugel |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014244619A JP6387522B2 (ja) | 2014-12-03 | 2014-12-03 | 実装構造体 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2016111072A true JP2016111072A (ja) | 2016-06-20 |
JP6387522B2 JP6387522B2 (ja) | 2018-09-12 |
Family
ID=55974860
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2014244619A Active JP6387522B2 (ja) | 2014-12-03 | 2014-12-03 | 実装構造体 |
Country Status (4)
Country | Link |
---|---|
US (1) | US10068869B2 (ja) |
JP (1) | JP6387522B2 (ja) |
CN (1) | CN105682374B (ja) |
DE (1) | DE102015223015A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2024038665A1 (ja) * | 2022-08-16 | 2024-02-22 | 日立Astemo株式会社 | 電子装置、電子装置の製造方法 |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6447155B2 (ja) * | 2015-01-16 | 2019-01-09 | 富士通株式会社 | 電子装置及び電子装置の製造方法 |
JP6659950B2 (ja) * | 2016-01-15 | 2020-03-04 | 富士通株式会社 | 電子装置及び電子機器 |
US10130302B2 (en) * | 2016-06-29 | 2018-11-20 | International Business Machines Corporation | Via and trench filling using injection molded soldering |
KR102550329B1 (ko) * | 2018-09-28 | 2023-07-05 | 가부시키가이샤 무라타 세이사쿠쇼 | 접속 전극 및 접속 전극의 제조 방법 |
US11581239B2 (en) * | 2019-01-18 | 2023-02-14 | Indium Corporation | Lead-free solder paste as thermal interface material |
US11830746B2 (en) * | 2021-01-05 | 2023-11-28 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor device and method of manufacture |
US20220336400A1 (en) * | 2021-04-15 | 2022-10-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Connecting structure, package structure and manufacturing method thereof |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007013099A (ja) * | 2005-06-29 | 2007-01-18 | Samsung Electronics Co Ltd | 無鉛半田ボールを有する半導体パッケージ及びその製造方法 |
WO2009011392A1 (ja) * | 2007-07-18 | 2009-01-22 | Senju Metal Industry Co., Ltd. | 車載電子回路用In入り鉛フリーはんだ |
WO2010122764A1 (ja) * | 2009-04-20 | 2010-10-28 | パナソニック株式会社 | はんだ材料および電子部品接合体 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3311215B2 (ja) * | 1995-09-28 | 2002-08-05 | 株式会社東芝 | 半導体装置 |
JP2003234433A (ja) * | 2001-10-01 | 2003-08-22 | Matsushita Electric Ind Co Ltd | 半導体装置、半導体装置の実装方法、ならびに実装体およびその製造方法 |
JP3819806B2 (ja) * | 2002-05-17 | 2006-09-13 | 富士通株式会社 | バンプ電極付き電子部品およびその製造方法 |
JP2007142187A (ja) * | 2005-11-18 | 2007-06-07 | Texas Instr Japan Ltd | 半導体装置 |
JP4939891B2 (ja) | 2006-10-06 | 2012-05-30 | 株式会社日立製作所 | 電子装置 |
KR101355694B1 (ko) * | 2010-08-18 | 2014-01-28 | 닛데쓰스미킹 마이크로 메탈 가부시키가이샤 | 반도체 실장용 땜납 볼 및 전자 부재 |
CN201872045U (zh) * | 2010-11-05 | 2011-06-22 | 云南锡业微电子材料有限公司 | Bga焊锡球表面光洁度处理设备 |
US9237659B2 (en) * | 2012-09-28 | 2016-01-12 | Intel Corporation | BGA structure using CTF balls in high stress regions |
JP2016103530A (ja) * | 2014-11-27 | 2016-06-02 | 新日鉄住金マテリアルズ株式会社 | 無鉛はんだバンプ接合構造 |
-
2014
- 2014-12-03 JP JP2014244619A patent/JP6387522B2/ja active Active
-
2015
- 2015-10-12 US US14/880,942 patent/US10068869B2/en active Active
- 2015-10-29 CN CN201510725892.6A patent/CN105682374B/zh active Active
- 2015-11-23 DE DE102015223015.5A patent/DE102015223015A1/de active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007013099A (ja) * | 2005-06-29 | 2007-01-18 | Samsung Electronics Co Ltd | 無鉛半田ボールを有する半導体パッケージ及びその製造方法 |
WO2009011392A1 (ja) * | 2007-07-18 | 2009-01-22 | Senju Metal Industry Co., Ltd. | 車載電子回路用In入り鉛フリーはんだ |
WO2010122764A1 (ja) * | 2009-04-20 | 2010-10-28 | パナソニック株式会社 | はんだ材料および電子部品接合体 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2024038665A1 (ja) * | 2022-08-16 | 2024-02-22 | 日立Astemo株式会社 | 電子装置、電子装置の製造方法 |
Also Published As
Publication number | Publication date |
---|---|
DE102015223015A1 (de) | 2016-06-09 |
CN105682374B (zh) | 2019-05-17 |
JP6387522B2 (ja) | 2018-09-12 |
CN105682374A (zh) | 2016-06-15 |
US10068869B2 (en) | 2018-09-04 |
US20160163668A1 (en) | 2016-06-09 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP6387522B2 (ja) | 実装構造体 | |
JP6842500B2 (ja) | 無鉛ソルダーペースト及びその製造方法 | |
JP6145164B2 (ja) | 鉛フリーはんだ、鉛フリーはんだボール、この鉛フリーはんだを使用したはんだ継手およびこのはんだ継手を有する半導体回路 | |
JP6713106B2 (ja) | 鉛フリーはんだ合金、はんだ材料及び接合構造体 | |
TWI752178B (zh) | 焊接材料、焊膏、焊料泡沫以及焊接頭 | |
JP2018079480A (ja) | 低温用のBi−In−Sn系はんだ合金、それを用いた電子部品実装基板及びその実装基板を搭載した装置 | |
JP6281916B2 (ja) | はんだ材料および接合構造体 | |
JPWO2013132942A1 (ja) | 接合方法、接合構造体およびその製造方法 | |
JPWO2006011204A1 (ja) | 鉛フリーはんだ合金 | |
JP4975342B2 (ja) | 導電性接着剤 | |
JP2017113756A (ja) | 表面性に優れたSnを主成分とするはんだ合金及びその選別方法 | |
WO2019069788A1 (ja) | はんだ合金、はんだ接合材料及び電子回路基板 | |
JP2012200789A (ja) | Au−Sn合金はんだ | |
JP5903625B2 (ja) | はんだ材料 | |
JP5732627B2 (ja) | はんだ材料及び接合構造体 | |
JP6708942B1 (ja) | はんだ合金、はんだペースト、プリフォームはんだ、はんだボール、線はんだ、脂入りはんだ、はんだ継手、電子回路基板および多層電子回路基板 | |
JP7161140B1 (ja) | はんだ合金、はんだボール、はんだペーストおよびはんだ継手 | |
JP2011251330A (ja) | 高温鉛フリーはんだペースト | |
JP5920752B2 (ja) | はんだ材料 | |
CN103476540A (zh) | 焊料合金 | |
JP5979083B2 (ja) | PbフリーAu−Ge−Sn系はんだ合金 | |
KR100904652B1 (ko) | 웨이브 및 디핑용 무연 솔더 조성물과 이를 이용한 전자기기 및 인쇄회로기판 | |
KR100904656B1 (ko) | 웨이브 및 디핑용 무연 솔더 조성물과 이를 이용한 전자기기 및 인쇄회로기판 | |
JP2016165751A (ja) | PbフリーIn系はんだ合金 | |
JP6504401B2 (ja) | はんだ合金およびそれを用いた実装構造体 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
RD01 | Notification of change of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7421 Effective date: 20160520 |
|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20170307 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20171114 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20171205 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20180123 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20180703 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20180716 |
|
R151 | Written notification of patent or utility model registration |
Ref document number: 6387522 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R151 |