JP2016039240A - 電子部品 - Google Patents

電子部品 Download PDF

Info

Publication number
JP2016039240A
JP2016039240A JP2014161240A JP2014161240A JP2016039240A JP 2016039240 A JP2016039240 A JP 2016039240A JP 2014161240 A JP2014161240 A JP 2014161240A JP 2014161240 A JP2014161240 A JP 2014161240A JP 2016039240 A JP2016039240 A JP 2016039240A
Authority
JP
Japan
Prior art keywords
solder layer
layer
solder
arrangement region
electronic component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2014161240A
Other languages
English (en)
Other versions
JP6546376B2 (ja
Inventor
藤井　義磨郎
Yoshimaro Fujii
義磨郎 藤井
小栗　洋
Hiroshi Oguri
洋 小栗
明 坂本
Akira Sakamoto
坂本　　明
智也 田口
Tomoya Taguchi
智也 田口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hamamatsu Photonics KK
Original Assignee
Hamamatsu Photonics KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hamamatsu Photonics KK filed Critical Hamamatsu Photonics KK
Priority to JP2014161240A priority Critical patent/JP6546376B2/ja
Priority to CN201580042313.6A priority patent/CN106663641B/zh
Priority to KR1020167031733A priority patent/KR102387336B1/ko
Priority to PCT/JP2015/072215 priority patent/WO2016021632A1/ja
Priority to US15/320,835 priority patent/US20170200693A1/en
Priority to TW104125674A priority patent/TWI711137B/zh
Publication of JP2016039240A publication Critical patent/JP2016039240A/ja
Application granted granted Critical
Publication of JP6546376B2 publication Critical patent/JP6546376B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/15—Ceramic or glass substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/02002—Arrangements for conducting electric current to or from the device in operations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0203—Containers; Encapsulations, e.g. encapsulation of photodiodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0216—Coatings
    • H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/102—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
    • H01L31/103—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier being of the PN homojunction type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • H01L2021/60007—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation involving a soldering or an alloying process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/03—Manufacturing methods
    • H01L2224/0347—Manufacturing methods using a lift-off mask
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04026—Bonding areas specifically adapted for layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/05075—Plural internal layers
    • H01L2224/0508—Plural internal layers being stacked
    • H01L2224/05082—Two-layer arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/05099—Material
    • H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/05166—Titanium [Ti] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/05099—Material
    • H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/05169—Platinum [Pt] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/05099—Material
    • H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/05171—Chromium [Cr] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05644—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05663—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/05669—Platinum [Pt] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13111—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13144—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
    • H01L2224/26122—Auxiliary members for layer connectors, e.g. spacers being formed on the semiconductor or solid-state body to be connected
    • H01L2224/26145—Flow barriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
    • H01L2224/26152—Auxiliary members for layer connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
    • H01L2224/26175—Flow barriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/2747—Manufacturing methods using a lift-off mask
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/28105—Layer connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. layer connectors on chip-scale packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/2901—Shape
    • H01L2224/29011—Shape comprising apertures or cavities
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/2901—Shape
    • H01L2224/29012—Shape in top view
    • H01L2224/29013—Shape in top view being rectangular or square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/2901—Shape
    • H01L2224/29016—Shape in side view
    • H01L2224/29018—Shape in side view comprising protrusions or indentations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29075—Plural core members
    • H01L2224/2908—Plural core members being stacked
    • H01L2224/29083—Three-layer arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29144—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/29166—Titanium [Ti] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/29169—Platinum [Pt] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/29171—Chromium [Cr] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/731—Location prior to the connecting process
    • H01L2224/73101—Location prior to the connecting process on the same surface
    • H01L2224/73103—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8336—Bonding interfaces of the semiconductor or solid state body
    • H01L2224/83365—Shape, e.g. interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385—Shape, e.g. interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399—Material
    • H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/83444—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399—Material
    • H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83463—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/83469—Platinum [Pt] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/83801—Soldering or alloying
    • H01L2224/83815—Reflow soldering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/03—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12042—LASER
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12043—Photo diode

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

【課題】Ａｕ−Ｓｎ合金ハンダを用いて他の電子部品を実装する場合でも、当該他の電子部品の実装を適切に行うことが可能な電子部品を提供すること。【解決手段】電子部品１Ａは、基材１０と、基材１０上に配置されている、複数の導電性金属材料層２１，２２，２３の積層体２０と、積層体２０上に配置されている、Ａｕ−Ｓｎ合金ハンダからなるハンダ層３０と、を備えている。積層体２０は、最外層を構成する導電性金属材料層２３として、Ａｕからなる表面層を有している。表面層は、ハンダ層３０が配置されるハンダ層配置領域２３ａと、ハンダ層３０が配置されないハンダ層非配置領域２３ｂと、を含んでいる。ハンダ層配置領域２３ａとハンダ層非配置領域２３ｂとは、空間的に離間している。【選択図】図２

Description

本発明は、電子部品に関する。
フォトダイオードと、フォトダイオードの上面の受光部以外の部位に配置されている端子と、端子に配置されているバンプと、を備えた電子部品が知られている（たとえば、特許文献１参照）。この電子部品には、他の電子部品として、ＩＣチップが実装される。
特開２０００−３０７１３３号公報
本発明は、Ａｕ−Ｓｎ合金ハンダを用いて他の電子部品を実装する場合でも、当該他の電子部品の実装を適切に行うことが可能な電子部品を提供することを目的とする。
本発明に係る電子部品は、基材と、基材上に配置されている、複数の導電性金属材料層の積層体と、積層体上に配置されているＡｕ−Ｓｎ合金ハンダからなるハンダ層と、を備え、積層体は、最外層を構成する導電性金属材料層として、Ａｕからなる表面層を有し、表面層は、ハンダ層が配置されるハンダ層配置領域と、ハンダ層が配置されないハンダ層非配置領域と、を含み、ハンダ層配置領域とハンダ層非配置領域とは、空間的に離間していることを特徴とする。
本発明に係る電子部品では、積層体の最外層を構成するＡｕからなる表面層が、ハンダ層配置領域とハンダ層非配置領域とを含み、これらのハンダ層配置領域とハンダ層非配置領域とは空間的に離間している。このため、本発明に係る電子部品に他の電子部品を実装する際に、積層体上に配置されているハンダ層（Ａｕ−Ｓｎ合金ハンダ）は溶融するものの、溶融したＡｕ−Ｓｎ合金ハンダがハンダ層配置領域からハンダ層非配置領域に流れ出すことが抑制される。
ハンダ層と表面層との熱履歴により、表面層のＡｕがハンダ層に拡散し、Ａｕ−Ｓｎ合金ハンダの組成が変化することがある。Ａｕ−Ｓｎ合金ハンダの組成が変化した場合、Ａｕ−Ｓｎ合金ハンダの融点にバラつきが生じたり、他の電子部品の接合状態が不均一となったりするおそれがある。上述したように、ハンダ層配置領域とハンダ層非配置領域とは空間的に離間しているので、表面層のＡｕがハンダ層に拡散する場合でも、ハンダ層非配置領域のＡｕはハンダ層に拡散することはなく、表面層からのＡｕの拡散量は抑制される。このため、Ａｕ−Ｓｎ合金ハンダの組成の変化が抑制される。
以上のことから、本発明によれば、Ａｕ−Ｓｎ合金ハンダを用いて他の電子部品を実装する場合でも、当該他の電子部品の実装を適切に行うことができる。
ハンダ層配置領域は、ハンダ層非配置領域に囲まれるように、ハンダ層非配置領域の内側に位置すると共に、その全周においてハンダ層非配置領域と空間的に離間していてもよい。この場合、溶融したＡｕ−Ｓｎ合金ハンダがハンダ層配置領域からハンダ層非配置領域に流れ出すことがより一層確実に抑制できる。また、ハンダ層配置領域からのＡｕの拡散量がより一層抑制されるため、Ａｕ−Ｓｎ合金ハンダの組成の変化を確実に抑制することができる。
ハンダ層配置領域とハンダ層非配置領域とは、表面層に形成されたスリットにより空間的に離間していてもよい。この場合、ハンダ層配置領域とハンダ層非配置領域とが空間的に離間している構成を簡易に実現することができる。
ハンダ層は、Ｐｔからなるバリア層を介して、積層体上に配置されていてもよい。この場合、ハンダ層配置領域からのＡｕの拡散が防がれるため、Ａｕ−Ｓｎ合金ハンダの組成の変化をより一層確実に抑制することができる。
本発明によれば、Ａｕ−Ｓｎ合金ハンダを用いて他の電子部品を実装する場合でも、当該他の電子部品の実装を適切に行うことが可能な電子部品を提供することができる。
本発明の実施形態に係る電子部品を示す平面図である。 図１に示されたII−II線に沿った断面構成を説明するための図である。 本実施形態の変形例に係る電子部品の断面構成を説明するための図である。 ハンダ層を形成する過程を説明するための図である。 ハンダ層配置領域とハンダ層非配置領域とが空間的に離間していない電子部品の断面構成を説明するための図である。 本実施形態の他の変形例に係る電子部品を示す平面図である。 本実施形態の他の変形例に係る電子部品の断面構成を説明するための図である。 本実施形態の他の変形例に係る電子部品を示す平面図である。
以下、図面を参照しながら、本発明の実施形態について詳細に説明する。なお、説明において、同一要素又は同一機能を有する要素には、同一符号を用いることとし、重複する説明は省略する。
図１及び図２を参照して、本実施形態に係る電子部品１Ａの構成を説明する。図１は、本実施形態に係る電子部品の平面図である。図２は、図１に示されたII−II線に沿った断面構成を説明するための図である。
電子部品１Ａは、基材１０、積層体２０、及びハンダ層３０を備えている。電子部品１Ａは、たとえば、他の電子部品３が実装されるサブマウント基板として機能する。他の電子部品３には、例えば、レーザーダイオードなどが挙げられる。実装には、電気的且つ物理的に接続することだけでなく、物理的にのみ接続することも含まれる。
基材１０は、半導体基板１１を含んでいる。半導体基板１１は、互いに対向する一対の主面１１ａ，１１ｂと、側面１１ｃと、を有する、第一導電型（たとえば、Ｎ型）のシリコン基板である。側面１１ｃは、一対の主面１１ａ，１１ｂ間を連結するように一対の主面１１ａ，１１ｂの対向方向に延びている。本実施形態では、半導体基板１１は、図１に示されるように、平面視で矩形形状を呈しており、四つの側面１１ｃを有する。
半導体基板１１は、主面１１ａ側に位置する第二導電型（たとえば、Ｐ型）の第一半導体領域１３を有している。第一半導体領域１３は、第二導電型の不純物（ボロンなど）が添加された領域であり、半導体基板１１よりも不純物濃度が高い。第一半導体領域１３は、たとえば、イオン注入法又は拡散法により、第二導電型の不純物を主面１１ａ側から半導体基板１１に添加することにより形成される。
基材１０では、半導体基板１１と第一半導体領域１３とでＰＮ接合が形成されている。すなわち、基材１０は、主面１１ａが光入射面である表面入射型のフォトダイオードである。第一半導体領域１３は、半導体基板１１とで光感応領域を構成している。他の電子部品３としてレーザーダイオードが電子部品１Ａに実装される場合、上記フォトダイオードは、レーザーダイオードの出力をモニタする。
基材１０は、半導体基板１１の主面１１ａ上に配置されているパッシベーション膜１５を含んでいる。パッシベーション膜１５には、第一半導体領域１３に対応する位置に開口１５ａが形成されている。第一半導体領域１３（光感応領域）には、パッシベーション膜１５に形成された開口１５ａを通って、光が入射する。パッシベーション膜１５は、たとえばＳｉＮからなる。パッシベーション膜１５は、たとえばＣＶＤ（Chemical Vapor Deposition）法により形成される。本実施形態では、上記フォトダイオードに接続されるカソード電極（パッド）及びアノード電極（パッド）の図示を省略している。
積層体２０は、基材１０（パッシベーション膜１５上）上に配置されている。詳細には、積層体２０は、パッシベーション膜１５における、開口１５ａが形成されていない領域上に配置されている。積層体２０は、複数の導電性金属材料層（本実施形態では、三層の導電性金属材料層２１，２２，２３）からなる。各導電性金属材料層２１，２２，２３は、導電性金属材料からなる層である。三層の導電性金属材料層２１，２２，２３は、基材１０側から、導電性金属材料層２１、導電性金属材料層２２、導電性金属材料層２３の順に積層されている。各導電性金属材料層２１，２２，２３は、たとえば真空蒸着法又はスパッタリング法により形成される。
導電性金属材料層２１は、基材１０（パッシベーション膜１５）との接触層を構成しており、基材１０（パッシベーション膜１５）との密着性を高める。導電性金属材料層２１は、たとえばＴｉからなる。導電性金属材料層２１の厚みは、たとえば０．１〜０．２μｍである。導電性金属材料層２１は、Ｔｉ以外に、Ｃｒなどからなっていてもよい。
導電性金属材料層２２は、中間のバリア層を構成しており、他の導電性金属材料層２１，２３から金属材料（金属原子）が拡散するのを防ぐ。導電性金属材料層２２は、たとえばＰｔからなる。導電性金属材料層２２の厚みは、たとえば０．２〜０．３μｍである。
導電性金属材料層２３は、積層体２０の最外層を構成する、すなわち表面層を構成している。導電性金属材料層２３は、たとえばＡｕからなる。導電性金属材料層２３の厚みは、たとえば０．１〜０．５μｍである。
導電性金属材料層２３は、ハンダ層３０が配置されるハンダ層配置領域２３ａと、ハンダ層３０が配置されないハンダ層非配置領域２３ｂと、を含んでいる。ハンダ層配置領域２３ａとハンダ層非配置領域２３ｂとは、導電性金属材料層２２上において、空間的に離間している。すなわち、ハンダ層配置領域２３ａとハンダ層非配置領域２３ｂとが空間的に離間している領域では、導電性金属材料層２２が露出している。
本実施形態では、ハンダ層配置領域２３ａは、ハンダ層非配置領域２３ｂに囲まれるように、ハンダ層非配置領域２３ｂの内側に位置すると共に、その全周においてハンダ層非配置領域２３ｂと空間的に離間している。ハンダ層配置領域２３ａとハンダ層非配置領域２３ｂとは、導電性金属材料層２３に形成されたスリット２３ｃにより空間的に離間している。
ハンダ層３０は、Ａｕ−Ｓｎ合金ハンダからなり、積層体２０（導電性金属材料層２３のハンダ層配置領域２３ａ）上に配置されている。ハンダ層３０は、導電性金属材料層２３（ハンダ層配置領域２３ａ）に接している。ハンダ層３０は、たとえばフォトレジスト（ネガ型のフォトレジスト）を用いたリフトオフ法により形成される。ハンダ層３０の厚みは、たとえば２．０〜５．０μｍである。
以上のように、本実施形態では、Ａｕからなる導電性金属材料層２３が、ハンダ層配置領域２３ａとハンダ層非配置領域２３ｂとを含み、これらのハンダ層配置領域２３ａとハンダ層非配置領域２３ｂとは空間的に離間している。このため、電子部品１Ａに他の電子部品３を実装する際に、積層体２０上に配置されているハンダ層３０（Ａｕ−Ｓｎ合金ハンダ）は溶融するものの、溶融したＡｕ−Ｓｎ合金ハンダがハンダ層配置領域２３ａからハンダ層非配置領域２３ｂに流れ出すことが抑制される。
電子部品１Ａの製造過程におけるハンダ層３０と導電性金属材料層２３との熱履歴により、導電性金属材料層２３のＡｕがハンダ層３０に拡散し、Ａｕ−Ｓｎ合金ハンダの組成が変化することがある。Ａｕ−Ｓｎ合金ハンダの組成が変化した場合、Ａｕ−Ｓｎ合金ハンダの融点にバラつきが生じたり、他の電子部品３の接合状態が不均一となったりするおそれがある。
これに対し、本実施形態では、ハンダ層配置領域２３ａとハンダ層非配置領域２３ｂとは空間的に離間しているので、導電性金属材料層２３のＡｕがハンダ層３０に拡散する場合でも、ハンダ層非配置領域２３ｂのＡｕはハンダ層３０に拡散することはなく、導電性金属材料層２３からのＡｕの拡散量は抑制される。このため、Ａｕ−Ｓｎ合金ハンダの組成の変化が抑制される。
これらの結果、電子部品１Ａによれば、Ａｕ−Ｓｎ合金ハンダを用いて他の電子部品３を実装する場合でも、他の電子部品３の実装を適切に行うことができる。
本実施形態では、ハンダ層配置領域２３ａは、ハンダ層非配置領域２３ｂに囲まれるように、ハンダ層非配置領域２３ｂの内側に位置すると共に、その全周においてハンダ層非配置領域２３ｂと空間的に離間している。これにより、溶融したＡｕ−Ｓｎ合金ハンダがハンダ層配置領域２３ａからハンダ層非配置領域２３ｂに流れ出すことがより一層確実に抑制できる。また、ハンダ層配置領域２３ａからのＡｕの拡散量がより一層抑制されるため、Ａｕ−Ｓｎ合金ハンダの組成の変化を確実に抑制することができる。
本実施形態では、ハンダ層配置領域２３ａとハンダ層非配置領域２３ｂとは、導電性金属材料層２３に形成されたスリットにより空間的に離間している。これにより、ハンダ層配置領域２３ａとハンダ層非配置領域２３ｂとが空間的に離間している構成を簡易に実現することができる。
次に、図３を参照して、本実施形態の変形例に係る電子部品１Ｂの構成を説明する。図３は、本実施形態の変形例に係る電子部品の断面構成を説明するための図である。
電子部品１Ｂは、基材１０、積層体２０、ハンダ層３０、及びバリア層４０を備えている。電子部品１Ｂも、電子部品１Ａと同様に、たとえば、他の電子部品３が実装されるサブマウント基板として機能する。
バリア層４０は、積層体２０とハンダ層３０との間に配置されている。バリア層４０は、積層体２０（導電性金属材料層２３）に接すると共に、ハンダ層３０に接している。すなわち、ハンダ層３０は、バリア層４０を介して、積層体２０上に配置されている。バリア層４０は、Ｐｔからなる。バリア層４０は、たとえば、リフトオフ法によりハンダ層３０と共に形成される。バリア層４０の厚みは、たとえば０．２〜０．３μｍである。
本変形例では、バリア層４０により、導電性金属材料層２３（ハンダ層配置領域２３ａ）からのＡｕの拡散が防がれる。したがって、電子部品１Ｂにおいて、Ａｕ−Ｓｎ合金ハンダの組成の変化をより一層確実に抑制することができる。
バリア層４０が積層体２０とハンダ層３０との間に配置されている場合、ハンダ層配置領域２３ａとハンダ層非配置領域２３ｂとが空間的に離間していなくても、ハンダ層配置領域２３ａからハンダ層非配置領域２３ｂへの溶融したＡｕ−Ｓｎ合金ハンダの流れ出しが抑制されることが期待される。しかしながら、以下の事象により、バリア層４０が存在している場合でも、上述した溶融したＡｕ−Ｓｎ合金ハンダの流れ出しは抑制され難い。
ハンダ層３０が上述したリフトオフ法により形成されている場合、フォトレジスト５０の形状に起因して、図４及び図５に示されるように、ハンダ層３０がバリア層４０よりも広く形成される。すなわち、ハンダ層３０は、バリア層４０を覆うと共に積層体２０（導電性金属材料層２３）に接するように形成される。ハンダ層３０の厚みは、一般に、バリア層４０の厚みよりも大きい。このため、ハンダ層３０は、当該ハンダ層３０に平行な方向に広がりやすく、ハンダ層３０がバリア層４０よりもより一層広く形成されてしまう。ハンダ層３０が導電性金属材料層２３に接していると、溶融したＡｕ−Ｓｎ合金ハンダは、導電性金属材料層２３上を濡れ広がるおそれがあり、ハンダ層配置領域２３ａからハンダ層非配置領域２３ｂに流れ出してしまう。
本変形例では、電子部品１Ａと同様に、ハンダ層配置領域２３ａとハンダ層非配置領域２３ｂとは空間的に離間しているので、溶融したＡｕ−Ｓｎ合金ハンダのハンダ層配置領域２３ａからハンダ層非配置領域２３ｂへの流れ出しが確実に抑制される。
以上、本発明の実施形態について説明してきたが、本発明は必ずしも上述した実施形態に限定されるものではなく、その要旨を逸脱しない範囲で様々な変更が可能である。
基材１０は、表面入射型のフォトダイオードに限られない。基材１０は、図６及び図７に示されるように、少なくともいずれか一つの側面１１ｃが光入射面である側面入射型のフォトダイオードであってもよい。図６及び図７に示された電子部品１Ａでは、パッシベーション膜１５から露出するように、カソード電極（パッド）６１と、アノード電極（パッド）６３と、が配置されている。図６は、本実施形態の他の変形例に係る電子部品を示す平面図である。図７は、本実施形態の他の変形例に係る電子部品の断面構成を説明するための図である。
ハンダ層配置領域２３ａは、ハンダ層非配置領域２３ｂに囲まれるように、ハンダ層非配置領域２３ｂの内側に位置すると共に、その全周においてハンダ層非配置領域２３ｂと空間的に離間している必要はない。たとえば、ハンダ層配置領域２３ａとハンダ層非配置領域２３ｂとは、図８に示されるように、直線状のスリット２３ｃで分割されるように空間的に離間していてもよい。
積層体２０は、三層の導電性金属材料層２１，２２，２３からなる必要はない。積層体２０は、二層の導電性金属材料層からなっていてもよく、また、四層以上の導電性金属材料層からなっていてもよい。これらの場合でも、積層体２０における最外層を構成する導電性金属材料層、すなわち表面層がＡｕからなっていればよい。
基材１０は、フォトダイオードでなくてもよく、また、基材１０は、半導体基板１１を含んでいる必要はない。基材１０は、半導体基板１１の代わりに、たとえばセラミック基板又はガラス基板などを含んでいてもよい。セラミック基板には、窒化アルミニウム（ＡｌＮ）基板又はアルミナ（Ａｌ２Ｏ３）基板などが用いられる。
電子部品１Ａ，１Ｂに実装される他の電子部品３は、レーザーダイオードである必要はない。他の電子部品３は、たとえば受光素子、発光素子、半導体パッケージ、回路基板、能動部品、又は受動部品であってもよい。
１Ａ，１Ｂ…電子部品、１０…基材、２０…積層体、２１，２２，２３…導電性金属材料層、２３ａ…ハンダ層配置領域、２３ｂ…ハンダ層非配置領域、２３ｃ…スリット、３０…ハンダ層、４０…バリア層。

Claims (4)

  1. 基材と、
    前記基材上に配置されている、複数の導電性金属材料層の積層体と、
    前記積層体上に配置されている、Ａｕ−Ｓｎ合金ハンダからなるハンダ層と、を備え、
    前記積層体は、最外層を構成する前記導電性金属材料層として、Ａｕからなる表面層を有し、
    前記表面層は、前記ハンダ層が配置されるハンダ層配置領域と、前記ハンダ層が配置されないハンダ層非配置領域と、を含み、
    前記ハンダ層配置領域と前記ハンダ層非配置領域とは、空間的に離間していることを特徴とする電子部品。
  2. 前記ハンダ層配置領域は、前記ハンダ層非配置領域に囲まれるように、前記ハンダ層非配置領域の内側に位置すると共に、その全周において前記ハンダ層非配置領域と空間的に離間していることを特徴とする請求項１に記載の電子部品。
  3. 前記ハンダ層配置領域と前記ハンダ層非配置領域とは、前記表面層に形成されたスリットにより空間的に離間していることを特徴とする請求項１又は２に記載の電子部品。
  4. 前記ハンダ層は、Ｐｔからなるバリア層を介して、前記積層体上に配置されていることを特徴とする請求項１〜３のいずれか一項に記載の電子部品。
JP2014161240A 2014-08-07 2014-08-07 電子部品 Expired - Fee Related JP6546376B2 (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP2014161240A JP6546376B2 (ja) 2014-08-07 2014-08-07 電子部品
CN201580042313.6A CN106663641B (zh) 2014-08-07 2015-08-05 电子部件
KR1020167031733A KR102387336B1 (ko) 2014-08-07 2015-08-05 전자 부품
PCT/JP2015/072215 WO2016021632A1 (ja) 2014-08-07 2015-08-05 電子部品
US15/320,835 US20170200693A1 (en) 2014-08-07 2015-08-05 Electronic component
TW104125674A TWI711137B (zh) 2014-08-07 2015-08-06 電子零件

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2014161240A JP6546376B2 (ja) 2014-08-07 2014-08-07 電子部品

Publications (2)

Publication Number Publication Date
JP2016039240A true JP2016039240A (ja) 2016-03-22
JP6546376B2 JP6546376B2 (ja) 2019-07-17

Family

ID=55263893

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2014161240A Expired - Fee Related JP6546376B2 (ja) 2014-08-07 2014-08-07 電子部品

Country Status (6)

Country Link
US (1) US20170200693A1 (ja)
JP (1) JP6546376B2 (ja)
KR (1) KR102387336B1 (ja)
CN (1) CN106663641B (ja)
TW (1) TWI711137B (ja)
WO (1) WO2016021632A1 (ja)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004039988A (ja) * 2002-07-05 2004-02-05 Shinko Electric Ind Co Ltd 素子搭載用回路基板及び電子装置
JP2006086453A (ja) * 2004-09-17 2006-03-30 Yamato Denki Kogyo Kk 表面処理方法、および電子部品の製造方法
JP2013125768A (ja) * 2011-12-13 2013-06-24 Japan Oclaro Inc はんだ接合デバイス及び受信モジュール

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4201432B2 (ja) 1999-04-23 2008-12-24 ローム株式会社 光検出用モジュール
JP3700598B2 (ja) * 2001-03-21 2005-09-28 セイコーエプソン株式会社 半導体チップ及び半導体装置、回路基板並びに電子機器
FR2848338B1 (fr) * 2002-12-05 2005-05-13 Cit Alcatel Procede de fabrication d'un module electronique comportant un composant actif sur une embase
JP5526336B2 (ja) * 2007-02-27 2014-06-18 Ｄｏｗａエレクトロニクス株式会社 半田層及びそれを用いたデバイス接合用基板並びにその製造方法
JP2008258459A (ja) * 2007-04-06 2008-10-23 Toshiba Corp 発光装置及びその製造方法
JP5882014B2 (ja) * 2011-10-04 2016-03-09 エスアイアイ・セミコンダクタ株式会社 半導体装置
JP5716627B2 (ja) * 2011-10-06 2015-05-13 オムロン株式会社 ウエハの接合方法及び接合部の構造
US9520370B2 (en) * 2014-05-20 2016-12-13 Micron Technology, Inc. Methods of forming semiconductor device assemblies and interconnect structures, and related semiconductor device assemblies and interconnect structures

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004039988A (ja) * 2002-07-05 2004-02-05 Shinko Electric Ind Co Ltd 素子搭載用回路基板及び電子装置
JP2006086453A (ja) * 2004-09-17 2006-03-30 Yamato Denki Kogyo Kk 表面処理方法、および電子部品の製造方法
JP2013125768A (ja) * 2011-12-13 2013-06-24 Japan Oclaro Inc はんだ接合デバイス及び受信モジュール

Also Published As

Publication number Publication date
US20170200693A1 (en) 2017-07-13
TWI711137B (zh) 2020-11-21
JP6546376B2 (ja) 2019-07-17
KR20170040119A (ko) 2017-04-12
CN106663641B (zh) 2019-07-16
TW201606966A (zh) 2016-02-16
KR102387336B1 (ko) 2022-04-15
WO2016021632A1 (ja) 2016-02-11
CN106663641A (zh) 2017-05-10

Similar Documents

Publication Publication Date Title
US8450760B2 (en) Semiconductor light emitting device with integrated electronic components
JP6029760B2 (ja) オプトエレクトロニクス半導体モジュール
JP6195689B1 (ja) パワーモジュール
JP2006210777A (ja) 半導体装置
TWI414082B (zh) 具有過電壓保護之發光二極體晶片
JP2016219505A (ja) 発光装置
JP2005354060A (ja) 表面実装型チップスケールパッケージ
KR20130119496A (ko) 캐리어 기판 및 반도체칩 제조 방법
JP2017130527A (ja) 半導体装置
US20150342027A1 (en) Component Carrier and Component Carrier Arrangement
US10546988B2 (en) Light emitting device and solder bond structure
US8772822B2 (en) Light emitting device
JP6546376B2 (ja) 電子部品
JP2016219504A (ja) 発光装置
TWI604584B (zh) 晶片尺寸級封裝和半導體裝置組件
JP5741164B2 (ja) 発光素子
JP6331906B2 (ja) 発光素子
JP6057161B2 (ja) 発光装置
US10483256B2 (en) Optoelectronic semiconductor device and apparatus with an optoelectronic semiconductor device
CN114649458A (zh) 发光装置
JP2013069988A (ja) 半導体装置とその製造方法
US10651038B2 (en) Semiconductor device
JP2009076614A (ja) 半導体装置
JP2017011084A (ja) ホトカプラ
JP2022182250A (ja) 配線基板、電子装置および配線基板の製造方法

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20170324

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20171121

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20180117

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20180314

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20180904

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20181031

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20181226

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20190528

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20190621

R150 Certificate of patent or registration of utility model

Ref document number: 6546376

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

LAPS Cancellation because of no payment of annual fees