TWI711137B - 電子零件 - Google Patents

電子零件 Download PDF

Info

Publication number
TWI711137B
TWI711137B TW104125674A TW104125674A TWI711137B TW I711137 B TWI711137 B TW I711137B TW 104125674 A TW104125674 A TW 104125674A TW 104125674 A TW104125674 A TW 104125674A TW I711137 B TWI711137 B TW I711137B
Authority
TW
Taiwan
Prior art keywords
solder layer
layer
solder
area
metal material
Prior art date
Application number
TW104125674A
Other languages
English (en)
Other versions
TW201606966A (zh
Inventor
藤井義磨郎
小栗洋
坂本�明
田口智也
Original Assignee
日商濱松赫德尼古斯股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日商濱松赫德尼古斯股份有限公司 filed Critical 日商濱松赫德尼古斯股份有限公司
Publication of TW201606966A publication Critical patent/TW201606966A/zh
Application granted granted Critical
Publication of TWI711137B publication Critical patent/TWI711137B/zh

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/15Ceramic or glass substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/02002Arrangements for conducting electric current to or from the device in operations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0203Containers; Encapsulations, e.g. encapsulation of photodiodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0216Coatings
    • H01L31/02161Coatings for devices characterised by at least one potential jump barrier or surface barrier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0224Electrodes
    • H01L31/022408Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/102Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
    • H01L31/103Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier being of the PN homojunction type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • H01L2021/60007Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation involving a soldering or an alloying process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/03Manufacturing methods
    • H01L2224/0347Manufacturing methods using a lift-off mask
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04026Bonding areas specifically adapted for layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001Internal layers
    • H01L2224/05075Plural internal layers
    • H01L2224/0508Plural internal layers being stacked
    • H01L2224/05082Two-layer arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001Internal layers
    • H01L2224/05099Material
    • H01L2224/051Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05163Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/05166Titanium [Ti] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001Internal layers
    • H01L2224/05099Material
    • H01L2224/051Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05163Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/05169Platinum [Pt] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001Internal layers
    • H01L2224/05099Material
    • H01L2224/051Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05163Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/05171Chromium [Cr] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05644Gold [Au] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05663Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/05669Platinum [Pt] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13101Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13111Tin [Sn] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13144Gold [Au] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/2612Auxiliary members for layer connectors, e.g. spacers
    • H01L2224/26122Auxiliary members for layer connectors, e.g. spacers being formed on the semiconductor or solid-state body to be connected
    • H01L2224/26145Flow barriers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/2612Auxiliary members for layer connectors, e.g. spacers
    • H01L2224/26152Auxiliary members for layer connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
    • H01L2224/26175Flow barriers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27Manufacturing methods
    • H01L2224/2747Manufacturing methods using a lift-off mask
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/28105Layer connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. layer connectors on chip-scale packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/2901Shape
    • H01L2224/29011Shape comprising apertures or cavities
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/2901Shape
    • H01L2224/29012Shape in top view
    • H01L2224/29013Shape in top view being rectangular or square
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/2901Shape
    • H01L2224/29016Shape in side view
    • H01L2224/29018Shape in side view comprising protrusions or indentations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29075Plural core members
    • H01L2224/2908Plural core members being stacked
    • H01L2224/29083Three-layer arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29144Gold [Au] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29163Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/29166Titanium [Ti] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29163Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/29169Platinum [Pt] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29163Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/29171Chromium [Cr] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/731Location prior to the connecting process
    • H01L2224/73101Location prior to the connecting process on the same surface
    • H01L2224/73103Bump and layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83191Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83192Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8336Bonding interfaces of the semiconductor or solid state body
    • H01L2224/83365Shape, e.g. interlocking features
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385Shape, e.g. interlocking features
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399Material
    • H01L2224/834Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83438Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/83444Gold [Au] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399Material
    • H01L2224/834Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83463Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/83469Platinum [Pt] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/83801Soldering or alloying
    • H01L2224/83815Reflow soldering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/03Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12042LASER
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12043Photo diode

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

本發明之電子零件1A包含基板10、複數層導電性金屬材料層21、22、23之積層體20、及包含Au-Sn合金焊料之焊料層30。積層體20配置於基材10上。焊料層30配置於積層體20上。積層體20具有包含Au之表面層,作為構成最外層之導電性金屬材料層23。表面層包含供配置焊料層30之焊料層配置區域23a、及不配置焊料層30之焊料層非配置區域23b。焊料層配置區域23a與焊料層非配置區域23h係空間性隔開。

Description

電子零件
本發明係關於電子零件。
具備光電二極體、配置於光電二極體之上表面之受光部以外之部位之端子、及配置於端子之凸塊之電子零件為已知(例如,參照專利文獻1)。於該電子零件,安裝IC晶片作為其他電子零件。
[先前技術文獻] [專利文獻]
[專利文獻1]日本專利特開2000-307133號公報
本發明之一態樣之目的在於提供一種即便於使用Au-Sn合金焊料安裝其他電子零件之情形,亦可適當進行該其他電子零件之安裝之電子零件。
本發明之一態樣之電子零件包含基材、配置於基材上之複數層導電性金屬材料層之積層體、配置於積層體上且包含Au-Su合金焊料之焊料層。積層體具有包含Au之表面層,作為構成最外層之導電性金屬材料層。表面層包含供配置焊料層之焊料層配置區域、與不配置焊料層之焊料層非配置區域。焊料層配置區域與焊料層非配置區域係空間性隔開。
於本態樣之電子零件中,構成積層體之最外層之包含Au之表面層包含焊料層配置區域與焊料層非配置區域,焊料層配置區域與焊料層非配置區域係空間性隔開。於上述一態樣之電子零件安裝其他電子零件時,配置於積層體上之焊料層(Au-Sn合金焊料)熔融。熔融之Au-Sn合金焊料自焊料層配置區域流出至焊料層非配置區域之情形被抑制。
因焊料層與表面層之受熱歷程,而有表面層之Au擴散至焊料層,使Au-Sn合金焊料之組成發生變化之情況。於Au-Sn合金焊料之組成發生變化時,有Au-Sn合金焊料之熔點產生差異、或其他電子零件之接合狀態變得不均一之虞。如上所述,因焊料層配置區域與焊料層非配置區域係空間性隔開,故即便表面層之Au擴散至焊料層時,焊料層非配置區域之Au亦不會擴散至焊料層。因來自表面層之Au之擴散量受抑制,故Au-Sn合金焊料之組成變化受抑制。
由上述,根據本態樣,即便使用Au-Sn合金焊料安裝其他電子零件時,亦可適當進行該其他電子零件之安裝。
焊料層配置區域亦可以被焊料層非配置區域包圍之方式位於焊料層非配置區域之內側,且於其全周與焊料層非配置區域空間性隔開。該情形時,可進一步確實地抑制熔融之Au-Sn合金焊料自焊料層配置區域流出至焊料層非配置區域。因來自焊料層配置區域之Au之擴散量進一步被抑制,故可確實地抑制Au-Sn合金焊料之組成變化。
焊料層配置區域與焊料層非配置區域亦可藉由形成於表面層之狹縫而空間性隔開。該情形時,可簡易實現焊料層配置區域與焊料層非配置區域空間性隔開之構成。
焊料層亦可介隔包含Pt之障壁層而配置於積層體上。該情形時,因防止來自焊料層配置區域之Au之擴散,故可進一步確實地抑制Au-Sn合金焊料之組成變化。
根據本發明之上述一態樣,即便於使用Au-Sn合金焊料安裝其他電子零件之情形時,亦可提供可適當進行該其他電子零件之安裝之電子零件。
1A‧‧‧電子零件
1B‧‧‧電子零件
3‧‧‧電子零件
10‧‧‧基材
11‧‧‧半導體基板
11a‧‧‧主表面
11b‧‧‧主表面
11c‧‧‧側面
13‧‧‧第1半導體區域
15‧‧‧鈍化膜
15a‧‧‧開口
20‧‧‧積層體
21~23‧‧‧導電性金屬材料層
23a‧‧‧焊料層配置區域
23b‧‧‧焊料層非配置區域
23c‧‧‧狹縫
30‧‧‧焊料層
40‧‧‧障壁層
50‧‧‧光阻劑
61‧‧‧陰極電極
63‧‧‧陽極電極
圖1係顯示一實施形態之電子零件之俯視圖。
圖2係用以說明沿圖1所示之II-II線之剖面構成之圖。
圖3係用以說明本實施形態之變化例之電子零件之剖面構成之圖。
圖4係用以說明形成焊料層之過程之圖。
圖5係用以說明焊料層配置區域與焊料層非配置區域未空間性隔開之電子零件之剖面構成之圖。
圖6係顯示本實施形態之其他變化例之電子零件之俯視圖。
圖7係用以說明本實施形態之其他變化例之電子零件之剖面構成之圖。
圖8係顯示本實施形態之其他變化例之電子零件之俯視圖。
於下文中,一面參照圖式一面詳細說明本發明之實施形態。另,於說明中,於相同要件或具有相同功能之要件使用相同符號,且省略重複說明。
參照圖1及圖2,說明本實施形態之電子零件1A之構成。圖1係本實施形態之電子零件之俯視圖。圖2係用以說明沿圖1所示之II-II線之剖面構成之圖。
電子零件1A包含基材10、積層體20、及焊料層30。電子零件1A例如作為供安裝其他電子零件3之子安裝基板而發揮功能。其他電子零件3為例如雷射二極體等。所謂安裝,不僅包含電性且物理性連 接,亦包含僅物理性連接之情形。
基材10包含半導體基板11。半導體基板11係具有彼此對向之一對主表面11a、11b、與側面11c之第1導電型(例如N型)之矽基板。側面11c係以連結一對主表面11a、11b間之方式於一對主表面11a、11b之對向方向延伸。於本實施形態中,如圖1所示,半導體基板11於俯視時呈矩形形狀,且具有四個側面11c。
半導體基板11具有位於主表面11a側之第二導電型(例如P型)之第1半導體區域13。第一半導體區域13係添加有第二導電型之雜質(硼等)之區域。第一半導體區域13之雜質濃度高於半導體基板11。第一半導體區域13係例如藉由利用離子注入法或擴散法,將第二導電型之雜質自主表面11a側添加至半導體基板11而形成。
於基材10中,以半導體基板11與第一半導體區域13形成PN接合。即,基材10係其主表面11a為光入射面之表面入射型光電二極體。第一半導體區域13與半導體基板11構成光感應區域。於將作為其他電子零件3之雷射二極體安裝於電子零件1A之情形時,上述光電二極體監控雷射二極體之輸出。
基材10包含鈍化膜15。鈍化膜15配置於半導體基板11之主表面11a上。於鈍化膜15,於與第一半導體區域13對應之位置形成有開口15a。於第一半導體區域13(光感應區域),通過形成於鈍化膜15之開口15a而入射光。鈍化膜15包含例如SiN。鈍化膜15係藉由例如CVD(Chemical Vapor Deposition:化學氣相沈積)法而形成。於本實施形態中,省略了連接於上述光電二極體之陰極電極(焊墊)及陽極電極(焊墊)之圖示。
積層體20係配置於基材10(鈍化膜15)上。詳細而言,積層體20係配置於鈍化膜15中未形成開口15a之區域上。積層體20包含複數層導電性金屬材料層。於本實施形態中,積層體20包含三層之導電性金屬 材料層21、22、23。各導電性金屬材料層21、22、23係包含導電性金屬材料之層。三層之導電性金屬材料層21、22、23係自基材10側按導電性金屬材料層21、導電性金屬材料層22、導電性金屬材料層23之順序積層而成。各導電性金屬材料層21、22、23係藉由例如真空蒸鍍法或濺鍍法而形成。
導電性金屬材料層21係構成與基材10(鈍化膜15)之接觸層。導電性金屬材料層21提高與基材10(鈍化膜15)之密接性。導電性金屬材料層21例如包含Ti。導電性金屬材料層21之厚度例如為0.1~0.2μm。導電性金屬材料層21除Ti以外,亦可包含Cr等。
導電性金屬材料層22構成中間障壁層。導電性金屬材料層22係防止來自其他導電性金屬材料層21、23之金屬材料(金屬原子)擴散。導電性金屬材料層22例如包含Pt。導電性金屬材料層22之厚度例如為0.2~0.3μm。
導電性金屬材料層23構成積層體20之最外層。即,導電性金屬材料層23構成表面層。導電性金屬材料層23例如包含Au。導電性金屬材料層23之厚度例如為0.1~0.5μm。
導電性金屬材料層23包含供配置焊料層30之焊料層配置區域23a、及不配置焊料層30之焊料層非配置區域23b。焊料層配置區域23a與焊料層非配置區域23b係於導電性金屬材料層22上,空間性隔開。即,於焊料層配置區域23a與焊料層非配置區域23b空間性隔開之區域中,露出導電性金屬材料層22。
於本實施形態中,焊料層配置區域23a係以被焊料層非配置區域23b包圍之方式,位於焊料層非配置區域23b之內側,且於其全周與焊料層非配置區域23b空間性隔開。焊料層配置區域23a與焊料層非配置區域23b係藉由形成於導電性金屬材料層23之狹縫23c而空間性隔開。
焊料層30包含Au-Sn合金焊料,且配置於積層體20(導電性金屬材 料層23之焊料層配置區域23a)上。焊料層30相接於導電性金屬材料層23(焊料層配置區域23a)。焊料層30係藉由例如使用光阻劑(負型光阻劑)之脫除法而形成。焊料層30之厚度例如為2.0~5.0μm。
如上所述,於本實施形態中,包含Au之導電性金屬材料層23包含焊料層配置區域23a與焊料層非配置區域23b,且焊料層配置區域23a與焊料層非配置區域23b空間性隔開。於電子零件1A上安裝其他電子零件3時,配置於積層體20上之焊料層30(Au-Sn合金焊料)熔融。熔融之Au-Sn合金焊料自焊料層配置區域23a流出至焊料層非配置區域23b之情形受到抑制。
因電子零件1A之製造過程中焊料層30與導電性金屬材料層23之受熱歷程,而有導電性金屬材料層23之Au擴散至焊料層30,使得Au-Sn合金焊料之組成發生變化之情況。於Au-Sn合金焊料之組成發生變化時,有Au-Sn合金焊料之熔點產生差異、或其他電子零件3之接合狀態變得不均一之虞。
於本實施形態中,因焊料層配置區域23a與焊料層非配置區域23b空間性隔開,故即便於導電性金屬材料層23之Au擴散至焊料層30之情形,焊料層非配置區域23b之Au亦不會擴散至焊料層30。因來自導電性金屬材料層23之Au之擴散量受到抑制,故Au-Sn合金焊料之組成變化受到抑制。
該等之結果,依據電子零件1A,即便於使用Au-Sn合金焊料安裝其他電子零件3時,亦可適當地進行其他電子零件3之安裝。
於本實施形態中,焊料層配置區域23a係以被焊料層非配置區域23b包圍之方式,位於焊料層非配置區域23b之內側,且於其全周與焊料層非配置區域23b空間性隔開。藉此,可進一步確實地抑制熔融之Au-Sn合金焊料自焊料層配置區域23a流出至焊料層非配置區域23b。因可進一步抑制來自焊料層配置區域23a之Au之擴散量,故可確實地 抑制Au-Sn合金焊料之組成變化。
於本實施形態中,焊料層配置區域23a與焊料層非配置區域23b係藉由形成於導電性金屬材料層23之狹縫而空間性隔開。藉此,可簡單實現焊料層配置區域23a與焊料層非配置區域23b空間性隔開之構成。
其次,參照圖3,說明本實施形態之變化例之電子零件1B之構成。圖3係用以說明本實施形態之變化例之電子零件之剖面構成之圖。
電子零件1B包含基材10、積層體20、焊料層30、及障壁層40。電子零件1B亦與電子零件1A同樣,例如作為供安裝其他電子零件3之子安裝基板而發揮功能。
障壁層40係配置於積層體20與焊料層30之間。障壁層40相接於積層體20(導電性金屬材料層23),且相接於焊料層30。即,焊料層30係介隔障壁層40而配置於積層體20上。障壁層40包含Pt。障壁層40例如藉由脫除法而與焊料層30一起形成。障壁層40之厚度例如為0.2~0.3μm。
於本變化例中,藉由障壁層40防止來自導電性金屬材料層23(焊料層配置區域23a)之Au擴散。因此,於電子零件1B中,可進一步確實地抑制Au-Sn合金焊料之組成變化。
於障壁層40配置於積層體20與焊料層30之間之情形,即便焊料層配置區域23a與焊料層非配置區域23b未空間性隔開,亦期待能抑制熔融之Au-Sn合金焊料自焊料層配置區域23a向焊料層非配置區域23b之流出。然而,由於下述事況,即便於存在障壁層40之情形,亦難以抑制上述熔融之Au-Sn合金焊料之流出。
於焊料層30藉由上述之脫除法而形成之情形,因光阻劑50之形狀而如圖4及圖5所示,焊料層30形成為較障壁層40更廣。即,焊料層30係以覆蓋障壁層40且與積層體20(導電性金屬材料層23)相接之方式 形成。焊料層30之厚度一般大於障壁層40之厚度。因此,焊料層30容易於平行於該焊料層30之方向擴開,致使焊料層30形成為比障壁層40更廣。若焊料層30相接於導電性金屬材料層23,則熔融之Au-Sn合金焊料有於導電性金屬材料層23上潤開之虞。因此,熔融之Au-Sn合金自焊料層配置區域23a流出至焊料層非配置區域23b。
於本變化例中,與電子零件1A同樣,焊料層配置區域23a與焊料層非配置區域23b空間性隔開。藉此,熔融之Au-Sn合金焊料自焊料層配置區域23a向焊料層非配置區域23b之流出確實被抑制。
以上雖說明了本發明之實施形態,但本發明並非限定於上述實施形態者,亦可在未脫離其主旨之範圍內進行各種變化。
基材10並未限定於表面入射型之光電二極體。基材10亦可為如圖6及圖7所示,至少一者之側面11c為光入射面之側面入射型之光電二極體。於圖6及圖7所示之電子零件1A中,以自鈍化膜15露出之方式,配置陰極電極(焊墊)61、與陽極電極(焊墊)63。圖6係顯示本實施形態之其他變化例之電子零件之俯視圖。圖7係用以說明本實施形態之其他變化例之電子零件之剖面構成之圖。
焊料層配置區域23a並無必要以被焊料層非配置區域23b包圍之方式位於焊料層非配置區域23b之內側且於其全周與焊料層非配置區域23b空間性隔開。例如,焊料層配置區域23a與焊料層非配置區域23b亦可如圖8所示,以被直線狀之狹縫23c分割之方式空間性隔開。
積層體20未必包含三層之導電性金屬材料層21、22、23。積層體20亦可包含二層之導電性金屬材料層,又可包含四層以上之導電性金屬材料層。於該等之情形,只要積層體20中的構成最外層之導電性金屬材料層,即表面層包含Au即可。
基材10亦可不為光電二極體,又,基材10未必包含半導體基板11。基材10亦可包含例如陶瓷基板或玻璃基板等取代半導體基板11。 陶瓷基板係使用氮化鋁(AlN)基板或氧化鋁(Al2O3)基板等。
安裝於電子零件1A、1B之其他電子零件3未必為雷射二極體。其他電子零件3亦可為例如受光元件、發光元件、半導體封裝、電路基板、主動零件、或被動零件。
[產業上之可利用性]
本發明可用於子安裝基板等之電子零件。
1A‧‧‧電子零件
3‧‧‧電子零件
10‧‧‧基材
11‧‧‧半導體基板
11a‧‧‧主表面
11b‧‧‧主表面
11c‧‧‧側面
13‧‧‧第1半導體區域
15‧‧‧鈍化膜
15a‧‧‧開口
20‧‧‧積層體
21~23‧‧‧導電性金屬材料層
23a‧‧‧焊料層配置區域
23b‧‧‧焊料層非配置區域
23c‧‧‧狹縫
30‧‧‧焊料層

Claims (6)

  1. 一種電子零件,其包含:基材;複數層導電性金屬材料層之積層體,其配置於上述基材上;及焊料層,其配置於上述積層體上,且包含Au-Sn合金焊料;且上述積層體具有含Au之表面層,作為構成最外層之上述導電性金屬材料層;上述表面層包含供配置上述焊料層之焊料層配置區域、及不配置上述焊料層之焊料層非配置區域;上述焊料層配置區域與上述焊料層相接;上述焊料層配置區域與上述焊料層非配置區域係空間性隔開。
  2. 如請求項1之電子零件,其中上述焊料層配置區域係以被上述焊料層非配置區域包圍之方式,位於上述焊料層非配置區域之內側,且其全周與上述焊料層非配置區域空間性隔開。
  3. 如請求項1之電子零件,其中上述焊料層配置區域與上述焊料層非配置區域係藉由形成於上述表面層之狹縫而空間性隔開。
  4. 如請求項2之電子零件,其中上述焊料層配置區域與上述焊料層非配置區域係藉由形成於上述表面層之狹縫而空間性隔開。
  5. 如請求項1至4中任一項之電子零件,其中於上述焊料層配置區域與上述焊料層非配置區域空間性隔開之區域,上述表面層下之上述導電性金屬材料層露出。
  6. 一種電子零件,其包含:基材; 複數層導電性金屬材料層之積層體,其配置於上述基材上;焊料層,其配置於上述積層體上,且包含Au-Sn合金焊料;及包含Pt之障壁層,其配置於上述積層體與上述焊料層之間;上述積層體具有含Au之表面層,作為構成最外層之上述導電性金屬材料層;上述表面層包含供配置上述焊料層之焊料層配置區域、及不配置上述焊料層之焊料層非配置區域;上述障壁層係與上述焊料層配置區域相接,並且與上述焊料層相接;上述焊料層配置區域與上述焊料層非配置區域係空間性隔開。
TW104125674A 2014-08-07 2015-08-06 電子零件 TWI711137B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2014-161240 2014-08-07
JP2014161240A JP6546376B2 (ja) 2014-08-07 2014-08-07 電子部品

Publications (2)

Publication Number Publication Date
TW201606966A TW201606966A (zh) 2016-02-16
TWI711137B true TWI711137B (zh) 2020-11-21

Family

ID=55263893

Family Applications (1)

Application Number Title Priority Date Filing Date
TW104125674A TWI711137B (zh) 2014-08-07 2015-08-06 電子零件

Country Status (6)

Country Link
US (1) US20170200693A1 (zh)
JP (1) JP6546376B2 (zh)
KR (1) KR102387336B1 (zh)
CN (1) CN106663641B (zh)
TW (1) TWI711137B (zh)
WO (1) WO2016021632A1 (zh)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004039988A (ja) * 2002-07-05 2004-02-05 Shinko Electric Ind Co Ltd 素子搭載用回路基板及び電子装置
JP2013080841A (ja) * 2011-10-04 2013-05-02 Seiko Instruments Inc 半導体装置
US20140339710A1 (en) * 2011-10-06 2014-11-20 Omron Corporation Method for bonding wafers and structure of bonding part
US20150340328A1 (en) * 2014-05-20 2015-11-26 Micron Technology, Inc. Methods of forming semiconductor device assemblies and interconnect structures, and related semiconductor device assemblies and interconnect structures

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4201432B2 (ja) 1999-04-23 2008-12-24 ローム株式会社 光検出用モジュール
JP3700598B2 (ja) * 2001-03-21 2005-09-28 セイコーエプソン株式会社 半導体チップ及び半導体装置、回路基板並びに電子機器
FR2848338B1 (fr) * 2002-12-05 2005-05-13 Cit Alcatel Procede de fabrication d'un module electronique comportant un composant actif sur une embase
JP2006086453A (ja) * 2004-09-17 2006-03-30 Yamato Denki Kogyo Kk 表面処理方法、および電子部品の製造方法
JP5526336B2 (ja) * 2007-02-27 2014-06-18 Dowaエレクトロニクス株式会社 半田層及びそれを用いたデバイス接合用基板並びにその製造方法
JP2008258459A (ja) * 2007-04-06 2008-10-23 Toshiba Corp 発光装置及びその製造方法
JP2013125768A (ja) * 2011-12-13 2013-06-24 Japan Oclaro Inc はんだ接合デバイス及び受信モジュール

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004039988A (ja) * 2002-07-05 2004-02-05 Shinko Electric Ind Co Ltd 素子搭載用回路基板及び電子装置
JP2013080841A (ja) * 2011-10-04 2013-05-02 Seiko Instruments Inc 半導体装置
US20140339710A1 (en) * 2011-10-06 2014-11-20 Omron Corporation Method for bonding wafers and structure of bonding part
US20150340328A1 (en) * 2014-05-20 2015-11-26 Micron Technology, Inc. Methods of forming semiconductor device assemblies and interconnect structures, and related semiconductor device assemblies and interconnect structures

Also Published As

Publication number Publication date
US20170200693A1 (en) 2017-07-13
JP2016039240A (ja) 2016-03-22
JP6546376B2 (ja) 2019-07-17
KR20170040119A (ko) 2017-04-12
CN106663641B (zh) 2019-07-16
TW201606966A (zh) 2016-02-16
KR102387336B1 (ko) 2022-04-15
WO2016021632A1 (ja) 2016-02-11
CN106663641A (zh) 2017-05-10

Similar Documents

Publication Publication Date Title
JP5394617B2 (ja) 半導体装置及び半導体装置の製造方法及び基板
US8134231B2 (en) Semiconductor chip and semiconductor device
KR101314713B1 (ko) 반도체 장치, 그 제조 방법, 및 기판
TWI414082B (zh) 具有過電壓保護之發光二極體晶片
KR20120099720A (ko) 보호 다이오드 구조물을 갖는 박막 반도체 소자 그리고 박막 반도체 소자를 제조하기 위한 방법
US9966332B2 (en) Solid-state device including a conductive bump connected to a metal pattern and method of manufacturing the same
US7847299B2 (en) Semiconductor device and method of manufacturing the same
KR0184025B1 (ko) 화합물 반도체장치
KR20130119496A (ko) 캐리어 기판 및 반도체칩 제조 방법
JP2016219505A (ja) 発光装置
JP2005354060A (ja) 表面実装型チップスケールパッケージ
KR101296192B1 (ko) 반도체 수광소자 및 광 모듈
US10546988B2 (en) Light emitting device and solder bond structure
TWI711137B (zh) 電子零件
US10483256B2 (en) Optoelectronic semiconductor device and apparatus with an optoelectronic semiconductor device
CN109285767B (zh) 功率器件
CN114649458A (zh) 发光装置
JP6593405B2 (ja) 半導体装置の製造方法
US20150279900A1 (en) Manufacturing method of semiconductor structure
JP7291537B2 (ja) 半導体発光装置
US20190006181A1 (en) Semiconductor device
JP2009076614A (ja) 半導体装置
KR101414648B1 (ko) 발광 소자 패키지 및 그 제조방법
JP4318723B2 (ja) 半導体装置
TWI499014B (zh) 用於光電晶片之載體配置

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees