JP2014506773A5 - - Google Patents
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- JP2014506773A5 JP2014506773A5 JP2013555511A JP2013555511A JP2014506773A5 JP 2014506773 A5 JP2014506773 A5 JP 2014506773A5 JP 2013555511 A JP2013555511 A JP 2013555511A JP 2013555511 A JP2013555511 A JP 2013555511A JP 2014506773 A5 JP2014506773 A5 JP 2014506773A5
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- JP
- Japan
- Prior art keywords
- adc
- stage
- coupled
- pipeline
- sub
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/032,457 US8451152B2 (en) | 2011-02-22 | 2011-02-22 | Pipelined ADC inter-stage error calibration |
| US13/032,457 | 2011-02-22 | ||
| PCT/US2012/026022 WO2012116006A2 (en) | 2011-02-22 | 2012-02-22 | Pipelined adc inter-stage error calibration |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2014506773A JP2014506773A (ja) | 2014-03-17 |
| JP2014506773A5 true JP2014506773A5 (enExample) | 2015-03-26 |
| JP6076268B2 JP6076268B2 (ja) | 2017-02-08 |
Family
ID=46652285
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2013555511A Active JP6076268B2 (ja) | 2011-02-22 | 2012-02-22 | パイプラインadc内部ステージ誤差キャリブレーション |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US8451152B2 (enExample) |
| JP (1) | JP6076268B2 (enExample) |
| CN (1) | CN103392297B (enExample) |
| WO (1) | WO2012116006A2 (enExample) |
Families Citing this family (25)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8368571B2 (en) * | 2011-03-31 | 2013-02-05 | Analog Devices, Inc. | Pipelined ADC having error correction |
| US8358228B2 (en) * | 2011-06-14 | 2013-01-22 | Analog Devices, Inc. | Method for modifying the LMS algorithm to reduce the effect of correlated perturbations |
| US8941518B2 (en) * | 2012-02-14 | 2015-01-27 | Hittite Microwave Corporation | Methods and apparatus for calibrating pipeline analog-to-digital converters having multiple channels |
| US9231539B2 (en) * | 2013-03-06 | 2016-01-05 | Analog Devices Global | Amplifier, a residue amplifier, and an ADC including a residue amplifier |
| US8836558B1 (en) * | 2013-03-15 | 2014-09-16 | Analog Devices, Inc. | Method and device for improving convergence time in correlation-based algorithms |
| US9154146B1 (en) | 2014-06-03 | 2015-10-06 | The Board Of Regents, The University Of Texas System | Dynamic offset injection for CMOS ADC front-end linearization |
| CN104300981B (zh) * | 2014-09-30 | 2018-04-27 | 成都市晶林科技有限公司 | 高速、高精度图像信号模数转换电路 |
| CN105897265B (zh) | 2014-12-12 | 2020-08-21 | 恩智浦美国有限公司 | 具有受控误差校准的模数转换器 |
| US9602121B2 (en) * | 2015-07-07 | 2017-03-21 | Analog Devices, Inc. | Background estimation of comparator offset of an analog-to-digital converter |
| CN107453756B (zh) * | 2017-08-17 | 2020-02-04 | 电子科技大学 | 一种用于流水线adc的前端校准方法 |
| US10284188B1 (en) | 2017-12-29 | 2019-05-07 | Texas Instruments Incorporated | Delay based comparator |
| US10673452B1 (en) | 2018-12-12 | 2020-06-02 | Texas Instruments Incorporated | Analog-to-digital converter with interpolation |
| US10673456B1 (en) | 2018-12-31 | 2020-06-02 | Texas Instruments Incorporated | Conversion and folding circuit for delay-based analog-to-digital converter system |
| US11316526B1 (en) | 2020-12-18 | 2022-04-26 | Texas Instruments Incorporated | Piecewise calibration for highly non-linear multi-stage analog-to-digital converter |
| US11387840B1 (en) | 2020-12-21 | 2022-07-12 | Texas Instruments Incorporated | Delay folding system and method |
| US11309903B1 (en) | 2020-12-23 | 2022-04-19 | Texas Instruments Incorporated | Sampling network with dynamic voltage detector for delay output |
| US11438001B2 (en) | 2020-12-24 | 2022-09-06 | Texas Instruments Incorporated | Gain mismatch correction for voltage-to-delay preamplifier array |
| US11962318B2 (en) | 2021-01-12 | 2024-04-16 | Texas Instruments Incorporated | Calibration scheme for a non-linear ADC |
| CN112910462B (zh) * | 2021-01-15 | 2023-02-21 | 迈科微电子(深圳)有限公司 | 一种基于亚稳态检测的pipeline-SAR ADC数字级间增益校准方法 |
| US11316525B1 (en) | 2021-01-26 | 2022-04-26 | Texas Instruments Incorporated | Lookup-table-based analog-to-digital converter |
| JP2024505551A (ja) | 2021-02-01 | 2024-02-06 | テキサス インスツルメンツ インコーポレイテッド | 非線形システムのためのルックアップテーブル |
| US11881867B2 (en) | 2021-02-01 | 2024-01-23 | Texas Instruments Incorporated | Calibration scheme for filling lookup table in an ADC |
| US12101096B2 (en) | 2021-02-23 | 2024-09-24 | Texas Instruments Incorporated | Differential voltage-to-delay converter with improved CMRR |
| CN113098511B (zh) * | 2021-03-01 | 2023-03-21 | 深圳市纽瑞芯科技有限公司 | 一种流水线逐次逼近型模数转换器的前端自校准方法 |
| US12206424B2 (en) * | 2022-08-30 | 2025-01-21 | Texas Instruments Incorporated | Methods and apparatus to reduce inter-stage gain errors in analog-to-digital converters |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6081215A (en) | 1998-07-06 | 2000-06-27 | Motorola, Inc. | High speed interlaced analog interface |
| US6445317B2 (en) | 1998-11-20 | 2002-09-03 | Telefonaktiebolaget L M Ericsson (Publ) | Adaptively calibrating analog-to-digital conversion |
| JP4547064B2 (ja) | 1999-03-24 | 2010-09-22 | 株式会社アドバンテスト | A/d変換装置およびキャリブレーション装置 |
| JP3865109B2 (ja) * | 2000-02-21 | 2007-01-10 | 横河電機株式会社 | オフセットミスマッチの校正方法及びこれを用いたa/d変換回路 |
| EP1255357B1 (en) * | 2001-05-02 | 2008-11-05 | Texas Instruments Incorporated | Correction of operational amplifier gain error in pipelined analog to digital converters |
| US6563445B1 (en) * | 2001-11-28 | 2003-05-13 | Analog Devices, Inc. | Self-calibration methods and structures for pipelined analog-to-digital converters |
| DE10255354B3 (de) * | 2002-11-27 | 2004-03-04 | Infineon Technologies Ag | A/D-Wandler mit minimiertem Umschaltfehler |
| US7312734B2 (en) | 2005-02-07 | 2007-12-25 | Analog Devices, Inc. | Calibratable analog-to-digital converter system |
| US7280064B2 (en) * | 2005-09-08 | 2007-10-09 | Realtek Semiconductor Corp. | Pipeline ADC with minimum overhead digital error correction |
| US7595748B2 (en) * | 2007-07-23 | 2009-09-29 | Mediatek Inc. | Method of gain error calibration in a pipelined analog-to-digital converter or a cyclic analog-to-digital converter |
| US7554469B2 (en) * | 2007-08-21 | 2009-06-30 | Mediatek Inc. | Method for gain error estimation in an analog-to-digital converter and module thereof |
| US7595744B2 (en) * | 2007-11-27 | 2009-09-29 | Texas Instruments Incorporated | Correcting offset errors associated with a sub-ADC in pipeline analog to digital converters |
| JP2010035140A (ja) * | 2008-07-03 | 2010-02-12 | Nec Electronics Corp | アナログデジタル変換器 |
| CN101741385A (zh) * | 2008-11-10 | 2010-06-16 | 承景科技股份有限公司 | 前后级解析度可调的共享运算放大器的模数转换器 |
| US8106805B2 (en) * | 2009-03-05 | 2012-01-31 | Realtek Semiconductor Corp. | Self-calibrating pipeline ADC and method thereof |
-
2011
- 2011-02-22 US US13/032,457 patent/US8451152B2/en active Active
-
2012
- 2012-02-22 WO PCT/US2012/026022 patent/WO2012116006A2/en not_active Ceased
- 2012-02-22 JP JP2013555511A patent/JP6076268B2/ja active Active
- 2012-02-22 CN CN201280009792.8A patent/CN103392297B/zh active Active
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