JP2014239084A - 回路装置 - Google Patents
回路装置 Download PDFInfo
- Publication number
- JP2014239084A JP2014239084A JP2011217074A JP2011217074A JP2014239084A JP 2014239084 A JP2014239084 A JP 2014239084A JP 2011217074 A JP2011217074 A JP 2011217074A JP 2011217074 A JP2011217074 A JP 2011217074A JP 2014239084 A JP2014239084 A JP 2014239084A
- Authority
- JP
- Japan
- Prior art keywords
- ceramic substrate
- solder
- island
- conductive pattern
- circuit device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/03—Manufacturing methods
- H01L2224/034—Manufacturing methods by blanket deposition of the material of the bonding area
- H01L2224/03444—Manufacturing methods by blanket deposition of the material of the bonding area in gaseous form
- H01L2224/0345—Physical vapour deposition [PVD], e.g. evaporation, or sputtering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04026—Bonding areas specifically adapted for layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05075—Plural internal layers
- H01L2224/0508—Plural internal layers being stacked
- H01L2224/05084—Four-layer arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/05124—Aluminium [Al] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05139—Silver [Ag] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05155—Nickel [Ni] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05166—Titanium [Ti] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05647—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/061—Disposition
- H01L2224/0618—Disposition being disposed on at least two different sides of the body, e.g. dual array
- H01L2224/06181—On opposite sides of the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/07—Structure, shape, material or disposition of the bonding areas after the connecting process
- H01L2224/08—Structure, shape, material or disposition of the bonding areas after the connecting process of an individual bonding area
- H01L2224/081—Disposition
- H01L2224/0812—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/08151—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding the bonding area connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/08153—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding the bonding area connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
- H01L2224/08155—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding the bonding area connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being non-metallic, e.g. being an insulating substrate with or without metallisation
- H01L2224/08168—Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding the bonding area connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being non-metallic, e.g. being an insulating substrate with or without metallisation the bonding area connecting to a bonding area protruding from the surface of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45147—Copper (Cu) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/485—Material
- H01L2224/48505—Material at the bonding interface
- H01L2224/48599—Principal constituent of the connecting portion of the wire connector being Gold (Au)
- H01L2224/486—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/48638—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/48647—Copper (Cu) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/485—Material
- H01L2224/48505—Material at the bonding interface
- H01L2224/48699—Principal constituent of the connecting portion of the wire connector being Aluminium (Al)
- H01L2224/487—Principal constituent of the connecting portion of the wire connector being Aluminium (Al) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/48738—Principal constituent of the connecting portion of the wire connector being Aluminium (Al) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/48747—Copper (Cu) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/485—Material
- H01L2224/48505—Material at the bonding interface
- H01L2224/48799—Principal constituent of the connecting portion of the wire connector being Copper (Cu)
- H01L2224/488—Principal constituent of the connecting portion of the wire connector being Copper (Cu) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/48838—Principal constituent of the connecting portion of the wire connector being Copper (Cu) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/48847—Copper (Cu) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/8038—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/80399—Material
- H01L2224/804—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/80438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/80447—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/80001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by connecting a bonding area directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding
- H01L2224/808—Bonding techniques
- H01L2224/80801—Soldering or alloying
- H01L2224/8082—Diffusion bonding
- H01L2224/8083—Solid-solid interdiffusion
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/85399—Material
- H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/85447—Copper (Cu) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/4827—Materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/07—Structure, shape, material or disposition of the bonding areas after the connecting process
- H01L24/08—Structure, shape, material or disposition of the bonding areas after the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/1026—Compound semiconductors
- H01L2924/1027—IV
- H01L2924/10272—Silicon Carbide [SiC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/1026—Compound semiconductors
- H01L2924/1032—III-V
- H01L2924/1033—Gallium nitride [GaN]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19043—Component type being a resistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/049—Wire bonding
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
- H05K3/0061—Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto a metallic substrate, e.g. a heat sink
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Chemical & Material Sciences (AREA)
- Physics & Mathematics (AREA)
- Materials Engineering (AREA)
- Ceramic Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Structure Of Printed Boards (AREA)
- Die Bonding (AREA)
- Pressure Welding/Diffusion-Bonding (AREA)
Abstract
【課題】 半導体チップの表面から裏面に電流が流れる縦型のパワーMOSがあるが、このパワーMOSの裏面には、裏面電極としてAuが用いられている。そしてCuから成るリードフレームのアイランド、モジュール基板の上に設けられ、Cuから成るアイランドには、半田が設けられてこのパワーMOSが実装されている。
しかし半田の成分であるSnとCuは、Cu−Sn合金を形成し、この合金が、最近では、電気抵抗が大きいとして、もっと抵抗値の低い材料が求められている。
【解決手段】 半導体素子55の裏面の最表面には、Cuを主成分とする裏面電極61が設けられ、アイランド56と前記裏面電極61の界面は、析出CuまたはCuの固相拡散により、直接固着され、第1の導電パターン53と金属ベース51は、Snを主材料とした半田により固着されている。
【選択図】図1
しかし半田の成分であるSnとCuは、Cu−Sn合金を形成し、この合金が、最近では、電気抵抗が大きいとして、もっと抵抗値の低い材料が求められている。
【解決手段】 半導体素子55の裏面の最表面には、Cuを主成分とする裏面電極61が設けられ、アイランド56と前記裏面電極61の界面は、析出CuまたはCuの固相拡散により、直接固着され、第1の導電パターン53と金属ベース51は、Snを主材料とした半田により固着されている。
【選択図】図1
Description
本発明は、CuとCuを接合した回路装置に関する。
地球温暖化により環境変化が著しく、CO2の排出を抑制する動きが活発になっている。そしてこのCO2の排出を抑制する動きの一つとして電力の削減が叫ばれている。
例えば、エアコン、冷蔵庫または洗濯機等もその一つである。これらを駆動する回路装置にも波及し、できる限り電力ロスが少ない回路装置が求められている。
例えば、その回路装置としてインバータモジュールがあり、エアコンや冷蔵庫に取り付けられている。
これらの回路装置は、パワー半導体素子を採用し、大電流が流れるため、内蔵されるパワー半導体チップ等からの発熱が著しい。そしてこの熱がこの半導体素子の駆動能力を低下させるため、ここで多くの損失が発生する。
そのため、放熱性を高めて、半導体素子の温度上昇を抑制したり、半導体素子のON抵抗を少しでも低くする対策が施されている。
例えば、チップの表面から裏面に電流が流れる縦型のパワーMOSがあるが、このパワーMOSの裏面には、裏面電極としてAuが用いられている。そしてCuから成るリードフレームのアイランド、モジュール基板の上に設けられ、Cuから成るアイランドには、半田が設けられてこのパワーMOSが実装されている。
しかし半田の成分であるSnとCuは、Cu−Sn合金を形成し、この合金が、最近では、電気抵抗が大きいとして、もっと抵抗値の低い材料が求められている。
本発明は、これら課題を解決するものである。
本発明は、前述した課題に鑑みて成されたものであり、
金属材料から成る金属ベースと、前記金属ベースの上に設けられるセラミック基板と、前記セラミック基板の裏面に設けられた第1の導電パターンと、前記セラミック基板の表面に設けられたCuを主成分とする第2の導電パターンと、前記第2の導電パターンを構成するアイランドの上に設けられた半導体素子とを少なくとも有し、
前記半導体素子の裏面の最表面には、Cuを主成分とする裏面電極が設けられ、前記アイランドと前記裏面電極の界面は、析出CuまたはCuの固相拡散により、直接固着され、前記第1の導電パターンと前記金属ベースは、Snを主材料とした半田により固着されている事で解決するものである。
金属材料から成る金属ベースと、前記金属ベースの上に設けられるセラミック基板と、前記セラミック基板の裏面に設けられた第1の導電パターンと、前記セラミック基板の表面に設けられたCuを主成分とする第2の導電パターンと、前記第2の導電パターンを構成するアイランドの上に設けられた半導体素子とを少なくとも有し、
前記半導体素子の裏面の最表面には、Cuを主成分とする裏面電極が設けられ、前記アイランドと前記裏面電極の界面は、析出CuまたはCuの固相拡散により、直接固着され、前記第1の導電パターンと前記金属ベースは、Snを主材料とした半田により固着されている事で解決するものである。
半導体素子とセラミック基板とは、固相拡散により接合する為、その間の抵抗値は半田よりも小さい値になり、この回路装置を低損失にできる。更には、熱抵抗も低下し、半導体素子から発生する熱を素早くセラミック基板や金属ベースへと伝えることができる。
一方、金属ベースとセラミック基板との接合には半田を採用している。この半田は、セラミック基板と金属ベースとの熱膨張係数の違いから発生する応力を緩和することができる。尚、セラミック基板と半導体チップは、熱膨張係数が近いため、その接合部において熱膨張係数に起因する応力は金属ベースとセラミック基板との間よりも少ない。また半導体チップは、そのサイズがセラミック基板と比べると非常に小さいので、半導体チップとセラミック基板の間の応力は、更に小さい。そのために、熱応力緩和層を挿入することによる応力緩和の要求は大きくない。また、半導体チップのサイズが小さいから応力は小さい。
固相拡散Cu−Cu接合は、半田接合よりも熱抵抗が低く、半導体チップの熱は下層であるセラミック基板に伝わりやすい。セラミック基板と金属ベースとを接続する半田は、固相拡散と比べると熱抵抗が高いが、当該部分のCu−Cu接合面は広く金属ベースに大量の熱が伝わりやすいため、全体で考えると、応力が少なく、放熱性の高い回路装置が実現できる。
先ず、本出願人は、半田を用いずに、簡単な手法でCuを主成分とする金属を接合する技術を開発したので、その原理、方法について図3を採用して説明し、その後に本発明の回路装置を説明する。
先ずは、図3(A)に示すように、第1の被接合部10および第2の被接合部20を用意する。この第1、第2の被接合部10、20は、Cuを主成分とする第1の基材部11、第2の基材部21と、この基材部の表面に生成された第1の酸化膜Cu12、第2の酸化膜Cu21とから成る。尚、「主成分とする」は、ベースとなる材料が50%を超える値であり、例えば、「Cuを主成分とする。」は、「Cuの含有量が50%を超える数値である。」を意味する。
この基材部は、特に限定されず、数mm〜数cmの厚みのCu板とCu板、Cuの金属細線とプリント基板のCuパッド、プリント基板のCu電極と回路素子裏面のCu電極等と色々な形態で実施が可能である。またこのCuを主成分とするものは、圧延工法でなる板や箔、メッキから成る厚膜、そしてスパッタ等から成る薄膜等で成る。厚みとしては、その境界は無いが、板や箔は、0.1mm程度から、それ以上、厚膜は、数十μmから数百μm、薄膜は、オングストローム単位である。
また酸化膜は、大気中で形成された自然酸化膜で、約10nm程度であるが、意図的に被覆された酸化膜でも良い。
続いて、図3(B)に示すように、第1の被接合部10と第2の被接合部20との間に溶液30を充填する。更に具体的に言えば、Cuの第1の酸化膜12とCuの第2の酸化膜22との間に、溶液30を充填する。この溶液30は、前記酸化Cuを溶出したり、溶解するもので、更にCuを主材料とする基材部に対しては、不活性であるものである。
ここで、溶液30は、例えば、
アンモニア水(NH3OH+H2O)、
シュウ酸(HOOC−COOH+H2O)、
酒石酸(HOOC−CH(OH)−CH(OH)−COOH+H2O)
乳酸(CH3CH(OH)COOH+H2O)
等である。
アンモニア水(NH3OH+H2O)、
シュウ酸(HOOC−COOH+H2O)、
酒石酸(HOOC−CH(OH)−CH(OH)−COOH+H2O)
乳酸(CH3CH(OH)COOH+H2O)
等である。
この溶液は、酸化膜12、22の間に充填され、例えば1μm程度の薄い膜でよい。ここで「充填」と表現したが、例えばCu板とCu板では、一方のCu板の上に、前記溶液を滴下、または霧吹き等で吹き付け、或いは溶液に浸漬して、表面に溶液を設け、この上に他方のCu板を配置する事で実現できる。
この様に、第1の被接合部10と第2の被接合部20との間に溶液30を充填することにより酸化Cu12、22が溶液30に溶出し、第1の酸化膜12、第2の酸化膜22が消失する。その結果、第1の被接合部10、第2の被接合部20は、Cuの表面が基材部の表面、つまりCuが露出する。
アンモニア水で考えれば、アンモニアイオンとCuイオンにより、Cuの錯体が形成される。このCuの錯体は、[Cu(NH3)4]2+で表現される加熱分解性のテトラアミン錯体イオンとして存在すると考えられる。ここでアンモニア水は、Cuに対して不活性であるため、基材部を構成するCuは、アンモニア水と反応せずに残存している。
続いて、第1の被接合部10と第2の被接合部20を加圧した状態で200〜300度程度の温度で加熱する。加熱することで、水分が蒸発し、テトラアミンCu錯イオンが熱分解してアンモニア成分が蒸発する。
これにより、溶液30に於いて、Cuの割合が徐々に高まり、プレス機による加圧により、第1の被接合部10の最表面と第2の被接合部20の最表面の距離が徐々に近づく。
更に、溶液30の中のCu以外の成分、正確には、Cuを主成分とする金属以外の成分の除去が完了すると、第1の被接合部10の最表面と第2の被接合部の最表面と接合される。
第1の基材部11と第2の基材部21との間には、固相拡散が生成されている。つまり基材部11、21の界面を跨ぐように結晶粒が成長している。この様にして、接合が完了すれば加圧を解除する。
以上の工程により、金属間固相拡散による接合が完了する。
尚、第1の基材部11、第2の基材部21は、表面研磨しても良い。例えば、3μm径のダイヤモンドが混入されたダイヤモンドペーストで研磨され、加重は5.8MPaである。実験では加重の保持時間は、5min.〜60min.で行なって良好な結果を得ているが、最近では、数秒の保持でも接合が可能であることがわかっている。
約3%程度のアンモニア水では、接合温度は、200〜300度であるが、酒石酸では、110度〜200度程度である。
またシュウ酸では、ジカルボン酸、酒石酸、クエン酸または乳酸では、オキシカルボン酸によるキレート形成により、酸化Cuを溶かし、アンモニア水から比較すると、Cu−Cu接合がより効果的に形成できる。しかも温度が110度〜200度、好ましいポイントでは、125度程度まで接合温度を低下させることができる。
また、接合される金属は銅を主成分とするものに限定されず、たとえば金を主成分とする金属やアルミニウムを主成分とする金属であっても良い。
また、接合される金属は銅を主成分とするものに限定されず、たとえば金を主成分とする金属やアルミニウムを主成分とする金属であっても良い。
では、図1を参照しながら、回路装置50を説明する。この回路装置は、半導体素子のみで実装されれば、半導体装置であり、半導体素子と受動素子で構成されれば、混成集積回路装置である。また半導体素子が大電流用の半導体素子で構成されれば、パワーモジュールでもある。更に、半導体素子としてLEDが実装されれば、光半導体装置または光モジュールである。またトランスファーモールドで樹脂封止しても良いし、金属から成るキャン封止でも良い。更には、封止対策を施さず、図1の如きモジュールでも良い。ここでは、これらを総称して回路装置と呼ぶ。
では先ずヒートシンクとして機能する金属ベース51がある。ここでは、Cu、またはCuを主成分とする金属から成る。また後述するが、Alでも良い。続いて、耐電圧特性が求められたり、高周波数が求められる事から、セラミック基板52がある。このセラミック基板の材料としては、酸化アルミニウム(Al2O3)、窒化アルミニウム(AlN)または窒化シリコン(Si3N4)等である。
そしてセラミック基板52の表と裏には、CuまたはCuを主成分とする金属からなる導電パターンが設けられている。裏面の第1の導電パターン53は、実質セラミック基板52の裏面の殆どに設けられている。或いは、外周から若干内側に入って全域に設けても良い。これは、金属ベース51と半田で接続するためのものである。
一方、表面の第2の導電パターン54も、第1の導電パターンと同一の材料で成る。ここでは、回路パターンが形成され、半導体素子55が実装されるアイランド56、半導体素子55または受動素子57と電気的に接続されるパッド58、59がある。更には、パッド58、59またはアイランド56と一体で、またはアイランド状に配置される配線がある。
半導体素子55は、図面では、大電流用の半導体素子を示し、Si、SiCまたはGaN等の半導体材料から成る縦型の半導体素子である。表面のボンディングパッドとセラミック基板52上のパッド58とは、金属細線60で接続されている。またこの大電流用の半導体素子55は、チップ裏面から外に、或いは中に電流が通過するため、チップ裏面には、裏面電極61が形成されている。そしてこの裏面電極61の最表面は、Cuからなる。例えばSiチップの裏面から、Al、Ti、Ni、Ag、Cuの順で積層される。Cuは、メッキが一般的であるが、スパッタリングでも成膜は可能である。この裏面電極は、SiCまたはGaNでも同様である。そして半導体素子55の裏面電極61とセラミック基板52のアイランド56とは、本発明のCu−Cu接合により、電気的に、物理的に接合される。
更に、パッド59は、受動素子57を電気的に接続するものである。ここで受動素子57は、チップ抵抗、チップコンデンサなどである。
本発明は、セラミック基板52のアイランド56に、図3で述べた溶液30を設け、チップ吸着装置(チップボンダー)に装着されたコレットで半導体素子55の表面を吸着し、そのままチップの裏面電極61をアイランド56に載せる。一方ボンターのテーブルは、加熱され、そのテーブルに載せられたセラミック基板全体が加熱されている。よってセラミック基板の上に載せられた半導体素子に、前記コレットで加圧を加えることで、チップ裏面とアイランド表面の間にCu−Cu接合が実現できる。
固相拡散で、Cu−Cu接合を実現する為、その間の抵抗値は、半田よりも小さい値になり、この回路装置を低損失にできる。更には、熱抵抗も低下し、半導体素子55から発生する熱を素早くセラミック基板52や金属ベース51へと伝えることができる。
一方、金属ベース51と第1の導電パターン53は、低融点の半田62を採用している。例えば230度のSn−Ag−Cuから成る半田を採用している。この半田は、セラミック基板52と金属ベース51との熱膨張係数の違いから発生する応力を緩和することができる。尚、セラミック基板と半導体チップは、熱膨張係数が近いため、Cu−Cu接合部には、その熱膨張係数による応力が、金属ベースとセラミック基板との間よりも少ない。そしてCu−Cu接続よりも熱応力がより発生する部分には、この柔らかな半田で緩和することができる。
Cu−Cu接合は、半田よりも熱抵抗が低く、半導体チップの熱は下層に伝わりやすい。更に半田62は、Cu−Cu接合と比べると熱抵抗が高いが、Cu−Cu接合面よりも広く形成されているため、金属ベース51に大量の熱が伝わりやすく、結局全体で考えると、応力が少なく、放熱性の高い回路装置が実現できる。尚、ここでは図1(B)の様に、パッド58の周囲を囲むように設けても良いし、それよりも大きなサイズで設けても良い。
図1(B)は、金属ベース51がCuであるため、半田62の流れを防止し、より半田の柔軟性を発揮させたものである。尚、セラミック基板52から上の構造は、図1(B)と同一なので、その説明は省略する。
セラミック基板52の裏面には、少なくとも半導体チップの真下に、少なくともアイランドと実質同一サイズで同一位置に、またはパッド58を含め前記アイランドが設けられた全域で、位置も同一位置に導電パターン53Aを設けている。尚、ここでは、チップ素子57の下にも、同一サイズで同一位置に第1の導電パターン53Bが設けられている。
そして金属ベース51には、この導電パターン53A、53Bに対応して、複数の凹部h1、h2・・・が設けられ、その部分に半田62が設けられる。
この構造にすれば、半田62は流れず、凹部の深さにより、半田の厚みを確保することができる。その結果、セラミック基板52と金属ベース51との間で発生する応力は、図1(A)よりも緩和される。
続いて、図2では、金属ベース51としてAlを用いた場合について説明する。Alの上に直接Cuを成膜することは、難しいので、ここでは、絶縁性樹脂70を用いた。先ず金属ベース51の表面と裏面は陽極酸化され、酸化膜71が生成されている。そして前記絶縁性樹脂70が付いたCu箔シートが金属ベース51に貼りあわされ、回路パターン72がエッチングにより形成されている。尚、絶縁性樹脂70は、半田から比較すると大きな熱抵抗となるため、中にフィラーが混ぜられている。このAl基板51に形成された第3の導電パターン72は、図1(A)または(B)の第2の導電パターン53と同じ形状が選択できる。尚、酸化膜71は、省略することも可能である。
Alは、Cuよりも若干放熱性に劣るが、軽さはCuよりも優れている。よって車等の軽量さを求める場合は、最適である。
尚、金属ベース51から第3の導電パターンまでが異なり、それ以外は同一であるため、後の説明は省略する。
50:回路装置
51:金属ベース
52:セラミック基板
53:第1の導電パターン
54:第2の導電パターン
55:半導体素子
56:アイランド
57:受動素子
58、59:パッド
60:金属細線
61:裏面電極
62:半田
h1、h2:凹部
70:絶縁性樹脂
71:酸化膜
72:第3の導電パターン
51:金属ベース
52:セラミック基板
53:第1の導電パターン
54:第2の導電パターン
55:半導体素子
56:アイランド
57:受動素子
58、59:パッド
60:金属細線
61:裏面電極
62:半田
h1、h2:凹部
70:絶縁性樹脂
71:酸化膜
72:第3の導電パターン
Claims (5)
- 金属材料から成る金属ベースと、前記金属ベースの上に設けられるセラミック基板と、前記セラミック基板の裏面に設けられた第1の導電パターンと、前記セラミック基板の表面に設けられたCuを主成分とする第2の導電パターンと、前記第2の導電パターンを構成するアイランドの上に設けられた半導体素子とを少なくとも有し、
前記半導体素子には、Cuを主成分とする最表面を有する裏面電極が設けられ、前記アイランドと前記裏面電極の界面は、固相拡散により、直接固着され、前記第1の導電パターンと前記金属ベースは、半田により固着されている事を特徴とした回路装置。 - 前記金属ベースは、CuまたはAlを主成分とする請求項1に記載の回路装置。
- 前記界面には、前記裏面電極の表面よりも内側に成長した固相拡散、および前記アイランドの表面よりも内側に成長した前記固相拡散が設けられる請求項1または請求項2に記載の回路装置。
- 前記半導体素子の配置位置に対応する前記第1の導電パターンは、前記裏面電極と前記アイランドとのCuとCuの固着面積よりも大きく、前記セラミック基板の裏面サイズよりも小さい事を特徴とした請求項1、請求項2または請求項3に記載の回路装置。
- 前記金属ベースには、凹部が設けられ、その凹部に設けられた半田により前記セラミック基板裏面の第1の導電パターンが固着される事を特徴とした請求項1、請求項2または請求項3に記載の回路装置。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011217074A JP2014239084A (ja) | 2011-09-30 | 2011-09-30 | 回路装置 |
PCT/JP2012/006170 WO2013046680A1 (ja) | 2011-09-30 | 2012-09-27 | 回路装置 |
US14/075,847 US20140063767A1 (en) | 2011-09-30 | 2013-11-08 | Circuit device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011217074A JP2014239084A (ja) | 2011-09-30 | 2011-09-30 | 回路装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2014239084A true JP2014239084A (ja) | 2014-12-18 |
Family
ID=47994756
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2011217074A Pending JP2014239084A (ja) | 2011-09-30 | 2011-09-30 | 回路装置 |
Country Status (3)
Country | Link |
---|---|
US (1) | US20140063767A1 (ja) |
JP (1) | JP2014239084A (ja) |
WO (1) | WO2013046680A1 (ja) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109449150A (zh) * | 2018-12-11 | 2019-03-08 | 杰群电子科技(东莞)有限公司 | 带引脚封装、无引脚封装的功率模块及其对应加工方法 |
WO2021181747A1 (ja) * | 2020-03-11 | 2021-09-16 | 株式会社日立パワーデバイス | 半導体装置 |
US11437196B2 (en) * | 2019-01-31 | 2022-09-06 | Point Engineering Co., Ltd. | Multilayer ceramic substrate and probe card including same |
WO2022259873A1 (ja) * | 2021-06-11 | 2022-12-15 | ローム株式会社 | 半導体装置 |
WO2023195325A1 (ja) * | 2022-04-04 | 2023-10-12 | 三菱電機株式会社 | パワーモジュールおよび電力変換装置 |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2014209508A (ja) * | 2013-04-16 | 2014-11-06 | 住友電気工業株式会社 | はんだ付半導体デバイス、実装はんだ付半導体デバイス、はんだ付半導体デバイスの製造方法および実装方法 |
KR102391008B1 (ko) * | 2017-08-08 | 2022-04-26 | 현대자동차주식회사 | 파워 모듈 및 그 파워 모듈을 포함하는 전력 변환 시스템 |
US10856414B2 (en) * | 2018-03-12 | 2020-12-01 | Dell Products, L.P. | System and method for minimizing connector pad open-circuit stubs |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6783867B2 (en) * | 1996-02-05 | 2004-08-31 | Sumitomo Electric Industries, Ltd. | Member for semiconductor device using an aluminum nitride substrate material, and method of manufacturing the same |
US6485816B2 (en) * | 2000-01-31 | 2002-11-26 | Ngk Insulators, Ltd. | Laminated radiation member, power semiconductor apparatus, and method for producing the same |
JP4044265B2 (ja) * | 2000-05-16 | 2008-02-06 | 三菱電機株式会社 | パワーモジュール |
JP3928488B2 (ja) * | 2002-06-04 | 2007-06-13 | 富士電機デバイステクノロジー株式会社 | 半導体装置およびその製造方法 |
US7247514B2 (en) * | 2003-04-11 | 2007-07-24 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device and method for producing the same |
EP2009971B1 (en) * | 2006-04-17 | 2015-01-07 | DOWA Electronics Materials Co., Ltd. | Solder layer, substrate for device junction utilizing the same, and process for manufacturing the substrate |
JP2008098243A (ja) * | 2006-10-06 | 2008-04-24 | Toyota Motor Corp | 放熱板、放熱板に電子部品を実装する方法、および放熱板の製造方法 |
US8513534B2 (en) * | 2008-03-31 | 2013-08-20 | Hitachi, Ltd. | Semiconductor device and bonding material |
-
2011
- 2011-09-30 JP JP2011217074A patent/JP2014239084A/ja active Pending
-
2012
- 2012-09-27 WO PCT/JP2012/006170 patent/WO2013046680A1/ja active Application Filing
-
2013
- 2013-11-08 US US14/075,847 patent/US20140063767A1/en not_active Abandoned
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109449150A (zh) * | 2018-12-11 | 2019-03-08 | 杰群电子科技(东莞)有限公司 | 带引脚封装、无引脚封装的功率模块及其对应加工方法 |
US11437196B2 (en) * | 2019-01-31 | 2022-09-06 | Point Engineering Co., Ltd. | Multilayer ceramic substrate and probe card including same |
WO2021181747A1 (ja) * | 2020-03-11 | 2021-09-16 | 株式会社日立パワーデバイス | 半導体装置 |
JP2021145010A (ja) * | 2020-03-11 | 2021-09-24 | 株式会社 日立パワーデバイス | 半導体装置 |
JP7267963B2 (ja) | 2020-03-11 | 2023-05-02 | 株式会社 日立パワーデバイス | 半導体装置 |
WO2022259873A1 (ja) * | 2021-06-11 | 2022-12-15 | ローム株式会社 | 半導体装置 |
WO2023195325A1 (ja) * | 2022-04-04 | 2023-10-12 | 三菱電機株式会社 | パワーモジュールおよび電力変換装置 |
Also Published As
Publication number | Publication date |
---|---|
US20140063767A1 (en) | 2014-03-06 |
WO2013046680A1 (ja) | 2013-04-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP2014239084A (ja) | 回路装置 | |
TW533754B (en) | Semiconductor device and semiconductor module | |
JP2018037684A (ja) | パワー半導体装置 | |
US8860196B2 (en) | Semiconductor package and method of fabricating the same | |
KR20080083533A (ko) | 플립-칩 방식의 적층형 파워 모듈 및 그 파워 모듈의제조방법 | |
JP2002134555A (ja) | 半導体モジュールおよびその製造方法 | |
CN101673790A (zh) | 发光二极管及其制造方法 | |
JP3627591B2 (ja) | パワー半導体モジュールの製造方法 | |
CN113809032A (zh) | 一种功率模块、电源电路及芯片 | |
JP2012089642A (ja) | 電子装置、半導体装置、サーマルインターポーザ及びその製造方法 | |
JP2008251671A (ja) | 放熱基板およびその製造方法および電子部品モジュール | |
WO2013108706A1 (ja) | 半導体装置および半導体装置の製造方法 | |
JPWO2014097642A1 (ja) | 電子部品パッケージおよびその製造方法 | |
JP2008135627A (ja) | 半導体装置 | |
US6770513B1 (en) | Thermally enhanced flip chip packaging arrangement | |
JP2011082502A (ja) | パワーモジュール用基板、ヒートシンク付パワーモジュール用基板、パワーモジュール及びパワーモジュール用基板の製造方法 | |
JP2008098285A (ja) | 半導体装置 | |
US8754512B1 (en) | Atomic level bonding for electronics packaging | |
JP6819385B2 (ja) | 半導体装置の製造方法 | |
TW200826261A (en) | Thermally enhanced BGA package apparatus & method | |
WO2014094436A1 (zh) | 金/硅共晶芯片焊接方法及晶体管 | |
JP2004007022A (ja) | 半導体装置 | |
JP2012080145A (ja) | 半導体装置 | |
JP3906130B2 (ja) | 半導体装置の製造方法 | |
JP2016032032A (ja) | 回路基板、および電子装置 |