JP2014053439A5 - - Google Patents

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Publication number
JP2014053439A5
JP2014053439A5 JP2012196737A JP2012196737A JP2014053439A5 JP 2014053439 A5 JP2014053439 A5 JP 2014053439A5 JP 2012196737 A JP2012196737 A JP 2012196737A JP 2012196737 A JP2012196737 A JP 2012196737A JP 2014053439 A5 JP2014053439 A5 JP 2014053439A5
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JP
Japan
Prior art keywords
polymer
neutral layer
substrate processing
resist pattern
block copolymer
Prior art date
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Application number
JP2012196737A
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English (en)
Japanese (ja)
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JP5881565B2 (ja
JP2014053439A (ja
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Priority to JP2012196737A priority Critical patent/JP5881565B2/ja
Priority claimed from JP2012196737A external-priority patent/JP5881565B2/ja
Priority to PCT/JP2013/072704 priority patent/WO2014038420A1/ja
Priority to TW102131552A priority patent/TW201426845A/zh
Publication of JP2014053439A publication Critical patent/JP2014053439A/ja
Publication of JP2014053439A5 publication Critical patent/JP2014053439A5/ja
Application granted granted Critical
Publication of JP5881565B2 publication Critical patent/JP5881565B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2012196737A 2012-09-07 2012-09-07 基板処理方法、プログラム及びコンピュータ記憶媒体 Active JP5881565B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2012196737A JP5881565B2 (ja) 2012-09-07 2012-09-07 基板処理方法、プログラム及びコンピュータ記憶媒体
PCT/JP2013/072704 WO2014038420A1 (ja) 2012-09-07 2013-08-26 基板処理方法、コンピュータ記憶媒体及び基板処理システム
TW102131552A TW201426845A (zh) 2012-09-07 2013-09-02 基板處理方法、程式、電腦記憶媒體及基板處理系統

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2012196737A JP5881565B2 (ja) 2012-09-07 2012-09-07 基板処理方法、プログラム及びコンピュータ記憶媒体

Publications (3)

Publication Number Publication Date
JP2014053439A JP2014053439A (ja) 2014-03-20
JP2014053439A5 true JP2014053439A5 (enExample) 2014-11-13
JP5881565B2 JP5881565B2 (ja) 2016-03-09

Family

ID=50237032

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2012196737A Active JP5881565B2 (ja) 2012-09-07 2012-09-07 基板処理方法、プログラム及びコンピュータ記憶媒体

Country Status (3)

Country Link
JP (1) JP5881565B2 (enExample)
TW (1) TW201426845A (enExample)
WO (1) WO2014038420A1 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6177723B2 (ja) * 2014-04-25 2017-08-09 東京エレクトロン株式会社 基板処理方法、プログラム、コンピュータ記憶媒体及び基板処理システム
JP6267143B2 (ja) * 2015-03-05 2018-01-24 東京エレクトロン株式会社 基板処理方法、プログラム、コンピュータ記憶媒体及び基板処理システム
JP6346115B2 (ja) * 2015-03-24 2018-06-20 東芝メモリ株式会社 パターン形成方法
JP6494446B2 (ja) * 2015-06-23 2019-04-03 東京エレクトロン株式会社 基板処理方法、プログラム及びコンピュータ記憶媒体

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04364021A (ja) * 1991-06-11 1992-12-16 Sumitomo Electric Ind Ltd 半導体装置の製造方法
JP4753672B2 (ja) * 2005-09-16 2011-08-24 独立行政法人農業・食品産業技術総合研究機構 樹脂製マイクロチャネルアレイの製造方法及びこれを用いた血液測定方法
US7989026B2 (en) * 2008-01-12 2011-08-02 International Business Machines Corporation Method of use of epoxy-containing cycloaliphatic acrylic polymers as orientation control layers for block copolymer thin films
US7521094B1 (en) * 2008-01-14 2009-04-21 International Business Machines Corporation Method of forming polymer features by directed self-assembly of block copolymers
NL2006030A (en) * 2010-04-14 2011-10-18 Asml Netherlands Bv Method for providing an ordered layer of self-assemblable polymer for use in lithography.
JP2013534542A (ja) * 2010-06-04 2013-09-05 エーエスエムエル ネザーランズ ビー.ブイ. 自己組織化可能な重合体及びリソグラフィにおける使用方法

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