JP2014029909A - 電子装置 - Google Patents
電子装置 Download PDFInfo
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- JP2014029909A JP2014029909A JP2012169341A JP2012169341A JP2014029909A JP 2014029909 A JP2014029909 A JP 2014029909A JP 2012169341 A JP2012169341 A JP 2012169341A JP 2012169341 A JP2012169341 A JP 2012169341A JP 2014029909 A JP2014029909 A JP 2014029909A
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- JP
- Japan
- Prior art keywords
- electronic element
- electronic
- metal member
- electronic device
- insulating base
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15172—Fan-out arrangement of the internal vias
- H01L2924/15174—Fan-out arrangement of the internal vias in different layers of the multilayer substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Electrodes Of Semiconductors (AREA)
- Die Bonding (AREA)
Abstract
【解決手段】 本発明の電子装置は、絶縁基体11と絶縁基体11上に設けられた金属部材12とを有する電子素子搭載用基板1と、ろう材3によって金属部材12上に接合されている電子素子2とを有しており、ろう材3が電子素子2の下面から電子素子2の内部に伸びるように設けられた凸部31を有している。電子素子2が凸部31に引っかかるので、電子素子2が金属部材12から剥離する可能性を低減できる。
【選択図】図2
Description
本発明の第1の実施形態における電子装置は、図1および図2に示されているように、電子素子搭載用基板1と、電子素子搭載用基板1の上面に設けられた電子素子2とを含んでいる。電子装置は、例えば電子部品モジュールを構成する回路基板上に実装される。
ある場合は、金型やパンチングによる打ち抜き加工やレーザー加工によってグリーンシートに貫通孔を形成して、この貫通孔に印刷法によって配線導体14用の導体ペーストを充填しておくことによって形成される。
き層と0.1〜3μm程度の金めっき層とが、あるいは厚さ1〜10μm程度のニッケルめっ
き層と0.1〜1μm程度の銀めっき層とが、順次被着される。これによって、金属層12、
外部端子13および配線導体14が腐食することを効果的に抑制できるとともに、金属層12と電子素子2との接合や配線導体14とボンディングワイヤ等の接続部材4との接合や、外部端子13と外部の回路基板の配線との接合を強固にできる。また、電子素子2の搭載となる配線導体14上では、ニッケルめっき層上に、厚さ10〜80μm程度の銅めっき層を被着させておくことにより、電子素子2の熱を良好に放熱させやすくしてもよい。
次に、本発明の第2の実施形態による電子装置について、図3を参照しつつ説明する。
11・・・・絶縁基体
12・・・・金属部材
13・・・・外部端子
131・・・・凸状部
13a・・・主面領域
13b・・・側面領域
13c・・・中央端子
13d・・・第1端子
13e・・・第2端子
14・・・・配線導体
15・・・・凹部
2・・・・電子素子
3・・・・ろう材
31・・・・凸部
31a・・・突起部31a
4・・・・接続部材
5・・・・封止材
Claims (3)
- 絶縁基体と該絶縁基体上に設けられた金属部材とを有する電子素子搭載用基板と、
ろう材によって前記金属部材上に接合されている電子素子とを備えており、
前記ろう材が前記電子素子の下面から前記電子素子の内部に伸びるように設けられた凸部を有していることを特徴とする電子装置。 - 前記凸部が複数の突起部からなることを特徴とする請求項1に記載の電子装置。
- 縦断面視において、前記凸部の表面が前記電子素子と接する凹凸を有することを特徴とする請求項1に記載の電子装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012169341A JP2014029909A (ja) | 2012-07-31 | 2012-07-31 | 電子装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012169341A JP2014029909A (ja) | 2012-07-31 | 2012-07-31 | 電子装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2014029909A true JP2014029909A (ja) | 2014-02-13 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2012169341A Pending JP2014029909A (ja) | 2012-07-31 | 2012-07-31 | 電子装置 |
Country Status (1)
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JP (1) | JP2014029909A (ja) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54133072A (en) * | 1978-04-06 | 1979-10-16 | Nec Corp | Semiconductor device |
JPH0710939U (ja) * | 1993-07-28 | 1995-02-14 | サンケン電気株式会社 | 回路基板を有する半導体装置 |
JP2009117435A (ja) * | 2007-11-02 | 2009-05-28 | Denso Corp | 半導体装置 |
-
2012
- 2012-07-31 JP JP2012169341A patent/JP2014029909A/ja active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54133072A (en) * | 1978-04-06 | 1979-10-16 | Nec Corp | Semiconductor device |
JPH0710939U (ja) * | 1993-07-28 | 1995-02-14 | サンケン電気株式会社 | 回路基板を有する半導体装置 |
JP2009117435A (ja) * | 2007-11-02 | 2009-05-28 | Denso Corp | 半導体装置 |
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