JP2013543612A5 - - Google Patents

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Publication number
JP2013543612A5
JP2013543612A5 JP2013529258A JP2013529258A JP2013543612A5 JP 2013543612 A5 JP2013543612 A5 JP 2013543612A5 JP 2013529258 A JP2013529258 A JP 2013529258A JP 2013529258 A JP2013529258 A JP 2013529258A JP 2013543612 A5 JP2013543612 A5 JP 2013543612A5
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JP
Japan
Prior art keywords
power
contexts
interface
memory interface
physical memory
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JP2013529258A
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English (en)
Japanese (ja)
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JP2013543612A (ja
JP5955323B2 (ja
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Priority claimed from US12/910,412 external-priority patent/US8356155B2/en
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Publication of JP2013543612A5 publication Critical patent/JP2013543612A5/ja
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Publication of JP5955323B2 publication Critical patent/JP5955323B2/ja
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JP2013529258A 2010-09-13 2011-09-13 構成可能な電力状態をもつダイナミックramphyインタフェース Active JP5955323B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US38208910P 2010-09-13 2010-09-13
US61/382,089 2010-09-13
US12/910,412 US8356155B2 (en) 2010-09-13 2010-10-22 Dynamic RAM Phy interface with configurable power states
US12/910,412 2010-10-22
PCT/US2011/051345 WO2012037086A1 (en) 2010-09-13 2011-09-13 Dynamic ram phy interface with configurable power states

Publications (3)

Publication Number Publication Date
JP2013543612A JP2013543612A (ja) 2013-12-05
JP2013543612A5 true JP2013543612A5 (enExample) 2016-02-12
JP5955323B2 JP5955323B2 (ja) 2016-07-20

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Family Applications (1)

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JP2013529258A Active JP5955323B2 (ja) 2010-09-13 2011-09-13 構成可能な電力状態をもつダイナミックramphyインタフェース

Country Status (6)

Country Link
US (2) US8356155B2 (enExample)
EP (1) EP2616946B1 (enExample)
JP (1) JP5955323B2 (enExample)
KR (1) KR101879707B1 (enExample)
CN (1) CN103168296B (enExample)
WO (1) WO2012037086A1 (enExample)

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