JP2013534731A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2013534731A5 JP2013534731A5 JP2013517642A JP2013517642A JP2013534731A5 JP 2013534731 A5 JP2013534731 A5 JP 2013534731A5 JP 2013517642 A JP2013517642 A JP 2013517642A JP 2013517642 A JP2013517642 A JP 2013517642A JP 2013534731 A5 JP2013534731 A5 JP 2013534731A5
- Authority
- JP
- Japan
- Prior art keywords
- silicon
- wafer
- cleavage plane
- insulator wafer
- chamber
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 claims description 50
- 239000012212 insulator Substances 0.000 claims description 35
- 238000003776 cleavage reaction Methods 0.000 claims description 22
- 230000007017 scission Effects 0.000 claims description 22
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 claims description 9
- 239000000126 substance Substances 0.000 claims description 7
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 claims description 6
- 238000011065 in-situ storage Methods 0.000 claims description 6
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 3
- 239000000463 material Substances 0.000 claims description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 12
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 239000000356 contaminant Substances 0.000 description 1
- 238000005202 decontamination Methods 0.000 description 1
- 230000003588 decontaminative effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US35999810P | 2010-06-30 | 2010-06-30 | |
| US61/359,998 | 2010-06-30 | ||
| PCT/IB2011/052903 WO2012001659A2 (en) | 2010-06-30 | 2011-06-30 | Methods for in-situ passivation of silicon-on-insulator wafers |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2013534731A JP2013534731A (ja) | 2013-09-05 |
| JP2013534731A5 true JP2013534731A5 (cg-RX-API-DMAC7.html) | 2014-08-14 |
| JP5989642B2 JP5989642B2 (ja) | 2016-09-07 |
Family
ID=44653366
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2013517642A Active JP5989642B2 (ja) | 2010-06-30 | 2011-06-30 | シリコン・オン・インシュレータウエハをインサイチュで不導体化する方法 |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US8859393B2 (cg-RX-API-DMAC7.html) |
| EP (1) | EP2589075A2 (cg-RX-API-DMAC7.html) |
| JP (1) | JP5989642B2 (cg-RX-API-DMAC7.html) |
| KR (3) | KR20180037326A (cg-RX-API-DMAC7.html) |
| CN (1) | CN102959697A (cg-RX-API-DMAC7.html) |
| SG (1) | SG186853A1 (cg-RX-API-DMAC7.html) |
| TW (1) | TW201216414A (cg-RX-API-DMAC7.html) |
| WO (1) | WO2012001659A2 (cg-RX-API-DMAC7.html) |
Families Citing this family (32)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102427097B (zh) * | 2011-11-23 | 2014-05-07 | 中国科学院物理研究所 | 一种硅的氧化钝化方法及钝化装置 |
| US8747598B2 (en) * | 2012-04-25 | 2014-06-10 | Gtat Corporation | Method of forming a permanently supported lamina |
| US10079170B2 (en) | 2014-01-23 | 2018-09-18 | Globalwafers Co., Ltd. | High resistivity SOI wafers and a method of manufacturing thereof |
| US9899499B2 (en) | 2014-09-04 | 2018-02-20 | Sunedison Semiconductor Limited (Uen201334164H) | High resistivity silicon-on-insulator wafer manufacturing method for reducing substrate loss |
| US9853133B2 (en) * | 2014-09-04 | 2017-12-26 | Sunedison Semiconductor Limited (Uen201334164H) | Method of manufacturing high resistivity silicon-on-insulator substrate |
| EP3573094B1 (en) | 2014-11-18 | 2023-01-04 | GlobalWafers Co., Ltd. | High resistivity semiconductor-on-insulator wafer and a method of manufacturing |
| WO2016081367A1 (en) | 2014-11-18 | 2016-05-26 | Sunedison Semiconductor Limited | HIGH RESISTIVITY SILICON-ON-INSULATOR SUBSTRATE COMPRISING A CHARGE TRAPPING LAYER FORMED BY He-N2 CO-IMPLANTATION |
| EP3221884B1 (en) | 2014-11-18 | 2022-06-01 | GlobalWafers Co., Ltd. | High resistivity semiconductor-on-insulator wafers with charge trapping layers and method of manufacturing thereof |
| EP3266038B1 (en) | 2015-03-03 | 2019-09-25 | GlobalWafers Co., Ltd. | Method of depositing charge trapping polycrystalline silicon films on silicon substrates with controllable film stress |
| US9881832B2 (en) | 2015-03-17 | 2018-01-30 | Sunedison Semiconductor Limited (Uen201334164H) | Handle substrate for use in manufacture of semiconductor-on-insulator structure and method of manufacturing thereof |
| CN107408532A (zh) | 2015-03-17 | 2017-11-28 | 太阳能爱迪生半导体有限公司 | 用于绝缘体上半导体结构的制造的热稳定电荷捕获层 |
| JP6592534B2 (ja) | 2015-06-01 | 2019-10-16 | サンエディソン・セミコンダクター・リミテッドＳｕｎＥｄｉｓｏｎ Ｓｅｍｉｃｏｎｄｕｃｔｏｒ Ｌｉｍｉｔｅｄ | 多層構造体及びその製造方法 |
| WO2016196011A1 (en) | 2015-06-01 | 2016-12-08 | Sunedison Semiconductor Limited | A method of manufacturing silicon germanium-on-insulator |
| SG10201913407TA (en) | 2015-11-20 | 2020-03-30 | Globalwafers Co Ltd | Manufacturing method of smoothing a semiconductor surface |
| US9831115B2 (en) | 2016-02-19 | 2017-11-28 | Sunedison Semiconductor Limited (Uen201334164H) | Process flow for manufacturing semiconductor on insulator structures in parallel |
| WO2017142849A1 (en) | 2016-02-19 | 2017-08-24 | Sunedison Semiconductor Limited | Semiconductor on insulator structure comprising a buried high resistivity layer |
| US10468294B2 (en) | 2016-02-19 | 2019-11-05 | Globalwafers Co., Ltd. | High resistivity silicon-on-insulator substrate comprising a charge trapping layer formed on a substrate with a rough surface |
| US11114332B2 (en) | 2016-03-07 | 2021-09-07 | Globalwafers Co., Ltd. | Semiconductor on insulator structure comprising a plasma nitride layer and method of manufacture thereof |
| WO2017155806A1 (en) | 2016-03-07 | 2017-09-14 | Sunedison Semiconductor Limited | Semiconductor on insulator structure comprising a plasma oxide layer and method of manufacture thereof |
| EP3427293B1 (en) | 2016-03-07 | 2021-05-05 | Globalwafers Co., Ltd. | Semiconductor on insulator structure comprising a low temperature flowable oxide layer and method of manufacture thereof |
| US11848227B2 (en) | 2016-03-07 | 2023-12-19 | Globalwafers Co., Ltd. | Method of manufacturing a semiconductor on insulator structure by a pressurized bond treatment |
| JP6914278B2 (ja) | 2016-06-08 | 2021-08-04 | グローバルウェーハズ カンパニー リミテッドＧｌｏｂａｌＷａｆｅｒｓ Ｃｏ．，Ｌｔｄ． | 改善された機械的強度を有する高抵抗率単結晶シリコンインゴット及びウェハ |
| US10269617B2 (en) | 2016-06-22 | 2019-04-23 | Globalwafers Co., Ltd. | High resistivity silicon-on-insulator substrate comprising an isolation region |
| WO2018080772A1 (en) | 2016-10-26 | 2018-05-03 | Sunedison Semiconductor Limited | High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency |
| CN110352484B (zh) | 2016-12-05 | 2022-12-06 | 环球晶圆股份有限公司 | 高电阻率绝缘体上硅结构及其制造方法 |
| WO2018125565A1 (en) | 2016-12-28 | 2018-07-05 | Sunedison Semiconductor Limited | Method of treating silicon wafers to have intrinsic gettering and gate oxide integrity yield |
| FR3061988B1 (fr) | 2017-01-13 | 2019-11-01 | Soitec | Procede de lissage de surface d'un substrat semiconducteur sur isolant |
| SG10201913850VA (en) | 2017-07-14 | 2020-03-30 | Sunedison Semiconductor Ltd | Method of manufacture of a semiconductor on insulator structure |
| US10916416B2 (en) * | 2017-11-14 | 2021-02-09 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor wafer with modified surface and fabrication method thereof |
| JP7160943B2 (ja) | 2018-04-27 | 2022-10-25 | グローバルウェーハズ カンパニー リミテッド | 半導体ドナー基板からの層移転を容易にする光アシスト板状体形成 |
| KR102463727B1 (ko) | 2018-06-08 | 2022-11-07 | 글로벌웨이퍼스 씨오., 엘티디. | 얇은 실리콘 층의 전사 방법 |
| US11296277B2 (en) | 2018-10-16 | 2022-04-05 | Samsung Electronics Co., Ltd. | Variable resistance memory device having an anti-oxidation layer and a method of manufacturing the same |
Family Cites Families (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3836786A (en) * | 1967-01-04 | 1974-09-17 | Purification Sciences Inc | Dielectric liquid-immersed corona generator |
| CA1030102A (en) * | 1972-08-17 | 1978-04-25 | Purification Sciences Inc. | Dielectric liquid-immersed corona generator |
| US5000113A (en) * | 1986-12-19 | 1991-03-19 | Applied Materials, Inc. | Thermal CVD/PECVD reactor and use for thermal chemical vapor deposition of silicon dioxide and in-situ multi-step planarized process |
| JPH07118522B2 (ja) * | 1990-10-24 | 1995-12-18 | インターナショナル・ビジネス・マシーンズ・コーポレイション | 基板表面を酸化処理するための方法及び半導体の構造 |
| JPH05259153A (ja) * | 1992-03-12 | 1993-10-08 | Fujitsu Ltd | シリコン酸化膜の製造方法と製造装置 |
| JPH0766195A (ja) * | 1993-06-29 | 1995-03-10 | Sumitomo Sitix Corp | シリコンウェーハの表面酸化膜形成方法 |
| CN1104264A (zh) * | 1994-09-02 | 1995-06-28 | 复旦大学 | 热壁密装低温低压淀积二氧化硅薄膜技术 |
| US5880029A (en) * | 1996-12-27 | 1999-03-09 | Motorola, Inc. | Method of passivating semiconductor devices and the passivated devices |
| US5972802A (en) * | 1997-10-07 | 1999-10-26 | Seh America, Inc. | Prevention of edge stain in silicon wafers by ozone dipping |
| JP3153162B2 (ja) * | 1997-10-08 | 2001-04-03 | 松下電子工業株式会社 | シリコン酸化膜の形成方法 |
| JP4379943B2 (ja) * | 1999-04-07 | 2009-12-09 | 株式会社デンソー | 半導体基板の製造方法および半導体基板製造装置 |
| US20020175143A1 (en) * | 2001-05-22 | 2002-11-28 | Seh America, Inc. | Processes for polishing wafers |
| US6833322B2 (en) | 2002-10-17 | 2004-12-21 | Applied Materials, Inc. | Apparatuses and methods for depositing an oxide film |
| JP4614416B2 (ja) | 2003-05-29 | 2011-01-19 | 日東電工株式会社 | 半導体チップの製造方法およびダイシング用シート貼付け装置 |
| JP2007149723A (ja) | 2005-11-24 | 2007-06-14 | Sumco Corp | 貼り合わせウェーハの製造方法 |
| US7939424B2 (en) * | 2007-09-21 | 2011-05-10 | Varian Semiconductor Equipment Associates, Inc. | Wafer bonding activated by ion implantation |
| SG161151A1 (en) * | 2008-10-22 | 2010-05-27 | Semiconductor Energy Lab | Soi substrate and method for manufacturing the same |
| US20100130021A1 (en) | 2008-11-26 | 2010-05-27 | Memc Electronic Materials, Inc. | Method for processing a silicon-on-insulator structure |
-
2011
- 2011-06-16 US US13/162,122 patent/US8859393B2/en active Active
- 2011-06-30 SG SG2012096020A patent/SG186853A1/en unknown
- 2011-06-30 JP JP2013517642A patent/JP5989642B2/ja active Active
- 2011-06-30 WO PCT/IB2011/052903 patent/WO2012001659A2/en not_active Ceased
- 2011-06-30 KR KR1020187009456A patent/KR20180037326A/ko not_active Ceased
- 2011-06-30 KR KR1020197020821A patent/KR20190087668A/ko not_active Ceased
- 2011-06-30 TW TW100123193A patent/TW201216414A/zh unknown
- 2011-06-30 KR KR1020137002599A patent/KR102083688B1/ko active Active
- 2011-06-30 CN CN2011800328260A patent/CN102959697A/zh active Pending
- 2011-06-30 EP EP11757935.9A patent/EP2589075A2/en not_active Withdrawn