SG10201913407TA - Manufacturing method of smoothing a semiconductor surface - Google Patents

Manufacturing method of smoothing a semiconductor surface

Info

Publication number
SG10201913407TA
SG10201913407TA SG10201913407TA SG10201913407TA SG10201913407TA SG 10201913407T A SG10201913407T A SG 10201913407TA SG 10201913407T A SG10201913407T A SG 10201913407TA SG 10201913407T A SG10201913407T A SG 10201913407TA SG 10201913407T A SG10201913407T A SG 10201913407TA
Authority
SG
Singapore
Prior art keywords
smoothing
manufacturing
semiconductor surface
semiconductor
Prior art date
Application number
SG10201913407TA
Inventor
Gang Wang
Charles Lottes
Sasha Kweskin
Original Assignee
Globalwafers Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Globalwafers Co Ltd filed Critical Globalwafers Co Ltd
Publication of SG10201913407TA publication Critical patent/SG10201913407TA/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041Cleaning
    • H01L21/02043Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H01L21/02052Wet cleaning only
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type
    • H01L21/02581Transition metal or rare earth elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H01L21/3247Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering for altering the shape, e.g. smoothing the surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14632Wafer-level processed structures
SG10201913407TA 2015-11-20 2016-11-15 Manufacturing method of smoothing a semiconductor surface SG10201913407TA (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US201562257764P 2015-11-20 2015-11-20

Publications (1)

Publication Number Publication Date
SG10201913407TA true SG10201913407TA (en) 2020-03-30

Family

ID=57485896

Family Applications (2)

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SG11201804271QA SG11201804271QA (en) 2015-11-20 2016-11-15 Manufacturing method of smoothing a semiconductor surface

Family Applications After (1)

Application Number Title Priority Date Filing Date
SG11201804271QA SG11201804271QA (en) 2015-11-20 2016-11-15 Manufacturing method of smoothing a semiconductor surface

Country Status (7)

Country Link
US (4) US10529616B2 (en)
EP (1) EP3378094B1 (en)
JP (1) JP6749394B2 (en)
CN (2) CN108780776B (en)
SG (2) SG10201913407TA (en)
TW (2) TWI693640B (en)
WO (1) WO2017087393A1 (en)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110838463A (en) * 2018-08-17 2020-02-25 胡兵 Semiconductor substrate and method for separating substrate layer from functional layer on semiconductor substrate
DE102016112139B3 (en) * 2016-07-01 2018-01-04 Infineon Technologies Ag A method of reducing an impurity concentration in a semiconductor body
US20180019169A1 (en) * 2016-07-12 2018-01-18 QMAT, Inc. Backing substrate stabilizing donor substrate for implant or reclamation
US10014311B2 (en) 2016-10-17 2018-07-03 Micron Technology, Inc. Methods of forming an array of elevationally-extending strings of memory cells, methods of forming polysilicon, elevationally-extending strings of memory cells individually comprising a programmable charge storage transistor, and electronic components comprising polysilicon
SG11201913769RA (en) * 2017-07-14 2020-01-30 Sunedison Semiconductor Ltd Method of manufacture of a semiconductor on insulator structure
US10916416B2 (en) * 2017-11-14 2021-02-09 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor wafer with modified surface and fabrication method thereof
KR102562239B1 (en) * 2018-04-27 2023-07-31 글로벌웨이퍼스 씨오., 엘티디. Light-assisted platelet formation to facilitate layer transfer from the semiconductor donor substrate
US11414782B2 (en) 2019-01-13 2022-08-16 Bing Hu Method of separating a film from a main body of a crystalline object
US20220216048A1 (en) * 2021-01-06 2022-07-07 Applied Materials, Inc. Doped silicon nitride for 3d nand
CN113483722B (en) * 2021-08-24 2024-01-26 西安奕斯伟材料科技股份有限公司 Silicon wafer edge roughness detection jig and detection method

Family Cites Families (122)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3909304A (en) 1974-05-03 1975-09-30 Western Electric Co Method of doping a semiconductor body
US4501060A (en) 1983-01-24 1985-02-26 At&T Bell Laboratories Dielectrically isolated semiconductor devices
US4755865A (en) 1986-01-21 1988-07-05 Motorola Inc. Means for stabilizing polycrystalline semiconductor layers
JPH0648686B2 (en) 1988-03-30 1994-06-22 新日本製鐵株式会社 Silicon wafer having excellent gettering ability and method of manufacturing the same
JPH06105691B2 (en) 1988-09-29 1994-12-21 株式会社富士電機総合研究所 Method for producing carbon-doped amorphous silicon thin film
JP2617798B2 (en) 1989-09-22 1997-06-04 三菱電機株式会社 Stacked semiconductor device and method of manufacturing the same
US5461250A (en) 1992-08-10 1995-10-24 International Business Machines Corporation SiGe thin film or SOI MOSFET and method for making the same
JP3542376B2 (en) 1994-04-08 2004-07-14 キヤノン株式会社 Manufacturing method of semiconductor substrate
US6043138A (en) 1996-09-16 2000-03-28 Advanced Micro Devices, Inc. Multi-step polysilicon deposition process for boron penetration inhibition
US5783469A (en) 1996-12-10 1998-07-21 Advanced Micro Devices, Inc. Method for making nitrogenated gate structure for improved transistor performance
FR2765393B1 (en) 1997-06-25 2001-11-30 France Telecom PROCESS FOR ETCHING A POLYCRYSTALLINE SI1-XGEX LAYER OR A STACK OF A POLYCRYSTALLINE SI1-XGEX LAYER AND A POLYCRYSTALLINE SI LAYER, AND APPLICATION THEREOF TO MICROELECTRONICS
US6068928A (en) 1998-02-25 2000-05-30 Siemens Aktiengesellschaft Method for producing a polycrystalline silicon structure and polycrystalline silicon layer to be produced by the method
US6479166B1 (en) 1998-10-06 2002-11-12 Case Western Reserve University Large area polysilicon films with predetermined stress characteristics and method for producing same
JP2000349264A (en) * 1998-12-04 2000-12-15 Canon Inc Method for manufacturing, use and utilizing method of semiconductor wafer
JP4313874B2 (en) 1999-02-02 2009-08-12 キヤノン株式会社 Substrate manufacturing method
JP3911901B2 (en) 1999-04-09 2007-05-09 信越半導体株式会社 SOI wafer and method for manufacturing SOI wafer
US6287941B1 (en) 1999-04-21 2001-09-11 Silicon Genesis Corporation Surface finishing of SOI substrates using an EPI process
US6204205B1 (en) 1999-07-06 2001-03-20 Taiwan Semiconductor Manufacturing Company Using H2anneal to improve the electrical characteristics of gate oxide
US6326285B1 (en) 2000-02-24 2001-12-04 International Business Machines Corporation Simultaneous multiple silicon on insulator (SOI) wafer production
US20020090758A1 (en) 2000-09-19 2002-07-11 Silicon Genesis Corporation Method and resulting device for manufacturing for double gated transistors
JP4463957B2 (en) 2000-09-20 2010-05-19 信越半導体株式会社 Silicon wafer manufacturing method and silicon wafer
US6448152B1 (en) 2001-02-20 2002-09-10 Silicon Genesis Corporation Method and system for generating a plurality of donor wafers and handle wafers prior to an order being placed by a customer
US20050026432A1 (en) * 2001-04-17 2005-02-03 Atwater Harry A. Wafer bonded epitaxial templates for silicon heterostructures
US6562127B1 (en) 2002-01-16 2003-05-13 The United States Of America As Represented By The Secretary Of The Navy Method of making mosaic array of thin semiconductor material of large substrates
US6562703B1 (en) 2002-03-13 2003-05-13 Sharp Laboratories Of America, Inc. Molecular hydrogen implantation method for forming a relaxed silicon germanium layer with high germanium content
US6995430B2 (en) 2002-06-07 2006-02-07 Amberwave Systems Corporation Strained-semiconductor-on-insulator device structures
US7074623B2 (en) 2002-06-07 2006-07-11 Amberwave Systems Corporation Methods of forming strained-semiconductor-on-insulator finFET device structures
US7057234B2 (en) 2002-12-06 2006-06-06 Cornell Research Foundation, Inc. Scalable nano-transistor and memory using back-side trapping
US6770504B2 (en) * 2003-01-06 2004-08-03 Honeywell International Inc. Methods and structure for improving wafer bow control
WO2004061944A1 (en) 2003-01-07 2004-07-22 S.O.I.Tec Silicon On Insulator Technologies Recycling of a wafer comprising a multi-layer structure after taking-off a thin layer
US7005160B2 (en) 2003-04-24 2006-02-28 Asm America, Inc. Methods for depositing polycrystalline films with engineered grain structures
US7563697B2 (en) 2003-09-05 2009-07-21 Sumco Corporation Method for producing SOI wafer
CN1856873A (en) 2003-09-26 2006-11-01 卢万天主教大学 Method of manufacturing a multilayer semiconductor structure with reduced ohmic losses
US6992025B2 (en) 2004-01-12 2006-01-31 Sharp Laboratories Of America, Inc. Strained silicon on insulator from film transfer and relaxation by hydrogen implantation
US7018882B2 (en) 2004-03-23 2006-03-28 Sharp Laboratories Of America, Inc. Method to form local “silicon-on-nothing” or “silicon-on-insulator” wafers with tensile-strained silicon
US7279400B2 (en) 2004-08-05 2007-10-09 Sharp Laboratories Of America, Inc. Method of fabricating single-layer and multi-layer single crystalline silicon and silicon devices on plastic using sacrificial glass
US7312487B2 (en) 2004-08-16 2007-12-25 International Business Machines Corporation Three dimensional integrated circuit
DE102004041378B4 (en) 2004-08-26 2010-07-08 Siltronic Ag Semiconductor wafer with a layered structure with low warp and bow and process for its production
JP2008513990A (en) 2004-09-21 2008-05-01 エス.オー.アイ.テック シリコン オン インシュレータ テクノロジーズ Method for obtaining thin layers by co-injection and subsequent injection
JP2006114847A (en) * 2004-10-18 2006-04-27 Sony Corp Semiconductor device and manufacturing method of laminated board
WO2006047264A1 (en) 2004-10-21 2006-05-04 Advanced Neuromodulation Systems, Inc. Peripheral nerve stimulation to treat auditory dysfunction
WO2006090708A1 (en) 2005-02-25 2006-08-31 Mitsubishi Chemical Corporation Process for continuous production of polyester, polyester prepolymer granule and polyester
US8241996B2 (en) * 2005-02-28 2012-08-14 Silicon Genesis Corporation Substrate stiffness method and resulting devices for layer transfer process
US7388278B2 (en) * 2005-03-24 2008-06-17 International Business Machines Corporation High performance field effect transistors on SOI substrate with stress-inducing material as buried insulator and methods
US7476594B2 (en) 2005-03-30 2009-01-13 Cree, Inc. Methods of fabricating silicon nitride regions in silicon carbide and resulting structures
US7427554B2 (en) 2005-08-12 2008-09-23 Silicon Genesis Corporation Manufacturing strained silicon substrates using a backing material
FR2890489B1 (en) 2005-09-08 2008-03-07 Soitec Silicon On Insulator METHOD FOR MANUFACTURING A SEMICONDUCTOR TYPE HETEROSTRUCTURE ON INSULATION
FR2897982B1 (en) 2006-02-27 2008-07-11 Tracit Technologies Sa METHOD FOR MANUFACTURING PARTIALLY-LIKE STRUCTURES, COMPRISING AREAS CONNECTING A SURFACE LAYER AND A SUBSTRATE
US7863157B2 (en) * 2006-03-17 2011-01-04 Silicon Genesis Corporation Method and structure for fabricating solar cells using a layer transfer process
WO2007118121A2 (en) * 2006-04-05 2007-10-18 Silicon Genesis Corporation Method and structure for fabricating solar cells using a layer transfer process
GB2437995A (en) * 2006-05-11 2007-11-14 X Fab Semiconductor Foundries Semiconductor processing
EP1858071A1 (en) * 2006-05-18 2007-11-21 S.O.I.TEC. Silicon on Insulator Technologies S.A. Method for fabricating a semiconductor on insulator type wafer and semiconductor on insulator wafer
US7579654B2 (en) * 2006-05-31 2009-08-25 Corning Incorporated Semiconductor on insulator structure made using radiation annealing
FR2902233B1 (en) 2006-06-09 2008-10-17 Soitec Silicon On Insulator METHOD FOR LIMITING LACUNAR MODE BROADCAST DISTRIBUTION IN A HETEROSTRUCTURE
EP1901345A1 (en) * 2006-08-30 2008-03-19 Siltronic AG Multilayered semiconductor wafer and process for manufacturing the same
EP1928020B1 (en) 2006-11-30 2020-04-22 Soitec Method of manufacturing a semiconductor heterostructure
FR2910179B1 (en) * 2006-12-19 2009-03-13 Commissariat Energie Atomique METHOD FOR MANUFACTURING THIN LAYERS OF GaN BY IMPLANTATION AND RECYCLING OF A STARTING SUBSTRATE
FR2911430B1 (en) 2007-01-15 2009-04-17 Soitec Silicon On Insulator "METHOD OF MANUFACTURING A HYBRID SUBSTRATE"
JP2008244032A (en) * 2007-03-27 2008-10-09 Sharp Corp Semiconductor apparatus and manufacturing method thereof
WO2008149699A1 (en) 2007-06-01 2008-12-11 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of semiconductor substrate and semiconductor device
JP4445524B2 (en) 2007-06-26 2010-04-07 株式会社東芝 Manufacturing method of semiconductor memory device
JP2009016692A (en) 2007-07-06 2009-01-22 Toshiba Corp Manufacturing method of semiconductor storage device, and semiconductor storage device
US20090278233A1 (en) 2007-07-26 2009-11-12 Pinnington Thomas Henry Bonded intermediate substrate and method of making same
JP5499428B2 (en) * 2007-09-07 2014-05-21 株式会社Sumco Manufacturing method of bonded wafer
US7915716B2 (en) 2007-09-27 2011-03-29 Stats Chippac Ltd. Integrated circuit package system with leadframe array
US7879699B2 (en) 2007-09-28 2011-02-01 Infineon Technologies Ag Wafer and a method for manufacturing a wafer
US8128749B2 (en) 2007-10-04 2012-03-06 International Business Machines Corporation Fabrication of SOI with gettering layer
US7868419B1 (en) 2007-10-18 2011-01-11 Rf Micro Devices, Inc. Linearity improvements of semiconductor substrate based radio frequency devices
JP2009135453A (en) * 2007-10-30 2009-06-18 Semiconductor Energy Lab Co Ltd Method for manufacturing semiconductor device, semiconductor device, and electronic device
US7696058B2 (en) * 2007-10-31 2010-04-13 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate
US20090236689A1 (en) 2008-03-24 2009-09-24 Freescale Semiconductor, Inc. Integrated passive device and method with low cost substrate
FR2933234B1 (en) 2008-06-30 2016-09-23 S O I Tec Silicon On Insulator Tech GOODLY DUAL STRUCTURE SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME
JP5567569B2 (en) * 2008-08-27 2014-08-06 ソイテック Method of manufacturing a semiconductor structure or semiconductor device using a layer of semiconductor material having a selected or controlled lattice constant
JP2010225830A (en) * 2009-03-24 2010-10-07 Mitsumi Electric Co Ltd Method of manufacturing semiconductor device
JP2010251724A (en) 2009-03-26 2010-11-04 Semiconductor Energy Lab Co Ltd Method for manufacturing semiconductor substrate
US8058137B1 (en) 2009-04-14 2011-11-15 Monolithic 3D Inc. Method for fabrication of a semiconductor device and structure
JP2010258083A (en) 2009-04-22 2010-11-11 Panasonic Corp Soi wafer, method for producing the same, and method for manufacturing semiconductor device
CN105552115B (en) 2009-11-02 2019-10-29 富士电机株式会社 Semiconductor devices and the method being used for producing the semiconductor devices
JP5644096B2 (en) 2009-11-30 2014-12-24 ソニー株式会社 Method for manufacturing bonded substrate and method for manufacturing solid-state imaging device
US8252624B2 (en) 2010-01-18 2012-08-28 Applied Materials, Inc. Method of manufacturing thin film solar cells having a high conversion efficiency
US9099526B2 (en) 2010-02-16 2015-08-04 Monolithic 3D Inc. Integrated circuit device and structure
US8330245B2 (en) * 2010-02-25 2012-12-11 Memc Electronic Materials, Inc. Semiconductor wafers with reduced roll-off and bonded and unbonded SOI structures produced from same
WO2011118643A1 (en) 2010-03-26 2011-09-29 テルモ株式会社 Indwelling needle assembly
FR2961515B1 (en) 2010-06-22 2012-08-24 Commissariat Energie Atomique METHOD FOR PRODUCING A MONOCRYSTALLINE SILICON THIN LAYER ON A POLYMER LAYER
US8859393B2 (en) 2010-06-30 2014-10-14 Sunedison Semiconductor Limited Methods for in-situ passivation of silicon-on-insulator wafers
US8642416B2 (en) 2010-07-30 2014-02-04 Monolithic 3D Inc. Method of forming three dimensional integrated circuit devices using layer transfer technique
JP5117588B2 (en) 2010-09-07 2013-01-16 株式会社東芝 Method for manufacturing nitride semiconductor crystal layer
JP5627649B2 (en) 2010-09-07 2014-11-19 株式会社東芝 Method for manufacturing nitride semiconductor crystal layer
WO2012043616A1 (en) 2010-09-28 2012-04-05 株式会社村田製作所 Piezoelectric device and method for manufacturing piezoelectric device
FR2967812B1 (en) 2010-11-19 2016-06-10 S O I Tec Silicon On Insulator Tech ELECTRONIC DEVICE FOR RADIOFREQUENCY OR POWER APPLICATIONS AND METHOD OF MANUFACTURING SUCH A DEVICE
US9287353B2 (en) 2010-11-30 2016-03-15 Kyocera Corporation Composite substrate and method of manufacturing the same
US8481405B2 (en) 2010-12-24 2013-07-09 Io Semiconductor, Inc. Trap rich layer with through-silicon-vias in semiconductor devices
US8536021B2 (en) 2010-12-24 2013-09-17 Io Semiconductor, Inc. Trap rich layer formation techniques for semiconductor devices
EP2656388B1 (en) 2010-12-24 2020-04-15 QUALCOMM Incorporated Trap rich layer for semiconductor devices
JP5477302B2 (en) * 2011-01-06 2014-04-23 株式会社デンソー Method for manufacturing silicon carbide semiconductor substrate and method for manufacturing silicon carbide semiconductor device
US8796116B2 (en) * 2011-01-31 2014-08-05 Sunedison Semiconductor Limited Methods for reducing the metal content in the device layer of SOI structures and SOI structures produced by such methods
KR101870476B1 (en) 2011-03-16 2018-06-22 썬에디슨, 인크. Silicon on insulator structures having high resistivity regions in the handle wafer and methods for producing such structures
FR2973158B1 (en) 2011-03-22 2014-02-28 Soitec Silicon On Insulator METHOD FOR MANUFACTURING SEMICONDUCTOR-TYPE SUBSTRATE ON INSULATION FOR RADIO FREQUENCY APPLICATIONS
FR2973159B1 (en) 2011-03-22 2013-04-19 Soitec Silicon On Insulator METHOD FOR MANUFACTURING BASE SUBSTRATE
FR2980916B1 (en) 2011-10-03 2014-03-28 Soitec Silicon On Insulator PROCESS FOR PRODUCING A SILICON TYPE STRUCTURE ON INSULATION
US9496255B2 (en) 2011-11-16 2016-11-15 Qualcomm Incorporated Stacked CMOS chipset having an insulating layer and a secondary layer and method of forming same
US8741739B2 (en) 2012-01-03 2014-06-03 International Business Machines Corporation High resistivity silicon-on-insulator substrate and method of forming
US20130193445A1 (en) 2012-01-26 2013-08-01 International Business Machines Corporation Soi structures including a buried boron nitride dielectric
CN103241705B (en) * 2012-02-03 2015-12-09 中国科学院微电子研究所 Silicon corrosion local termination layer preparation method
FR2988516B1 (en) 2012-03-23 2014-03-07 Soitec Silicon On Insulator IMPROVING IMPROVING METHOD FOR ENHANCED SUBSTRATES
US9500355B2 (en) 2012-05-04 2016-11-22 GE Lighting Solutions, LLC Lamp with light emitting elements surrounding active cooling device
US8921209B2 (en) 2012-09-12 2014-12-30 International Business Machines Corporation Defect free strained silicon on insulator (SSOI) substrates
JP2016511934A (en) * 2013-01-16 2016-04-21 キューマット インコーポレイテッドQmat, Inc. Technology for forming optoelectronic devices
US9202711B2 (en) 2013-03-14 2015-12-01 Sunedison Semiconductor Limited (Uen201334164H) Semiconductor-on-insulator wafer manufacturing method for reducing light point defects and surface roughness
US8940595B2 (en) * 2013-03-15 2015-01-27 International Business Machines Corporation Faceted intrinsic epitaxial buffer layer for reducing short channel effects while maximizing channel stress levels
US9951440B2 (en) 2013-05-24 2018-04-24 Sunedison Semiconductor Limited Methods for producing low oxygen silicon ingots
US8951896B2 (en) 2013-06-28 2015-02-10 International Business Machines Corporation High linearity SOI wafer for low-distortion circuit applications
US9209069B2 (en) 2013-10-15 2015-12-08 Sunedison Semiconductor Limited (Uen201334164H) Method of manufacturing high resistivity SOI substrate with reduced interface conductivity
US9768056B2 (en) 2013-10-31 2017-09-19 Sunedison Semiconductor Limited (Uen201334164H) Method of manufacturing high resistivity SOI wafers with charge trapping layers based on terminated Si deposition
KR102189611B1 (en) * 2014-01-23 2020-12-14 글로벌웨이퍼스 씨오., 엘티디. High resistivity soi wafers and a method of manufacturing thereof
WO2015119742A1 (en) 2014-02-07 2015-08-13 Sunedison Semiconductor Limited Methods for preparing layered semiconductor structures
JP6118757B2 (en) 2014-04-24 2017-04-19 信越半導体株式会社 Manufacturing method of bonded SOI wafer
CN107004639B (en) * 2014-07-08 2021-02-05 麻省理工学院 Substrate manufacturing method
US20170330747A1 (en) * 2014-12-05 2017-11-16 Shin-Etsu Chemical Co., Ltd. Composite substrate manufacturing method and composite substrate
JP6179530B2 (en) 2015-01-23 2017-08-16 信越半導体株式会社 Manufacturing method of bonded SOI wafer
US9704765B2 (en) 2015-07-31 2017-07-11 Polar Semiconductor, Llc Method of controlling etch-pattern density and device made using such method
FR3048548B1 (en) 2016-03-02 2018-03-02 Soitec METHOD FOR DETERMINING APPROPRIATE ENERGY FOR IMPLANTATION IN DONOR SUBSTRATE AND METHOD FOR MANUFACTURING SEMICONDUCTOR TYPE STRUCTURE ON INSULATION

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