JP2013508974A - 向上した接地ボンド信頼性を有するリードフレーム・パッケージ - Google Patents

向上した接地ボンド信頼性を有するリードフレーム・パッケージ Download PDF

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Publication number
JP2013508974A
JP2013508974A JP2012535229A JP2012535229A JP2013508974A JP 2013508974 A JP2013508974 A JP 2013508974A JP 2012535229 A JP2012535229 A JP 2012535229A JP 2012535229 A JP2012535229 A JP 2012535229A JP 2013508974 A JP2013508974 A JP 2013508974A
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JP
Japan
Prior art keywords
bonding
pad
die
integrated circuit
circuit package
Prior art date
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Pending
Application number
JP2012535229A
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English (en)
Japanese (ja)
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JP2013508974A5 (https=
Inventor
ウェイ リー ショウ
サン エヌジー アイン
シアック リウ チュー
キム リー イー
メン リー ハン
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National Semiconductor Corp
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National Semiconductor Corp
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Publication date
Application filed by National Semiconductor Corp filed Critical National Semiconductor Corp
Publication of JP2013508974A publication Critical patent/JP2013508974A/ja
Publication of JP2013508974A5 publication Critical patent/JP2013508974A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/411—Chip-supporting parts, e.g. die pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/421—Shapes or dispositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07511—Treating the bonding area before connecting, e.g. by applying flux or cleaning
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07531—Techniques
    • H10W72/07532—Compression bonding, e.g. thermocompression bonding
    • H10W72/07533—Ultrasonic bonding, e.g. thermosonic bonding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5434—Dispositions of bond wires the connected ends being on auxiliary connecting means on bond pads, e.g. on other bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5445—Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5525—Materials of bond wires comprising metals or metalloids, e.g. silver comprising copper [Cu]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Wire Bonding (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
JP2012535229A 2009-10-19 2010-10-08 向上した接地ボンド信頼性を有するリードフレーム・パッケージ Pending JP2013508974A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/581,609 US8093707B2 (en) 2009-10-19 2009-10-19 Leadframe packages having enhanced ground-bond reliability
US12/581,609 2009-10-19
PCT/US2010/052061 WO2011049764A2 (en) 2009-10-19 2010-10-08 Leadframe packages having enhanced ground-bond reliability

Publications (2)

Publication Number Publication Date
JP2013508974A true JP2013508974A (ja) 2013-03-07
JP2013508974A5 JP2013508974A5 (https=) 2013-11-28

Family

ID=43878665

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2012535229A Pending JP2013508974A (ja) 2009-10-19 2010-10-08 向上した接地ボンド信頼性を有するリードフレーム・パッケージ

Country Status (5)

Country Link
US (1) US8093707B2 (https=)
JP (1) JP2013508974A (https=)
CN (1) CN102576698A (https=)
TW (1) TWI515855B (https=)
WO (1) WO2011049764A2 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2024166846A1 (ja) * 2023-02-08 2024-08-15 ローム株式会社 半導体装置

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* Cited by examiner, † Cited by third party
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US20110115063A1 (en) * 2009-11-18 2011-05-19 Entropic Communications, Inc. Integrated Circuit Packaging with Split Paddle
US20110140253A1 (en) * 2009-12-14 2011-06-16 National Semiconductor Corporation Dap ground bond enhancement
US9337240B1 (en) * 2010-06-18 2016-05-10 Altera Corporation Integrated circuit package with a universal lead frame
TWI489607B (zh) * 2010-11-23 2015-06-21 登豐微電子股份有限公司 封裝結構
CN102800765A (zh) * 2012-03-21 2012-11-28 深圳雷曼光电科技股份有限公司 Led封装结构及其封装工艺
US9147656B1 (en) * 2014-07-11 2015-09-29 Freescale Semicondutor, Inc. Semiconductor device with improved shielding
US9922904B2 (en) 2015-05-26 2018-03-20 Infineon Technologies Ag Semiconductor device including lead frames with downset
US10249556B1 (en) * 2018-03-06 2019-04-02 Nxp B.V. Lead frame with partially-etched connecting bar
US20190287918A1 (en) * 2018-03-13 2019-09-19 Texas Instruments Incorporated Integrated circuit (ic) packages with shields and methods of producing the same
CN109192715B (zh) * 2018-09-20 2024-03-22 江苏长电科技股份有限公司 引线框结构、封装结构及其制造方法
US20240162121A1 (en) * 2022-11-16 2024-05-16 Texas Instruments Incorporated Integrated circuit package with wire bond
US20250105196A1 (en) * 2023-09-27 2025-03-27 Wolfspeed, Inc. Semiconductor Die Bonding

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JPH11150143A (ja) * 1997-11-17 1999-06-02 Fujitsu Ltd 半導体装置及びその製造方法及びリードフレーム及びその製造方法
JPH11297918A (ja) * 1998-04-10 1999-10-29 Nec Corp リードフレーム及び半導体装置及び半導体装置の製造方法
JP2000252403A (ja) * 1999-02-26 2000-09-14 Mitsui High Tec Inc 半導体装置
JP2005294871A (ja) * 2005-07-05 2005-10-20 Renesas Technology Corp 半導体装置

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US5328079A (en) * 1993-03-19 1994-07-12 National Semiconductor Corporation Method of and arrangement for bond wire connecting together certain integrated circuit components
US6072228A (en) * 1996-10-25 2000-06-06 Micron Technology, Inc. Multi-part lead frame with dissimilar materials and method of manufacturing
US6398556B1 (en) * 1998-07-06 2002-06-04 Chi Fai Ho Inexpensive computer-aided learning methods and apparatus for learners
WO2001009953A1 (en) * 1999-07-30 2001-02-08 Amkor Technology, Inc. Lead frame with downset die pad
KR100359304B1 (ko) * 2000-08-25 2002-10-31 삼성전자 주식회사 주변 링 패드를 갖는 리드 프레임 및 이를 포함하는반도체 칩 패키지
US6424024B1 (en) * 2001-01-23 2002-07-23 Siliconware Precision Industries Co., Ltd. Leadframe of quad flat non-leaded package
US20020096766A1 (en) * 2001-01-24 2002-07-25 Chen Wen Chuan Package structure of integrated circuits and method for packaging the same
US6661083B2 (en) * 2001-02-27 2003-12-09 Chippac, Inc Plastic semiconductor package
TW552689B (en) * 2001-12-21 2003-09-11 Siliconware Precision Industries Co Ltd High electrical characteristic and high heat dissipating BGA package and its process
WO2003079407A2 (en) * 2002-03-12 2003-09-25 Fairchild Semiconductor Corporation Wafer-level coated copper stud bumps
US7229906B2 (en) * 2002-09-19 2007-06-12 Kulicke And Soffa Industries, Inc. Method and apparatus for forming bumps for semiconductor interconnections using a wire bonding machine
WO2004053973A1 (en) * 2002-12-10 2004-06-24 Infineon Technolgies Ag Method of packaging integrated circuits, and integrated circuit packages produced by the method
TWI250632B (en) * 2003-05-28 2006-03-01 Siliconware Precision Industries Co Ltd Ground-enhancing semiconductor package and lead frame
US7049683B1 (en) * 2003-07-19 2006-05-23 Ns Electronics Bangkok (1993) Ltd. Semiconductor package including organo-metallic coating formed on surface of leadframe roughened using chemical etchant to prevent separation between leadframe and molding compound
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JPH11150143A (ja) * 1997-11-17 1999-06-02 Fujitsu Ltd 半導体装置及びその製造方法及びリードフレーム及びその製造方法
JPH11297918A (ja) * 1998-04-10 1999-10-29 Nec Corp リードフレーム及び半導体装置及び半導体装置の製造方法
JP2000252403A (ja) * 1999-02-26 2000-09-14 Mitsui High Tec Inc 半導体装置
JP2005294871A (ja) * 2005-07-05 2005-10-20 Renesas Technology Corp 半導体装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2024166846A1 (ja) * 2023-02-08 2024-08-15 ローム株式会社 半導体装置

Also Published As

Publication number Publication date
CN102576698A (zh) 2012-07-11
TWI515855B (zh) 2016-01-01
US20110089556A1 (en) 2011-04-21
TW201125092A (en) 2011-07-16
WO2011049764A3 (en) 2011-11-17
WO2011049764A2 (en) 2011-04-28
US8093707B2 (en) 2012-01-10

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