JP2013168905A - Power device control circuit and power device circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power device control circuit that inexpensively reconciles EMI noise suppression and switching loss suppression.SOLUTION: A power device control circuit 200 for inputting a gate drive signal into a gate terminal 100a of a power device 100 includes: a control signal input circuit 2 for receiving a power device control signal 1a for controlling the power device 100; a drive system control circuit 4 connected to the control signal input circuit 2; a drive circuit 5 with a plurality of drive systems 5a, 5b, 5c for driving the power device 100 on receipt of a drive circuit control signal 1c from the drive system control circuit 4; and a timer circuit 3 for selecting the drive system 5b in response to the drive circuit control signal 1c a fixed time after the input of a predetermined signal, that is, the power device control signal 1a to change a driving capability of the drive system control circuit 4 to drive the power device 100.

Description

  The present invention relates to a power device control circuit, and more particularly to a power device control circuit that inputs a gate drive signal to a gate terminal of a power device.

  When driving a power device such as an IGBT, the power device is switched by controlling a gate signal of the power device by a power device control circuit.

  When the power device is turned on, a turn-on time required for transition from the off state to the on state occurs. This turn-on time is the time required for the charge to be accumulated in the gate-emitter and gate-collector capacitances. The gate voltage rises as the capacitance is charged and reaches the threshold voltage. The device is turned on.

  When the gate-emitter voltage rises, there is a period in which the gate-emitter voltage is constant. This is a period during which the gate-collector capacitance is charged, and is called a mirror period. After this mirror period, the gate-emitter voltage starts to rise again and reaches the threshold voltage.

  Considering energy loss due to switching loss, it is preferable that the turn-on time is as short as possible. In order to shorten the turn-on time, it is necessary to shorten the mirror period described above. By increasing the current voltage applied to the gate, it is possible to shorten the mirror period and turn on the power device.

  However, if the current voltage applied to the gate at the time of switching is increased, EMI (Electromagnetic Interference) noise increases, which may adversely affect surrounding devices.

  As described above, it is difficult to achieve both suppression of switching loss and suppression of EMI noise, and control is performed at the expense of switching loss in order to reduce EMI noise.

  In order to solve this problem, there is a technique for simultaneously reducing EMI noise and switching loss by monitoring the gate voltage of a power device during switching and switching the gate resistance according to the rate of change of the gate-emitter voltage. It is known (see Patent Document 1). According to Patent Document 1, control is performed to switch the gate resistance to a resistance value lower than the resistance value at the start of turn-on during the mirror period. In this way, by inputting a small current to the gate at the beginning of turn-on, noise such as EMI is reduced, and switching to a large gate current after reaching a mirror period with less noise generation reduces the switching time. Noise reduction is compatible.

  In the following description, the voltage between the gate and the emitter is simply referred to as a gate voltage.

JP 2007-166655 A

  In the technique disclosed in Patent Document 1 described above, a circuit for monitoring the gate voltage and a circuit for protecting the circuit from a surge voltage or the like are necessary. Therefore, the scale of the control circuit increases and the cost also increases. There's a problem.

  In addition, since control is performed to monitor the gate voltage and feed back to the control circuit, there is a problem that it takes a certain time for feedback and cannot cope with high-speed switching.

  The present invention has been made to solve the above-described problems, and is a low-cost power device control capable of high-speed switching while suppressing both switching loss and EMI noise. An object is to provide a circuit.

  A power device control circuit according to the present invention is a power device control circuit that inputs a gate drive signal to a gate terminal of a power device, the control signal input circuit receiving a power device control signal for controlling the power device, and a control A drive system control circuit connected to the signal input circuit; a drive circuit having a plurality of drive systems that receives the drive circuit control signal from the drive system control circuit and drives the power device; and a predetermined signal is input And a timer circuit that changes the drive capability of driving the power device of the drive system control circuit by switching the drive system by a drive circuit control signal after a certain time.

  According to the power device control circuit of the present invention, when the power device is turned on, it is driven with a low driving capability at the start of turn-on, and after reaching the mirror period, the drive system is switched by the drive circuit control signal. EMI noise can be suppressed without sacrificing switching loss by performing control such that driving is performed with higher driving capability.

  Further, since the driving capability is changed using the timer circuit, it is not necessary to monitor the gate voltage, and a relatively small circuit configuration is possible. In addition, since feedback control is not used, high-speed switching can be supported.

2 is a block diagram of a power device control circuit according to Embodiment 1. FIG. FIG. 3 is a diagram illustrating an operation of the power device control circuit according to the first embodiment. 2 is a circuit diagram of a power device control circuit according to Embodiment 1. FIG. 6 is a block diagram of a power device control circuit according to a second embodiment. FIG. FIG. 6 is a diagram illustrating an operation of a power device control circuit according to a second embodiment. 6 is a block diagram of a power device control circuit according to a third embodiment. FIG. FIG. 6 is a circuit diagram of a power device control circuit according to a fourth embodiment.

<Embodiment 1>
<Circuit configuration>
FIG. 1 shows a block diagram of a power device control circuit in the present embodiment. The power device control circuit 200 is connected to the gate terminal 100a of the power device 100 to be controlled. The power device 100 is, for example, an IGBT to which a reflux diode is connected.

  A control signal input circuit 2 that receives an external power device control signal 1 a is connected to the drive system control circuit 4. The timer circuit 2 receives the power device control signal 1a, counts the time until the gate voltage reaches the mirror voltage, and inputs the timer signal 1b to the drive system control circuit.

  The drive circuit 5 is connected to the drive system control circuit 4 and receives a drive circuit control signal 1 c from the drive system control circuit 4. The output of the drive circuit 5 is input to the gate terminal 100a of the power device 100.

  The drive circuit 5 includes a plurality of drive systems, that is, a first drive system 5a, a second drive system 5b, ..., an n-th drive system 5c. These drive systems are switched according to the drive circuit control signal 1c.

  FIG. 2 shows a circuit example of the power device control circuit in the present embodiment. The drive system control circuit 4 includes an emitter follower push-pull circuit in which MOSFETs 4a and 4b are vertically connected, which are driven by receiving the output of the control signal input circuit 2, and a MOSFET 4c which is driven by receiving the timer signal 1b from the timer circuit 3. Is done. The MOSFETs 4a, 4b, and 4c may be other types of transistors.

  The drive circuit 5 includes a first drive system 5a and a second drive system 5b. The first drive system 5a is connected to the output of the push-pull circuit, that is, the emitter of the MOSFET 4a and the collector of the MOSFET 4b, and the second drive system. 5b is connected to the emitter of MOSFET 4c. Each of the first drive system 5a and the second drive system 5b includes a resistance element as a drive element.

  The timer circuit 3 is a time constant circuit composed of a resistance element and a capacitor. By adjusting the resistance value and the capacitor capacity of the time constant circuit, the timer count time is set to be equal to the time until the gate voltage reaches the mirror voltage.

<Operation>
FIG. 3 shows an operation sequence of the power device control circuit 200 in the present embodiment. First, let us consider a case where there is no timer circuit 3 and the power device 100 is driven only by the first drive system 5a. The change in the gate voltage in this case is shown by a broken line in FIG.

  When the power device control signal 1a is input to the control signal input circuit 2 (FIG. 3A), the control signal input circuit turns on the MOSFET 4a included in the drive system control circuit 4. Then, a bias voltage is supplied to the gate terminal 100a of the power device 100 via the first drive system 5a, and the gate-emitter capacitance of the power device 100 is charged, thereby increasing the gate voltage. Thereafter, the gate voltage becomes constant for a while. This period is a period during which the gate-collector capacitance of the power device 100 is charged, and is called a mirror period. After the mirror period, the gate voltage rises again and the power device is turned on. Thus, switching was delayed due to the mirror period, resulting in switching loss.

  Therefore, in the present embodiment, the timer circuit 3 is used to drive by switching the control system. First, the power device control signal 1a is input to the control signal input circuit 2 (FIG. 3 (a)). At the same time, the power device control signal 1a is input to the timer circuit 3, and the timer signal, that is, the time constant circuit The capacitor voltage begins to rise (FIG. 3B). Upon receiving the power device control signal 1a, the control signal input circuit 2 turns on the MOSFET 4a included in the drive system control circuit 4 to enable the first drive system 5a. As a result, a voltage is applied to the gate terminal 100a of the power device 100 with the drive capability of the first drive system 5a, and the gate voltage starts to rise (FIG. 3C). At the same time as the gate voltage reaches the mirror voltage, in the timer circuit 3 that has passed the timer set time, that is, the time constant circuit, the capacitor is completely charged, the MOSFET 4c is turned on, and the second drive system 5b is activated.

  Therefore, after the drive system is switched, the first drive system 5a and the second drive system 5b perform driving with high driving capability by applying a large voltage between the gate and the emitter of the power device. By switching to a high driving capability and driving, the gate-collector capacitance and the gate-emitter capacitance can be quickly charged, and the mirror period is shortened.

  As a modification of the present embodiment, the timer circuit 3 may be a circuit that operates with a digital signal such as a microcomputer.

<Effect>
The power device control circuit 200 in the present embodiment is a power device control circuit that inputs a gate drive signal to the gate terminal 100a of the power device 100, and receives the power device control signal 1a for controlling the power device 100. A signal input circuit 2, a drive system control circuit 4 connected to the control signal input circuit 2, and a plurality of drive systems 5a for driving the power device 100 in response to the drive circuit control signal 1c from the drive system control circuit 4. The drive circuit 5 having 5b and 5c and the power of the drive system control circuit 4 by switching the drive system 5b with the drive circuit control signal 1c after a predetermined time from the input of a predetermined signal, that is, the power device control signal 1a. And a timer circuit 3 that changes the driving capability for driving the device 100.

  Therefore, at the start of turn-on, the first drive system 5a is driven with low driving capability to suppress the generation of EMI noise, and after reaching the mirror period, the drive system is switched by the drive circuit control signal 1c. It is possible to shorten the mirror period and suppress the switching loss by performing the driving with the high driving ability of the first driving system 5a and the second driving system 5b. Further, the power device control circuit 200 according to the present embodiment does not perform feedback control for monitoring the gate voltage as in Patent Document 1, and thus can support high-speed switching. Further, unlike Patent Document 1, a monitor circuit for monitoring the gate voltage and a protection circuit for protecting the gate voltage from a surge voltage or the like are not required, so that the cost can be reduced. Furthermore, since the time until the gate voltage reaches the mirror voltage is determined by the characteristics of the power device control circuit 200, highly accurate control is possible by setting this time as the timer count time of the timer circuit 3. .

  In addition, the predetermined signal input to the timer circuit 3 provided in the power device control circuit 200 in the present embodiment is the power device control signal 1a. Therefore, the power device control signal 1a can be input to the power device control circuit 200 and counting can be started.

  Further, the timer circuit 3 provided in the power device control circuit 200 in the present embodiment is a time constant circuit. Therefore, as shown in FIG. 2, since it can be configured with a resistance element and a capacitor, it can be formed with a small number of circuit elements, and the circuit scale can be reduced.

  Further, each drive system provided in the power device control circuit 200 of the present embodiment outputs a constant voltage. Therefore, each drive system can drive the power device 100 only by the resistance element. Therefore, the circuit scale can be reduced and the cost can be reduced. Furthermore, since the number of parts can be reduced, the defect rate of products can be reduced.

  In the power device control circuit 200 according to the present embodiment, each drive system includes the same or the same type of drive element. Therefore, by making the drive elements provided in each drive system the same or the same type, it is possible to grasp the characteristics of one drive element and grasp the characteristics of other drive elements. Further, even when the drive system includes drive elements connected in parallel, the characteristics can be grasped. In addition, it becomes easy to grasp variations in characteristics of the drive elements.

  In the power device control circuit 200 according to the present embodiment, the number of drive systems is two. Therefore, in order to change the driving capability by switching the driving system, the number of driving systems is 2 is the minimum. Therefore, since the circuit configuration of the present embodiment is the minimum configuration as the configuration of the drive circuit 5, the circuit scale can be reduced and the cost can be reduced. Furthermore, the product defect rate can be reduced by reducing the number of parts.

  As a modification of the power device control circuit 200 in the present embodiment, the timer circuit 3 may be a circuit that operates with a digital signal. Therefore, by using a timer circuit as a circuit such as a microcomputer, highly accurate time control is possible, and time setting is also easier than in a time constant circuit. Even when the power device control circuit 200 is built in the IC, the time can be set.

<Embodiment 2>
A block diagram of the power device control circuit in the present embodiment is shown in FIG. In the first embodiment, the power device control signal 1a is input as the input signal to the timer circuit 3. However, the present embodiment is different in that the drive circuit control signal 1c is input. Since other circuit configurations are the same as those of the first embodiment, description thereof is omitted.

  The timer circuit 3 in FIG. 4 is a time constant circuit as in the first embodiment, and the time from when the drive circuit control signal 1c is input until the gate voltage reaches the mirror voltage is the timer count time. It is set in advance.

  FIG. 5 shows an operation sequence of the power device control circuit in the present embodiment. In the first embodiment (FIG. 3), the timer circuit 3 starts counting at the same time when the power device control signal 1a is input to the control signal input circuit 2, but in this embodiment, the timing is later than that. That is, at the timing when the drive circuit control signal 1c is input to the drive circuit 5, the timer circuit 3 starts counting. Other operations are the same as those in FIG.

<Effect>
The predetermined signal input to the timer circuit 3 provided in the power device control circuit 200 in the present embodiment is a drive circuit control signal 1c. Therefore, since the timer count time of the timer circuit 3 is shorter than that of the first embodiment, the capacitance of the capacitor constituting the time constant circuit can be reduced, so that the circuit can be reduced in size and cost. is there. In addition, since the count time is shortened, variation in the count time is reduced, and high-precision control is possible.

<Embodiment 3>
FIG. 6 shows a block diagram of a power device control circuit in the present embodiment. Unlike the first and second embodiments, two timer circuits are provided. By setting the timer count time to be shifted between the first timer circuit 6 and the second timer circuit 7, a time difference in which the timer signals 1d and 1e are input to the drive system control circuit 4 is generated, and this time difference is utilized. The drive systems 5a, 5b, and 5c can be switched step by step.

  The power device control circuit 200 according to the present embodiment includes a plurality of timer circuits. Therefore, the drive system can be switched a plurality of times, and the drive capability can be changed more smoothly than in the first and second embodiments, so that more ideal gate voltage control is possible.

<Embodiment 4>
A circuit diagram of the power device control circuit of the present embodiment is shown in FIG. In the first embodiment, a constant voltage output is obtained by connecting a resistance element to each drive system of the drive circuit 5, but in the present embodiment, the first drive system 5a and the second drive system 5b. Differs from the first embodiment in that outputs a constant current.

  In FIG. 7, the drive elements are not connected to the first drive system 5a and the second drive system 5b, but are merely connection lines, and the output currents of the MOSFETs 4a and 4c are output as they are to provide a constant current output. However, for example, a transistor such as a MOSFET may be further connected to each drive system, and current amplification may be performed to obtain a constant current output.

  As in the first embodiment, at the initial turn-on time, driving is performed with the driving capability of only the first driving system 5a, that is, the output current of the MOSFET 4a. After a certain time, that is, at the same time when the gate voltage reaches the mirror voltage, the timer circuit 3 turns on the MOSFET 4c, and the second drive system 5b becomes effective. Thereafter, the drive capability changes so that the drive is performed by the output current of the first drive system 5a and the second drive system 5b. Therefore, the turn-on is performed in the same operation sequence as in FIG. 3 of the first embodiment.

<Effect>
In the power device control circuit 200 according to the present embodiment, the drive systems 5a and 5b output a constant current. Therefore, since the power device 100 is turned on by constant current driving, the gate-emitter capacitance and the gate-collector capacitance of the power device 100 are charged with a constant current. Therefore, since the gate voltage changes linearly with respect to time, the gate voltage can be easily controlled.

<Embodiment 5>
The power device control circuit in the present embodiment is the power device control circuit 200 described in any one of the first to fourth embodiments, and is entirely incorporated in one IC or distributed to a plurality of ICs. Built in.

  The power device control circuit in the present embodiment is characterized in that the entire power device control circuit is built in one IC or distributed and built in a plurality of ICs. Therefore, by making an IC, the circuit scale can be reduced and the size can be reduced. Further, by reducing the number of parts by making the circuit into an IC, it is possible to reduce the defect rate, and it is also possible to reduce the manufacturing cost.

<Embodiment 6>
The power device circuit in the present embodiment includes power device control circuit 200 described in any of Embodiments 1 to 4, and power device 100 driven thereby. As the power device circuit, for example, IPM (Intelligent Power Module) is conceivable. For example, as described in the first embodiment, the power device 100 includes an IGBT and a free wheel diode.

  As a modification of the power device circuit in the present embodiment, the power device 100 may be an RC-IGBT (also referred to as reverse conducting IGBT) made of any one of Si, SiC, and GaN.

  The power device circuit in the present embodiment includes the power device control circuit 200 described in any of Embodiments 1 to 4, and the power device 100 connected to the power device control circuit 200. Therefore, by arranging the power device control circuit 200 and the power device 100 in the same circuit, for example, an IPM, noise can be reduced by shortening the wiring between elements, and the number of components can be reduced.

  The power device 100 according to the present embodiment is characterized by using SiC or GaN as a material. Therefore, since SiC and GaN have higher pressure resistance than Si, the power device 100 can be miniaturized, so that the power device circuit can be miniaturized. In addition, since operation at a higher temperature and higher speed are possible as compared with Si, for example, when the power device circuit is an IPM, the heat radiation of the IPM itself or a device in which the IPM is disposed is provided. The structure can be simplified.

  The power device 100 according to the present embodiment further includes a diode, and this diode is made of SiC or GaN. Therefore, since SiC and GaN have higher voltage resistance than Si, the diode can be miniaturized and the power device circuit can be miniaturized.

  As a modification of the power device circuit in the present embodiment, the power device 100 is an RC-IGBT made of any one of Si, SiC, and GaN. Therefore, the circuit scale is reduced and the circuit can be easily assembled as compared with the case where the diode and the power device are used in different chips.

  It should be noted that the present invention can be freely combined with each other within the scope of the invention, and each embodiment can be appropriately modified or omitted.

  1a power device control signal, 1b timer signal, 1c drive circuit control signal, 1d first timer signal, 1e second timer signal, 2 control signal input circuit, 3 timer circuit, 4 drive system control circuit, 5 drive circuit, 5a first 1 drive system, 5b second drive system, 5c nth drive system, 6 first timer circuit, 7 second timer circuit, 100 power device, 100a gate terminal, 200 power device control circuit.

Claims (15)

A power device control circuit for inputting a gate drive signal to a gate terminal of a power device,
A control signal input circuit for receiving a power device control signal for controlling the power device;
A drive system control circuit connected to the control signal input circuit;
A drive circuit having a plurality of drive systems for receiving the drive circuit control signal from the drive system control circuit and driving the power device;
A timer circuit that changes the drive capability of driving the power device of the drive system control circuit by switching the drive system according to the drive circuit control signal after a predetermined time from the input of a predetermined signal;
Comprising
Power device control circuit. The predetermined signal is the power device control signal;
The power device control circuit according to claim 1. The predetermined signal is the drive circuit control signal.
The power device control circuit according to claim 1. A plurality of the timer circuits are provided,
The power device control circuit according to claim 1. The timer circuit is a time constant circuit,
The power device control circuit according to claim 1. The timer circuit is a circuit that operates with a digital signal,
The power device control circuit according to claim 1. The drive system outputs a constant voltage,
The power device control circuit according to claim 1. The drive system outputs a constant current,
The power device control circuit according to claim 1. Each of the drive systems includes the same or the same kind of drive elements,
The power device control circuit according to claim 1. The number of the drive systems is 2.
The power device control circuit according to claim 1. The power device control circuit is built in a single IC as a whole or distributed in a plurality of ICs.
The power device control circuit according to claim 1. The power device control circuit according to any one of claims 1 to 10,
A power device connected to the power device control circuit;
A power device circuit comprising: The power device is composed of an element made of SiC or GaN,
The power device circuit according to claim 12. The power device is
Further comprising a diode;
The diode is made of SiC or GaN,
The power device circuit according to claim 12. The power device is an RC-IGBT made of any one of Si, SiC, and GaN.
The power device circuit according to claim 12.

Images