CN114629487B - Reinforced driving circuit resisting single event effect - Google Patents
Reinforced driving circuit resisting single event effect Download PDFInfo
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- CN114629487B CN114629487B CN202210284242.2A CN202210284242A CN114629487B CN 114629487 B CN114629487 B CN 114629487B CN 202210284242 A CN202210284242 A CN 202210284242A CN 114629487 B CN114629487 B CN 114629487B
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- power tube
- driving
- driving circuit
- single event
- lower power
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/0033—Radiation hardening
- H03K19/00338—In field effect transistor circuits
Abstract
The invention discloses a reinforced driving circuit resisting single event effect, which comprises an upper power tube, a lower power tube and a driving circuit, wherein the driving circuit is used for driving the upper power tube and the lower power tube respectively; each power tube is provided with a plurality of driving circuits, and an error feedback logic circuit is also arranged between the driving circuits and the power tubes. The invention connects three same driving circuits through the driving signals IN1, IN2 of the upper and lower power tubes; error signals generated by single event effect are greatly reduced; three driving circuits are required to be starting signals simultaneously when the upper power tube and the lower power tube are started; only one path of closing signal is needed to close the upper power tube and the lower power tube; in order to prevent logic errors caused by single event effect, the upper power tube and the lower power tube are conducted simultaneously; feeding back grid input signals of the upper power tube and the lower power tube, and closing the upper power tube and the lower power tube simultaneously through the two NOR gates when the grid input signals are opening signals simultaneously; the logic error caused by the single event effect is greatly reduced, and the single event resistance of the driving circuit is effectively improved.
Description
Technical Field
The invention relates to the field of semiconductors, in particular to a reinforced driving circuit resisting a single event effect.
Background
An integrated circuit applied in a space environment is inevitably subjected to heavy ion bombardment, which can cause instant voltage fluctuation in the circuit, so that two power tubes of a driving circuit are directly connected due to logic errors in the circuit, particularly for the driving circuit, if the logic errors cannot be identified in time, and meanwhile, if the direct-connection instant circuit is not corrected in time, the circuit can generate larger current and even be burnt.
Accordingly, the prior art is deficient and needs improvement.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: the reinforced drive circuit with the single event effect resistance can greatly reduce logic errors caused by the single event effect, so that the single event resistance of the drive circuit is effectively improved.
The technical scheme of the invention is as follows: a reinforced driving circuit resisting single event effect comprises an upper power tube, a lower power tube and a driving circuit for respectively driving the upper power tube and the lower power tube; each power tube is provided with a plurality of driving circuits, and an error feedback logic circuit is arranged between the driving circuits and the power tubes.
In the technical scheme, a NOR gate is further arranged between each power tube and the drive circuit in the reinforced drive circuit for resisting the single event effect, and each NOR gate is further connected with the error feedback logic circuit respectively.
The reinforced drive circuit for resisting the single event effect is applied to the technical schemes, each power tube is provided with three identical drive circuits, and the drive circuits are connected in parallel.
The reinforced driving circuit is integrated in a driving chip and used for driving a mos tube connected with the reinforced driving circuit.
The reinforced driving circuit for resisting the single event effect is applied to the technical schemes, and the driving chip is applied to driving of a motor in a satellite.
The invention has the beneficial effects that:
the invention connects three same driving circuits through the driving signals IN1, IN2 of the upper and lower power tubes 110 and 111; the three same driving circuits can greatly reduce error signals caused by single event effect; three driving circuits are required to be starting signals simultaneously when the upper power tube and the lower power tube are started; only one path of closing signal is needed to close the upper power tube and the lower power tube; meanwhile, in order to prevent logic errors caused by the single event effect, the upper power tube and the lower power tube are conducted simultaneously; feeding back grid input signals of the upper power tube and the lower power tube, and closing the upper power tube and the lower power tube simultaneously through two NOR gates 107 and 108 when the grid input signals are opening signals simultaneously; the logic error caused by the single event effect can be greatly reduced, and the single event resistance of the driving circuit is effectively improved.
Drawings
FIG. 1 is a circuit block diagram of the present invention;
fig. 2 is a circuit diagram of the application of the invention.
Detailed Description
The invention is described in detail below with reference to the figures and the specific embodiments.
The embodiment provides a reinforced driving circuit resisting a single event effect, as shown in fig. 1, the reinforced driving circuit comprises an upper power tube 110, a lower power tube 110 and a power tube 111, and a driving circuit 101, a driving circuit 102 and a driving circuit 103 are used for driving the power tubes 110, wherein the driving circuit 101, the driving circuit 102 and the driving circuit 103 are the same driving circuit and are arranged in parallel with one another; the driving circuit 104, the driving circuit 105 and the driving circuit 106 are used for driving the power tube 111, wherein the driving circuit 104, the driving circuit 105 and the driving circuit 106 are the same driving circuit and are arranged in parallel; therefore, error signals generated by single event effect can be greatly reduced through three same driving circuits, namely when one driving circuit is bombarded by heavy ions, other driving circuits are not affected, and normal work of the driving circuits can be ensured; moreover, practice proves that the optimal number of the driving circuits can be achieved in cost, size and using effect by arranging three same driving circuits.
And an error feedback logic circuit 109 is arranged between the driving circuit and the power tube, so that whether logic errors occur in each driving circuit and the power tube can be fed back in real time through the error feedback logic circuit 109, the circuits can be corrected in time, and the problem that the circuits generate large current and are even burnt due to the fact that the circuits are not corrected in time at the moment of direct connection is avoided.
Furthermore, a nor gate is further disposed between each power transistor and its driving circuit, wherein, as shown in fig. 1, in this embodiment, for the power transistor 110 and the power transistor 111, a nor gate 107 and a nor gate 108 are respectively disposed, and the nor gate 107 and the nor gate 108 are further respectively connected to the error feedback logic circuit 109; the error feedback logic circuit 109 feeds back the gate input signals of the upper and lower power tubes 110 and the power tube 111, and when the gate input signals are the turn-on signals at the same time, the nor gate 107 and the nor gate 108 are used to respectively and simultaneously turn off the upper and lower power tubes 110 and the power tube 111; the problem that the circuit generates larger current and is even burnt out due to the fact that the direct-connection instant circuit is not corrected in time can be solved.
The reinforcing driving circuit is integrated in a driving chip and used for driving the mos tube connected with the reinforcing driving circuit; as shown in fig. 2, the solid driving circuit of the present embodiment is integrated in a driving chip U1 and a driving chip U2, and the driving chip U1 is used for driving a mos tube Q1 and a mos tube Q2; the driving chip U2 is used for driving the mos tube Q3 and the mos tube Q4; in addition, the reinforced driving chip of the embodiment is applied to the inside of a satellite to drive a motor in the satellite.
Thus, the driving signals IN1 and IN2 of the upper power tube 110 and the lower power tube 111 are respectively connected with three same driving circuits; the three same driving circuits can greatly reduce error signals caused by single event effect; three driving circuits are required to be starting signals simultaneously when the upper power tube and the lower power tube are started; only one path of closing signal is needed to close the upper power tube and the lower power tube; meanwhile, in order to prevent logic errors caused by the single event effect, the upper power tube and the lower power tube are conducted at the same time; feeding back grid input signals of the upper power tube and the lower power tube, and closing the upper power tube and the lower power tube simultaneously through two NOR gates 107 and 108 when the grid input signals are opening signals simultaneously; the logic error caused by the single event effect can be greatly reduced, and the single event resistance of the driving circuit is effectively improved.
The present invention is not limited to the above preferred embodiments, and any modifications, equivalent substitutions and improvements made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (4)
1. A reinforced driving circuit resisting single event effect comprises an upper power tube, a lower power tube and a driving circuit for respectively driving the upper power tube and the lower power tube, wherein the upper power tube is an NMOS tube, and the lower power tube is a PMOS tube; it is characterized in that the preparation method is characterized in that,
each power tube is provided with a plurality of driving circuits, and an error feedback logic circuit is also arranged between each driving circuit and the power tube;
a NOR gate is arranged between each power tube and the drive circuit thereof, and each NOR gate is also connected with the error feedback logic circuit respectively; the error feedback logic circuit feeds back grid input signals of the upper power tube and the lower power tube, and when the grid input signals are opening signals at the same time, the upper power tube and the lower power tube are closed at the same time through the two NOR gates.
2. The single event effect resistant hardened driving circuit according to claim 1, characterized in that: each power tube is provided with three identical drive circuits, and the drive circuits are arranged in parallel.
3. The single event effect resistant hardened driving circuit according to claim 2, characterized in that: the reinforcing driving circuit is integrated in a driving chip and used for driving the mos tube connected with the reinforcing driving circuit.
4. The reinforced driving circuit resisting the single event effect according to claim 3, wherein: the driving chip is applied to driving of a motor in the satellite.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210284242.2A CN114629487B (en) | 2022-03-22 | 2022-03-22 | Reinforced driving circuit resisting single event effect |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210284242.2A CN114629487B (en) | 2022-03-22 | 2022-03-22 | Reinforced driving circuit resisting single event effect |
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| Publication Number | Publication Date |
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| CN114629487A CN114629487A (en) | 2022-06-14 |
| CN114629487B true CN114629487B (en) | 2023-03-21 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202210284242.2A Active CN114629487B (en) | 2022-03-22 | 2022-03-22 | Reinforced driving circuit resisting single event effect |
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Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111293862A (en) * | 2020-02-27 | 2020-06-16 | 电子科技大学 | High-reliability self-adaptive dead time grid driving circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7639462B2 (en) * | 2005-10-25 | 2009-12-29 | Honeywell International Inc. | Method and system for reducing transient event effects within an electrostatic discharge power clamp |
| US7804320B2 (en) * | 2008-06-13 | 2010-09-28 | University Of South Florida | Methodology and apparatus for reduction of soft errors in logic circuits |
| JP5777537B2 (en) * | 2012-02-17 | 2015-09-09 | 三菱電機株式会社 | Power device control circuit and power device circuit |
| CN205453478U (en) * | 2015-12-31 | 2016-08-10 | 童乔凌 | IGBT closed loop initiative drive circuit |
| CN107026638B (en) * | 2016-02-01 | 2020-08-11 | 中车株洲电力机车研究所有限公司 | IGBT driving device and driving method |
| CN108683421A (en) * | 2017-12-28 | 2018-10-19 | 北京时代民芯科技有限公司 | A kind of the dual redundant decoder driver circuit and medium of the anti-single point failure of satellite |
| CN108777543B (en) * | 2018-06-07 | 2021-05-04 | 上海艾为电子技术股份有限公司 | Synchronous rectification converter and switching tube driving method thereof |
| CN112332638A (en) * | 2020-11-24 | 2021-02-05 | 江苏润石科技有限公司 | High-efficiency low-EMI driving circuit |
| CN112904764B (en) * | 2021-01-15 | 2023-07-21 | 中国科学院光电技术研究所 | Space intersection docking laser radar scanning tracking control system and method |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111293862A (en) * | 2020-02-27 | 2020-06-16 | 电子科技大学 | High-reliability self-adaptive dead time grid driving circuit |
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