JP2013105512A - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP2013105512A
JP2013105512A JP2011249249A JP2011249249A JP2013105512A JP 2013105512 A JP2013105512 A JP 2013105512A JP 2011249249 A JP2011249249 A JP 2011249249A JP 2011249249 A JP2011249249 A JP 2011249249A JP 2013105512 A JP2013105512 A JP 2013105512A
Authority
JP
Japan
Prior art keywords
data
chip
core chips
circuit
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2011249249A
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English (en)
Japanese (ja)
Other versions
JP2013105512A5 (enExample
Inventor
Masashi Ogasawara
正志 小笠原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Memory Japan Ltd
Original Assignee
Elpida Memory Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Elpida Memory Inc filed Critical Elpida Memory Inc
Priority to JP2011249249A priority Critical patent/JP2013105512A/ja
Priority to US13/671,438 priority patent/US20130121092A1/en
Publication of JP2013105512A publication Critical patent/JP2013105512A/ja
Publication of JP2013105512A5 publication Critical patent/JP2013105512A5/ja
Pending legal-status Critical Current

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Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4096Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/02Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/04Supports for storage elements, e.g. memory modules; Mounting or fixing of storage elements on such supports
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1066Output synchronization

Landscapes

  • Engineering & Computer Science (AREA)
  • Databases & Information Systems (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Memory System (AREA)
  • Dram (AREA)
JP2011249249A 2011-11-15 2011-11-15 半導体装置 Pending JP2013105512A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2011249249A JP2013105512A (ja) 2011-11-15 2011-11-15 半導体装置
US13/671,438 US20130121092A1 (en) 2011-11-15 2012-11-07 Semiconductor device including plural semiconductor chips stacked to one another

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2011249249A JP2013105512A (ja) 2011-11-15 2011-11-15 半導体装置

Publications (2)

Publication Number Publication Date
JP2013105512A true JP2013105512A (ja) 2013-05-30
JP2013105512A5 JP2013105512A5 (enExample) 2015-01-08

Family

ID=48280519

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011249249A Pending JP2013105512A (ja) 2011-11-15 2011-11-15 半導体装置

Country Status (2)

Country Link
US (1) US20130121092A1 (enExample)
JP (1) JP2013105512A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016038748A1 (ja) * 2014-09-12 2016-03-17 株式会社東芝 記憶装置

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5654855B2 (ja) * 2010-11-30 2015-01-14 ピーエスフォー ルクスコ エスエイアールエルPS4 Luxco S.a.r.l. 半導体装置
US20130153896A1 (en) 2011-12-19 2013-06-20 Texas Instruments Incorporated SCAN TESTABLE THROUGH SILICON VIAs
KR102092745B1 (ko) * 2013-10-24 2020-03-24 에스케이하이닉스 주식회사 반도체 장치 및 이의 테스트 방법
JP6736441B2 (ja) * 2016-09-28 2020-08-05 ルネサスエレクトロニクス株式会社 半導体装置
US11004477B2 (en) * 2018-07-31 2021-05-11 Micron Technology, Inc. Bank and channel structure of stacked semiconductor device
KR102579174B1 (ko) * 2018-12-24 2023-09-18 에스케이하이닉스 주식회사 적층형 메모리 장치 및 이를 포함하는 메모리 시스템
CN115842013B (zh) * 2023-02-13 2023-06-09 浙江力积存储科技有限公司 一种三维堆叠存储器及其数据处理方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004327474A (ja) * 2003-04-21 2004-11-18 Elpida Memory Inc メモリモジュール及びメモリシステム
JP2006330974A (ja) * 2005-05-25 2006-12-07 Elpida Memory Inc 半導体記憶装置
JP2007157266A (ja) * 2005-12-06 2007-06-21 Elpida Memory Inc 積層型半導体装置およびチップ選択回路
US20070194455A1 (en) * 2006-02-22 2007-08-23 Elpida Memory, Inc. Stacked semiconductor memory device and control method thereof
US20110085404A1 (en) * 2009-10-09 2011-04-14 Elpida Memory, Inc. Semiconductor memory device and information processing system including the same

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8904140B2 (en) * 2009-05-22 2014-12-02 Hitachi, Ltd. Semiconductor device
JP2011082449A (ja) * 2009-10-09 2011-04-21 Elpida Memory Inc 半導体装置
JP2011081732A (ja) * 2009-10-09 2011-04-21 Elpida Memory Inc 半導体装置及びその調整方法並びにデータ処理システム

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004327474A (ja) * 2003-04-21 2004-11-18 Elpida Memory Inc メモリモジュール及びメモリシステム
JP2006330974A (ja) * 2005-05-25 2006-12-07 Elpida Memory Inc 半導体記憶装置
JP2007157266A (ja) * 2005-12-06 2007-06-21 Elpida Memory Inc 積層型半導体装置およびチップ選択回路
US20070194455A1 (en) * 2006-02-22 2007-08-23 Elpida Memory, Inc. Stacked semiconductor memory device and control method thereof
JP2007226876A (ja) * 2006-02-22 2007-09-06 Elpida Memory Inc 積層型半導体記憶装置及びその制御方法
US20110085404A1 (en) * 2009-10-09 2011-04-14 Elpida Memory, Inc. Semiconductor memory device and information processing system including the same
JP2011081888A (ja) * 2009-10-09 2011-04-21 Elpida Memory Inc 半導体記憶装置及びこれを備える情報処理システム

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016038748A1 (ja) * 2014-09-12 2016-03-17 株式会社東芝 記憶装置
JPWO2016038748A1 (ja) * 2014-09-12 2017-06-29 株式会社東芝 記憶装置
US10359961B2 (en) 2014-09-12 2019-07-23 Toshiba Memory Corporation Storage device

Also Published As

Publication number Publication date
US20130121092A1 (en) 2013-05-16

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