JP2013105512A5 - - Google Patents

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Publication number
JP2013105512A5
JP2013105512A5 JP2011249249A JP2011249249A JP2013105512A5 JP 2013105512 A5 JP2013105512 A5 JP 2013105512A5 JP 2011249249 A JP2011249249 A JP 2011249249A JP 2011249249 A JP2011249249 A JP 2011249249A JP 2013105512 A5 JP2013105512 A5 JP 2013105512A5
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JP
Japan
Prior art keywords
core chips
chip
identification information
read
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2011249249A
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English (en)
Japanese (ja)
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JP2013105512A (ja
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Publication date
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Priority to JP2011249249A priority Critical patent/JP2013105512A/ja
Priority claimed from JP2011249249A external-priority patent/JP2013105512A/ja
Priority to US13/671,438 priority patent/US20130121092A1/en
Publication of JP2013105512A publication Critical patent/JP2013105512A/ja
Publication of JP2013105512A5 publication Critical patent/JP2013105512A5/ja
Pending legal-status Critical Current

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JP2011249249A 2011-11-15 2011-11-15 半導体装置 Pending JP2013105512A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2011249249A JP2013105512A (ja) 2011-11-15 2011-11-15 半導体装置
US13/671,438 US20130121092A1 (en) 2011-11-15 2012-11-07 Semiconductor device including plural semiconductor chips stacked to one another

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2011249249A JP2013105512A (ja) 2011-11-15 2011-11-15 半導体装置

Publications (2)

Publication Number Publication Date
JP2013105512A JP2013105512A (ja) 2013-05-30
JP2013105512A5 true JP2013105512A5 (enExample) 2015-01-08

Family

ID=48280519

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011249249A Pending JP2013105512A (ja) 2011-11-15 2011-11-15 半導体装置

Country Status (2)

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US (1) US20130121092A1 (enExample)
JP (1) JP2013105512A (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5654855B2 (ja) * 2010-11-30 2015-01-14 ピーエスフォー ルクスコ エスエイアールエルＰＳ４ Ｌｕｘｃｏ Ｓ．ａ．ｒ．ｌ． 半導体装置
US20130153896A1 (en) 2011-12-19 2013-06-20 Texas Instruments Incorporated SCAN TESTABLE THROUGH SILICON VIAs
KR102092745B1 (ko) * 2013-10-24 2020-03-24 에스케이하이닉스 주식회사 반도체 장치 및 이의 테스트 방법
JP6374008B2 (ja) * 2014-09-12 2018-08-15 東芝メモリ株式会社 記憶装置
JP6736441B2 (ja) * 2016-09-28 2020-08-05 ルネサスエレクトロニクス株式会社 半導体装置
US11004477B2 (en) * 2018-07-31 2021-05-11 Micron Technology, Inc. Bank and channel structure of stacked semiconductor device
KR102579174B1 (ko) * 2018-12-24 2023-09-18 에스케이하이닉스 주식회사 적층형 메모리 장치 및 이를 포함하는 메모리 시스템
CN115842013B (zh) * 2023-02-13 2023-06-09 浙江力积存储科技有限公司 一种三维堆叠存储器及其数据处理方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4419049B2 (ja) * 2003-04-21 2010-02-24 エルピーダメモリ株式会社 メモリモジュール及びメモリシステム
JP4423453B2 (ja) * 2005-05-25 2010-03-03 エルピーダメモリ株式会社 半導体記憶装置
JP4799157B2 (ja) * 2005-12-06 2011-10-26 エルピーダメモリ株式会社 積層型半導体装置
JP4828251B2 (ja) * 2006-02-22 2011-11-30 エルピーダメモリ株式会社 積層型半導体記憶装置及びその制御方法
US8904140B2 (en) * 2009-05-22 2014-12-02 Hitachi, Ltd. Semiconductor device
JP2011081732A (ja) * 2009-10-09 2011-04-21 Elpida Memory Inc 半導体装置及びその調整方法並びにデータ処理システム
JP2011082449A (ja) * 2009-10-09 2011-04-21 Elpida Memory Inc 半導体装置
JP5586915B2 (ja) * 2009-10-09 2014-09-10 ピーエスフォー ルクスコ エスエイアールエル 半導体記憶装置及びこれを備える情報処理システム

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