JP2013102417A5 - - Google Patents

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Publication number
JP2013102417A5
JP2013102417A5 JP2012172302A JP2012172302A JP2013102417A5 JP 2013102417 A5 JP2013102417 A5 JP 2013102417A5 JP 2012172302 A JP2012172302 A JP 2012172302A JP 2012172302 A JP2012172302 A JP 2012172302A JP 2013102417 A5 JP2013102417 A5 JP 2013102417A5
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JP
Japan
Prior art keywords
clock
circuit
branch point
signal
sequential
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Pending
Application number
JP2012172302A
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English (en)
Japanese (ja)
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JP2013102417A (ja
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Priority to JP2012172302A priority Critical patent/JP2013102417A/ja
Priority claimed from JP2012172302A external-priority patent/JP2013102417A/ja
Priority to US13/597,366 priority patent/US8710892B2/en
Publication of JP2013102417A publication Critical patent/JP2013102417A/ja
Publication of JP2013102417A5 publication Critical patent/JP2013102417A5/ja
Pending legal-status Critical Current

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JP2012172302A 2011-10-14 2012-08-02 クロック分配回路 Pending JP2013102417A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2012172302A JP2013102417A (ja) 2011-10-14 2012-08-02 クロック分配回路
US13/597,366 US8710892B2 (en) 2011-10-14 2012-08-29 Clock distribution circuit

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2011227436 2011-10-14
JP2011227436 2011-10-14
JP2012172302A JP2013102417A (ja) 2011-10-14 2012-08-02 クロック分配回路

Publications (2)

Publication Number Publication Date
JP2013102417A JP2013102417A (ja) 2013-05-23
JP2013102417A5 true JP2013102417A5 (cg-RX-API-DMAC7.html) 2015-08-06

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ID=48085584

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2012172302A Pending JP2013102417A (ja) 2011-10-14 2012-08-02 クロック分配回路

Country Status (2)

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US (1) US8710892B2 (cg-RX-API-DMAC7.html)
JP (1) JP2013102417A (cg-RX-API-DMAC7.html)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9793900B1 (en) 2016-06-29 2017-10-17 Microsoft Technology Licensing, Llc Distributed multi-phase clock generator having coupled delay-locked loops
US10585449B1 (en) * 2019-01-15 2020-03-10 Arm Limited Clock circuitry for functionally safe systems

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06282350A (ja) * 1993-01-27 1994-10-07 Hitachi Ltd Ｌｓｉ内クロック分配回路
US6429715B1 (en) * 2000-01-13 2002-08-06 Xilinx, Inc. Deskewing clock signals for off-chip devices
JP2002023886A (ja) * 2000-07-11 2002-01-25 Nec Corp 半導体集積回路
US6809606B2 (en) * 2002-05-02 2004-10-26 Intel Corporation Voltage ID based frequency control for clock generating circuit
US6839301B2 (en) * 2003-04-28 2005-01-04 Micron Technology, Inc. Method and apparatus for improving stability and lock time for synchronous circuits
JP2007336003A (ja) * 2006-06-12 2007-12-27 Nec Electronics Corp クロック分配回路、半導体集積回路、クロック分配回路の形成方法及びそのプログラム
JP2008010607A (ja) 2006-06-29 2008-01-17 Nec Computertechno Ltd 半導体集積回路およびクロックスキュー低減方法

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