JP2013004865A5 - - Google Patents
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- Publication number
- JP2013004865A5 JP2013004865A5 JP2011136474A JP2011136474A JP2013004865A5 JP 2013004865 A5 JP2013004865 A5 JP 2013004865A5 JP 2011136474 A JP2011136474 A JP 2011136474A JP 2011136474 A JP2011136474 A JP 2011136474A JP 2013004865 A5 JP2013004865 A5 JP 2013004865A5
- Authority
- JP
- Japan
- Prior art keywords
- solder
- solder ball
- forming
- semiconductor device
- spherical
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 229910000679 solder Inorganic materials 0.000 claims description 35
- 239000004065 semiconductor Substances 0.000 claims description 18
- 239000011347 resin Substances 0.000 claims description 11
- 229920005989 resin Polymers 0.000 claims description 11
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical group [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 5
- 238000000034 method Methods 0.000 claims description 5
- 238000002844 melting Methods 0.000 claims description 3
- 230000008018 melting Effects 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 claims 5
- 238000005530 etching Methods 0.000 claims 1
- 238000007517 polishing process Methods 0.000 claims 1
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011136474A JP5837339B2 (ja) | 2011-06-20 | 2011-06-20 | 半導体装置の製造方法及び半導体装置 |
| US13/526,821 US8736053B2 (en) | 2011-06-20 | 2012-06-19 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011136474A JP5837339B2 (ja) | 2011-06-20 | 2011-06-20 | 半導体装置の製造方法及び半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2013004865A JP2013004865A (ja) | 2013-01-07 |
| JP2013004865A5 true JP2013004865A5 (enExample) | 2014-07-24 |
| JP5837339B2 JP5837339B2 (ja) | 2015-12-24 |
Family
ID=47353038
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2011136474A Active JP5837339B2 (ja) | 2011-06-20 | 2011-06-20 | 半導体装置の製造方法及び半導体装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US8736053B2 (enExample) |
| JP (1) | JP5837339B2 (enExample) |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012114173A (ja) * | 2010-11-23 | 2012-06-14 | Shinko Electric Ind Co Ltd | 半導体装置の製造方法及び半導体装置 |
| US8928134B2 (en) * | 2012-12-28 | 2015-01-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package on package bonding structure and method for forming the same |
| US9305853B2 (en) | 2013-08-30 | 2016-04-05 | Apple Inc. | Ultra fine pitch PoP coreless package |
| US9613933B2 (en) * | 2014-03-05 | 2017-04-04 | Intel Corporation | Package structure to enhance yield of TMI interconnections |
| GB2540060B (en) * | 2014-03-27 | 2019-02-13 | Intel Corp | Hybrid interconnect for low temperature attach |
| US10236267B2 (en) * | 2014-08-01 | 2019-03-19 | Kyocera International, Inc. | Methods of forming flip chip systems |
| JP6319026B2 (ja) * | 2014-09-29 | 2018-05-09 | 日亜化学工業株式会社 | 発光装置及びその製造方法 |
| US10231338B2 (en) | 2015-06-24 | 2019-03-12 | Intel Corporation | Methods of forming trenches in packages structures and structures formed thereby |
| KR102420126B1 (ko) | 2016-02-01 | 2022-07-12 | 삼성전자주식회사 | 반도체 소자 |
| TWI602275B (zh) * | 2016-10-14 | 2017-10-11 | 恆勁科技股份有限公司 | 封裝結構及其製作方法 |
| US10804115B2 (en) | 2017-08-03 | 2020-10-13 | General Electric Company | Electronics package with integrated interconnect structure and method of manufacturing thereof |
| US10541209B2 (en) * | 2017-08-03 | 2020-01-21 | General Electric Company | Electronics package including integrated electromagnetic interference shield and method of manufacturing thereof |
| US10541153B2 (en) * | 2017-08-03 | 2020-01-21 | General Electric Company | Electronics package with integrated interconnect structure and method of manufacturing thereof |
| CN116403973B (zh) * | 2023-04-23 | 2025-01-17 | 长鑫存储技术有限公司 | 封装叠层结构及其制备方法 |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7777351B1 (en) | 2007-10-01 | 2010-08-17 | Amkor Technology, Inc. | Thin stacked interposer package |
| JP4831502B2 (ja) * | 2008-09-25 | 2011-12-07 | 日立金属株式会社 | 耐落下衝撃特性に優れた接続端子用ボールおよび接続端子ならびに電子部品 |
| JP5214554B2 (ja) * | 2009-07-30 | 2013-06-19 | ラピスセミコンダクタ株式会社 | 半導体チップ内蔵パッケージ及びその製造方法、並びに、パッケージ・オン・パッケージ型半導体装置及びその製造方法 |
| WO2011064971A1 (ja) * | 2009-11-27 | 2011-06-03 | 住友ベークライト株式会社 | 電子装置の製造方法、電子装置、電子装置パッケージの製造方法、電子装置パッケージ |
-
2011
- 2011-06-20 JP JP2011136474A patent/JP5837339B2/ja active Active
-
2012
- 2012-06-19 US US13/526,821 patent/US8736053B2/en active Active
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