JP2012516650A5 - - Google Patents

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Publication number
JP2012516650A5
JP2012516650A5 JP2011548143A JP2011548143A JP2012516650A5 JP 2012516650 A5 JP2012516650 A5 JP 2012516650A5 JP 2011548143 A JP2011548143 A JP 2011548143A JP 2011548143 A JP2011548143 A JP 2011548143A JP 2012516650 A5 JP2012516650 A5 JP 2012516650A5
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JP
Japan
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gates
clock cycle
gate delays
series connection
clock
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JP2011548143A
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Japanese (ja)
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JP2012516650A (ja
JP5389190B2 (ja
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Priority claimed from US12/361,405 external-priority patent/US7915910B2/en
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JP2011548143A 2009-01-28 2010-01-22 動的な電圧及び周波数管理 Active JP5389190B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/361,405 2009-01-28
US12/361,405 US7915910B2 (en) 2009-01-28 2009-01-28 Dynamic voltage and frequency management
PCT/US2010/021840 WO2010088155A2 (en) 2009-01-28 2010-01-22 Dynamic voltage and frequency management

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2012200727A Division JP5499123B2 (ja) 2009-01-28 2012-09-12 動的な電圧及び周波数管理

Publications (3)

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JP2012516650A JP2012516650A (ja) 2012-07-19
JP2012516650A5 true JP2012516650A5 (enExample) 2013-09-05
JP5389190B2 JP5389190B2 (ja) 2014-01-15

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JP2011548143A Active JP5389190B2 (ja) 2009-01-28 2010-01-22 動的な電圧及び周波数管理
JP2012200727A Active JP5499123B2 (ja) 2009-01-28 2012-09-12 動的な電圧及び周波数管理

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JP2012200727A Active JP5499123B2 (ja) 2009-01-28 2012-09-12 動的な電圧及び周波数管理

Country Status (9)

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US (5) US7915910B2 (enExample)
EP (2) EP2405324B1 (enExample)
JP (2) JP5389190B2 (enExample)
KR (2) KR101335830B1 (enExample)
CN (2) CN102360245B (enExample)
AU (1) AU2010208458B2 (enExample)
BR (2) BR122012027851B1 (enExample)
RU (2) RU2486574C2 (enExample)
WO (1) WO2010088155A2 (enExample)

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