JP2012508900A - チップレット及びハイブリッドドライブを備えるディスプレイデバイス - Google Patents
チップレット及びハイブリッドドライブを備えるディスプレイデバイス Download PDFInfo
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- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
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Abstract
Description
a)基板と、
b)前記基板上に形成される2次元ピクセルアレイであって、該ピクセルは複数のピクセルグループに関連付けられ、該ピクセルグループはそれぞれ少なくとも4つのピクセルを含むと共に別々の1組のグループ行電極及びグループ列電極を含み、該グループ行電極及び該グループ列電極はその対応するピクセルグループ内の前記ピクセルにのみ接続されると共に該ピクセルのみを駆動し、該グループ行電極はそれぞれ2つ以上のピクセルに接続され、該グループ列電極はそれぞれ2つ以上のピクセルに接続され、それにより、単一のグループ行電極は、単一のグループ列電極と共に、単一のピクセルを駆動する、2次元ピクセルアレイと、
c)前記基板上において前記ピクセルアレイ内に配置される2つ以上のチップレットであって、該チップレットはそれぞれ1つのピクセルグループに関連付けられ、関連する前記グループ行電極及び関連する前記グループ列電極のそれぞれへの接続を有すると共に前記ピクセルグループのいずれかの寸法内にあるのと少なくとも同じ数の記憶素子を有し、該記憶素子はピクセルの所望の輝度を表す値を格納し、該チップレットは該値を用いて、その関連するピクセルグループ内の各ピクセルの前記所望のルミナンスを制御する、チップレットと、
を備える、画像デバイスによって満たされる。
10 デバイス基板
20 チップレット
22 チップレットアレイ
30 ピクセル
32 ピクセルグループ
40 行電極
42 列電極
50 制御チップレット
52 バス
60 コントローラ
62 制御バス
70 電極部
72 チップレットコントローラ
80 接続パッド
90 材料層
Claims (20)
- ハイブリッドドライブを有する画像デバイスであって、
a)単一の連続基板と、
b)前記基板上に形成される2次元ピクセルアレイであって、該ピクセルは複数のピクセルグループに関連付けられ、該ピクセルグループはそれぞれ少なくとも4つのピクセルを含むと共に別々の1組のグループ行電極及びグループ列電極を含み、該グループ行電極及び該グループ列電極はその対応するピクセルグループ内の前記ピクセルにのみ接続されると共に該ピクセルのみを駆動し、該グループ行電極はそれぞれ2つ以上のピクセルに接続され、該グループ列電極はそれぞれ2つ以上のピクセルに接続され、それにより、単一のグループ行電極は、単一のグループ列電極と共に、単一のピクセルを駆動する、2次元ピクセルアレイと、
c)前記基板上において前記ピクセルアレイ内に配置される2つ以上のチップレットであって、該チップレットはそれぞれ1つのピクセルグループに関連付けられ、関連する前記グループ行電極及び関連する前記グループ列電極のそれぞれへの接続を有すると共に前記ピクセルグループのいずれかの寸法内にあるのと少なくとも同じ数の記憶素子を有し、該記憶素子はピクセルの所望の輝度を表す値を格納し、該チップレットは該値を用いて、その関連するピクセルグループ内の各ピクセルの前記所望のルミナンスを制御する、チップレットと、
を備える、画像デバイス。 - 各前記チップレットに電気的に接続される1つ又は複数のバスを備える、請求項1に記載の画像デバイス。
- 前記1つ又は複数のバスのうちの少なくとも1つは、少なくとも2つ以上の前記チップレットを通ってシリアルに接続されるシリアルバスである、請求項2に記載の画像デバイス。
- 前記1つ又は複数のバスのうちの少なくとも1つは、前記チップレットに共通に接続されるパラレルバスである、請求項2に記載の画像デバイス。
- 前記パラレルバスは電源又はグランド電気的接続を提供する、請求項4に記載の画像デバイス。
- バスがデータ信号を送信する、請求項2に記載の画像デバイス。
- 前記1つ又は複数のバス接続のうちの少なくとも1つはパラレルバスであり、前記1つ又は複数のバス接続のうちの少なくとも1つはシリアルバスである、請求項2に記載の画像デバイス。
- 前記1つ又は複数のバスのうちの少なくとも1つは、前記チップレットアレイの1つの列内の全ての前記チップレットに接続されるか、又は少なくとも1つのバスは、前記2つ以上のチップレットの1つの行内の全ての前記チップレットに接続される、請求項2に記載の画像デバイス。
- 前記ピクセルグループはそれぞれピクセルの長方形アレイを形成する、請求項1に記載の画像デバイス。
- 前記記憶素子はアナログ記憶素子、電荷を蓄えるキャパシタ、又はデジタル記憶素子である、請求項1に記載の画像デバイス。
- 前記デバイスは非放射ディスプレイデバイスである、請求項1に記載の画像デバイス。
- 前記デバイスは画像取込デバイスである、請求項1に記載の画像デバイス。
- 前記チップレットは同一である、請求項1に記載の画像デバイス。
- 前記チップレットはそれぞれ一意の識別子を有する、請求項1に記載の画像デバイス。
- 各前記チップレットの前記一意の識別子は、前記チップレットが前記基板上に配置された後に設定され、各前記チップレットの前記一意の識別子は、前記2次元チップレットアレイ内の各前記チップレットの相対的な位置に対応する、請求項14に記載の画像デバイス。
- 前記チップレットを駆動するための、前記2つ以上のチップレットの周辺に配置される制御チップレットをさらに備える、請求項1に記載の画像デバイス。
- 各前記チップレットのサイズは、前記チップレットへの接続の数によって決定される、請求項1に記載の画像デバイス。
- 前記デバイスはディスプレイデバイスである、請求項1に記載の画像デバイス。
- 前記デバイスは有機LEDディスプレイデバイス、又は無機LEDディスプレイデバイスである、請求項18に記載の画像デバイス。
- 各前記チップレットは、少なくとも2つのグループ行電極及び2つのグループ列電極に接続される、請求項1に記載の画像デバイス。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/272,043 US8207954B2 (en) | 2008-11-17 | 2008-11-17 | Display device with chiplets and hybrid drive |
US12/272,043 | 2008-11-17 | ||
PCT/US2009/005950 WO2010056289A1 (en) | 2008-11-17 | 2009-11-03 | Display device with chiplets and hybrid drive |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2012508900A true JP2012508900A (ja) | 2012-04-12 |
Family
ID=41466996
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2011536309A Pending JP2012508900A (ja) | 2008-11-17 | 2009-11-03 | チップレット及びハイブリッドドライブを備えるディスプレイデバイス |
Country Status (7)
Country | Link |
---|---|
US (1) | US8207954B2 (ja) |
EP (1) | EP2359403B1 (ja) |
JP (1) | JP2012508900A (ja) |
KR (1) | KR101243357B1 (ja) |
CN (1) | CN102282675B (ja) |
TW (1) | TWI378425B (ja) |
WO (1) | WO2010056289A1 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2018516390A (ja) * | 2015-05-29 | 2018-06-21 | レイヤード オプトエレクトロニック カンパニー リミテッド | データ伝送の制御システム、方法、チップアレイ及びディスプレイ |
JP2021523405A (ja) * | 2018-05-09 | 2021-09-02 | アップル インコーポレイテッドApple Inc. | ローカルパッシブマトリクスディスプレイ |
Families Citing this family (40)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8279145B2 (en) * | 2009-02-17 | 2012-10-02 | Global Oled Technology Llc | Chiplet driver pairs for two-dimensional display |
US8456387B2 (en) * | 2009-02-18 | 2013-06-04 | Global Oled Technology Llc | Display device with chiplet drivers |
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CN102282675A (zh) | 2011-12-14 |
TWI378425B (en) | 2012-12-01 |
CN102282675B (zh) | 2014-03-19 |
KR101243357B1 (ko) | 2013-03-13 |
US8207954B2 (en) | 2012-06-26 |
EP2359403B1 (en) | 2018-09-19 |
WO2010056289A1 (en) | 2010-05-20 |
US20100123694A1 (en) | 2010-05-20 |
EP2359403A1 (en) | 2011-08-24 |
TW201030706A (en) | 2010-08-16 |
KR20110098912A (ko) | 2011-09-02 |
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