JP2012199333A - 基板処理方法 - Google Patents

基板処理方法 Download PDF

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Publication number
JP2012199333A
JP2012199333A JP2011061614A JP2011061614A JP2012199333A JP 2012199333 A JP2012199333 A JP 2012199333A JP 2011061614 A JP2011061614 A JP 2011061614A JP 2011061614 A JP2011061614 A JP 2011061614A JP 2012199333 A JP2012199333 A JP 2012199333A
Authority
JP
Japan
Prior art keywords
film
gas
temperature
substrate
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2011061614A
Other languages
English (en)
Japanese (ja)
Inventor
Junji Hotta
隼史 堀田
Naotaka Noro
尚孝 野呂
Mikio Suzuki
幹夫 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Priority to JP2011061614A priority Critical patent/JP2012199333A/ja
Priority to KR1020120023318A priority patent/KR20120106566A/ko
Priority to TW101109124A priority patent/TW201301397A/zh
Publication of JP2012199333A publication Critical patent/JP2012199333A/ja
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28556Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Chemical & Material Sciences (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Chemical Vapour Deposition (AREA)
JP2011061614A 2011-03-18 2011-03-18 基板処理方法 Withdrawn JP2012199333A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2011061614A JP2012199333A (ja) 2011-03-18 2011-03-18 基板処理方法
KR1020120023318A KR20120106566A (ko) 2011-03-18 2012-03-07 기판 처리 방법
TW101109124A TW201301397A (zh) 2011-03-18 2012-03-16 基板處理方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2011061614A JP2012199333A (ja) 2011-03-18 2011-03-18 基板処理方法

Publications (1)

Publication Number Publication Date
JP2012199333A true JP2012199333A (ja) 2012-10-18

Family

ID=47113228

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011061614A Withdrawn JP2012199333A (ja) 2011-03-18 2011-03-18 基板処理方法

Country Status (3)

Country Link
JP (1) JP2012199333A (zh)
KR (1) KR20120106566A (zh)
TW (1) TW201301397A (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019064435A1 (ja) * 2017-09-28 2019-04-04 株式会社Kokusai Electric 半導体装置の製造方法、基板処理装置およびプログラム

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019064435A1 (ja) * 2017-09-28 2019-04-04 株式会社Kokusai Electric 半導体装置の製造方法、基板処理装置およびプログラム
KR20200035148A (ko) * 2017-09-28 2020-04-01 가부시키가이샤 코쿠사이 엘렉트릭 반도체 장치의 제조 방법, 기판 처리 장치 및 프로그램
JPWO2019064435A1 (ja) * 2017-09-28 2020-05-28 株式会社Kokusai Electric 半導体装置の製造方法、基板処理装置およびプログラム
KR102392389B1 (ko) 2017-09-28 2022-05-02 가부시키가이샤 코쿠사이 엘렉트릭 반도체 장치의 제조 방법, 기판 처리 방법, 기판 처리 장치 및 프로그램
US11562905B2 (en) 2017-09-28 2023-01-24 Kokusai Electric Corporation Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium

Also Published As

Publication number Publication date
KR20120106566A (ko) 2012-09-26
TW201301397A (zh) 2013-01-01

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Legal Events

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A300 Withdrawal of application because of no request for examination

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 20140603