JP2012038921A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP2012038921A JP2012038921A JP2010177744A JP2010177744A JP2012038921A JP 2012038921 A JP2012038921 A JP 2012038921A JP 2010177744 A JP2010177744 A JP 2010177744A JP 2010177744 A JP2010177744 A JP 2010177744A JP 2012038921 A JP2012038921 A JP 2012038921A
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- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
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- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
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- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
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- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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Abstract
【解決手段】半導体装置においては、ICチップ2が、接着層3によりフレキシブルプリント配線板1に実装されており、フレキシブルプリント配線板1とICチップ2とは、接続パッド5を介して接続配線4を通じて相互に電気的に接続されている。接着層3は、ICチップ2の中央領域にのみ設けられている。言い換えれば、ICチップ2は、その中央領域のみで接着層3を介してフレキシブルプリント配線板1に固定されている。
【選択図】図1
Description
この耐屈曲性を実現するには、2つのアプローチがある。
しかしながら、ICチップ等の実装部品については、主にシリコンや化合物半導体などの硬い材料が使用されているため、フレキシブルプリント配線板のように高屈曲性を有することは困難である。
請求項2に記載の半導体装置は、請求項1において、前記接着層は、樹脂からなることを要旨とする。
請求項3に記載の半導体装置は、請求項1において、前記プリント配線板と前記接着層の間、及び、前記半導体チップと前記接着層の間、の少なくとも一方にポスト層を更に備えたことを要旨とする。
請求項4に記載の半導体装置は、請求項3において、前記ポスト層は、銅、銀、金、タングステン、クロム、ニッケル、アルミニウム、又はそれらの合金から形成されると共に、前記半導体チップと前記接着層の間に配されていることを要旨とする。
請求項5に記載の半導体装置は、請求項1において、前記接着層は、前記プリント基板の屈曲面において、その接線方向と垂直な方向について連続的に延設される複数本の接着層であることを要旨とする。
請求項2に記載の半導体装置によれば、請求項1に記載の半導体装置の効果に加えて、プリント配線板の屈曲による応力を有効に緩和できる。
請求項3に記載の半導体装置によれば、請求項1に記載の半導体装置の効果に加えて、プリント配線板と半導体チップの距離が長くなるので、プリント配線板が半導体チップ側に屈曲しても半導体チップに衝突することがない。つまり、プリント配線板の上側・下側双方への十分な屈曲が可能となる。
請求項4に記載の半導体装置によれば、請求項3に記載の半導体装置の効果に加えて、半導体チップで発生した熱をプリント配線板側に効率よく逃がすという良好な放熱性の効果が得られる。
請求項5に記載の半導体装置によれば、請求項1に記載の半導体装置の効果に加えて、プリント配線板の屈曲による応力を調整できると共に、半導体チップの傾き防止の効果を更に向上させることができる。
つまり、上記の効果を達成するため、本発明の半導体装置を構成する接着層3は、プリント配線板1の一方の面[図1(c)において上面]と半導体チップ(ICチップ)2の他方の面[図1(c)において下面]との間で、かつ、半導体チップ2の中央領域に配されている。また、接着層3は、プリント配線板1の屈曲した面[図1(c)において上面]において、その接線方向と垂直をなす方向[図1(c)において紙面に垂直な方向]に延設される。図1(c)では、球状をなす一個の接着層3が設けられた場合を表しているが、接線方向と垂直をなす方向に、複数個の接着層3を設ける構成としても、上述した本発明の効果は得られる。
第一実施形態の半導体装置と異なる点は、フレキシブルプリント配線板1と接着層3との間にポスト層6が設けられている点である。これ以外は第一実施形態と同様である。
ポスト層6を設けることにより、フレキシブルプリント配線板1とICチップ2の距離が長くなるので、図3(a)に示すように、フレキシブルプリント配線板1がICチップ2側に屈曲してもICチップ2に衝突することがない。すなわち、フレキシブルプリント配線板1の上側・下側双方への屈曲を可能としている。
なお、この変形例においても、接着層3は、ポスト層6の両面に設けてもよい。
ICチップ2の上面を二次元平面に便宜上対応させた上で、同図に示すように、フレキシブルプリント配線板1の屈曲の方向が、当該二次元平面について一方向のみの場合は、第一および第二実施形態のように、接着層3をICチップ2の中央領域のみに設ける必要はない。すなわち、屈曲したフレキシブルプリント配線板1の屈曲面において、その接線方向に垂直な軸(これを便宜上「屈曲軸」と称する)と同方向に、つまり平行に、長手方向を有するような縦長状の接着層3とすることができる。これにより、ICチップ2とフレキシブルプリント配線板1の間の接続強度を最大にしつつ、フレキシブルプリント配線板1の十分な屈曲性を実現できる。また、ICチップ2の実装時に位置ずれが発生した際に、ICチップ2が傾くことを防止することができる。
Claims (5)
- プリント配線板と、
前記プリント配線板の一方の面に実装される半導体チップと、
前記プリント配線板の一方の面に配された第一接続パッドと、
前記半導体チップの一方の面に配された第二接続パッドと、
前記第一接続パッドと前記第二接続パッドとを電気的に接続する配線と、
前記プリント配線板の一方の面と前記半導体チップの他方の面との間で、かつ、該半導体チップの中央領域に配され、前記プリント配線板の屈曲した面において、その接線方向と垂直をなす方向に延設される、前記半導体チップを前記プリント配線板に実装するための1以上の接着層と、
を備えたことを特徴とする半導体装置。 - 前記接着層は、樹脂からなることを特徴とする請求項1に記載の半導体装置。
- 前記プリント配線板と前記接着層の間、及び、前記半導体チップと前記接着層の間、の少なくとも一方にポスト層を更に備えたことを特徴とする請求項1に記載の半導体装置。
- 前記ポスト層は、銅、銀、金、タングステン、クロム、ニッケル、アルミニウム、又はそれらの合金から形成されると共に、前記半導体チップと前記接着層の間に配されていることを特徴とする請求項3に記載の半導体装置。
- 前記接着層は、前記プリント基板の屈曲面において、その接線方向と垂直な方向について連続的に延設される複数本の接着層であることを特徴とする請求項1に記載の半導体装置。
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JP2010177744A JP5629524B2 (ja) | 2010-08-06 | 2010-08-06 | 半導体装置 |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP3001783A4 (en) * | 2013-05-20 | 2017-01-11 | Meiko Electronics Co., Ltd. | Component-embedded substrate and manufacturing method for same |
JP2017028271A (ja) * | 2015-07-23 | 2017-02-02 | アナログ・デバイシズ・インコーポレーテッド | 積層ダイのための応力隔離特徴 |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0515129A (ja) * | 1991-07-03 | 1993-01-22 | Sanyo Electric Co Ltd | 電動機の分相起動装置 |
JPH0518030U (ja) * | 1991-08-15 | 1993-03-05 | 山武ハネウエル株式会社 | 半導体ベアーチツプ等の部品搭載面の構造 |
JPH05109786A (ja) * | 1991-10-18 | 1993-04-30 | Fujitsu Ltd | 半導体チツプの実装構造 |
JPH05275486A (ja) * | 1991-03-20 | 1993-10-22 | Nippon Steel Corp | 半導体装置の実装方法 |
JPH0846086A (ja) * | 1994-08-03 | 1996-02-16 | Ibiden Co Ltd | ベアチップの搭載構造及び放熱板 |
JP2002208602A (ja) * | 2001-01-12 | 2002-07-26 | Matsushita Electric Ind Co Ltd | 半導体パッケージおよびその製造方法 |
JP2007208211A (ja) * | 2006-02-06 | 2007-08-16 | Fujitsu Ltd | 半導体装置 |
JP2011077108A (ja) * | 2009-09-29 | 2011-04-14 | Elpida Memory Inc | 半導体装置 |
-
2010
- 2010-08-06 JP JP2010177744A patent/JP5629524B2/ja active Active
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05275486A (ja) * | 1991-03-20 | 1993-10-22 | Nippon Steel Corp | 半導体装置の実装方法 |
JPH0515129A (ja) * | 1991-07-03 | 1993-01-22 | Sanyo Electric Co Ltd | 電動機の分相起動装置 |
JPH0518030U (ja) * | 1991-08-15 | 1993-03-05 | 山武ハネウエル株式会社 | 半導体ベアーチツプ等の部品搭載面の構造 |
JPH05109786A (ja) * | 1991-10-18 | 1993-04-30 | Fujitsu Ltd | 半導体チツプの実装構造 |
JPH0846086A (ja) * | 1994-08-03 | 1996-02-16 | Ibiden Co Ltd | ベアチップの搭載構造及び放熱板 |
JP2002208602A (ja) * | 2001-01-12 | 2002-07-26 | Matsushita Electric Ind Co Ltd | 半導体パッケージおよびその製造方法 |
JP2007208211A (ja) * | 2006-02-06 | 2007-08-16 | Fujitsu Ltd | 半導体装置 |
JP2011077108A (ja) * | 2009-09-29 | 2011-04-14 | Elpida Memory Inc | 半導体装置 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP3001783A4 (en) * | 2013-05-20 | 2017-01-11 | Meiko Electronics Co., Ltd. | Component-embedded substrate and manufacturing method for same |
JP2017028271A (ja) * | 2015-07-23 | 2017-02-02 | アナログ・デバイシズ・インコーポレーテッド | 積層ダイのための応力隔離特徴 |
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