JP2011530736A5 - - Google Patents

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Publication number
JP2011530736A5
JP2011530736A5 JP2011522055A JP2011522055A JP2011530736A5 JP 2011530736 A5 JP2011530736 A5 JP 2011530736A5 JP 2011522055 A JP2011522055 A JP 2011522055A JP 2011522055 A JP2011522055 A JP 2011522055A JP 2011530736 A5 JP2011530736 A5 JP 2011530736A5
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JP
Japan
Prior art keywords
memory
group
coupled
source
cubes
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JP2011522055A
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English (en)
Japanese (ja)
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JP5666445B2 (ja
JP2011530736A (ja
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Priority claimed from US12/186,357 external-priority patent/US8656082B2/en
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Publication of JP2011530736A publication Critical patent/JP2011530736A/ja
Publication of JP2011530736A5 publication Critical patent/JP2011530736A5/ja
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Publication of JP5666445B2 publication Critical patent/JP5666445B2/ja
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JP2011522055A 2008-08-05 2009-08-04 フレキシブルで拡張可能なメモリアーキテクチャ Active JP5666445B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/186,357 US8656082B2 (en) 2008-08-05 2008-08-05 Flexible and expandable memory architectures
US12/186,357 2008-08-05
PCT/US2009/004461 WO2010016889A2 (en) 2008-08-05 2009-08-04 Flexible and expandable memory architectures

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2014182063A Division JP5820038B2 (ja) 2008-08-05 2014-09-08 フレキシブルで拡張可能なメモリアーキテクチャ

Publications (3)

Publication Number Publication Date
JP2011530736A JP2011530736A (ja) 2011-12-22
JP2011530736A5 true JP2011530736A5 (enExample) 2012-05-31
JP5666445B2 JP5666445B2 (ja) 2015-02-12

Family

ID=41653955

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2011522055A Active JP5666445B2 (ja) 2008-08-05 2009-08-04 フレキシブルで拡張可能なメモリアーキテクチャ
JP2014182063A Active JP5820038B2 (ja) 2008-08-05 2014-09-08 フレキシブルで拡張可能なメモリアーキテクチャ

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2014182063A Active JP5820038B2 (ja) 2008-08-05 2014-09-08 フレキシブルで拡張可能なメモリアーキテクチャ

Country Status (7)

Country Link
US (2) US8656082B2 (enExample)
EP (1) EP2310943B1 (enExample)
JP (2) JP5666445B2 (enExample)
KR (2) KR101584391B1 (enExample)
CN (2) CN102144223B (enExample)
TW (2) TWI482171B (enExample)
WO (1) WO2010016889A2 (enExample)

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US20130019053A1 (en) * 2011-07-14 2013-01-17 Vinay Ashok Somanache Flash controller hardware architecture for flash devices
US8996822B2 (en) * 2011-07-29 2015-03-31 Micron Technology, Inc. Multi-device memory serial architecture
US9003160B2 (en) 2012-08-03 2015-04-07 International Business Machines Corporation Active buffered memory
US9569211B2 (en) * 2012-08-03 2017-02-14 International Business Machines Corporation Predication in a vector processor
US9575755B2 (en) 2012-08-03 2017-02-21 International Business Machines Corporation Vector processing in an active memory device
US9632777B2 (en) 2012-08-03 2017-04-25 International Business Machines Corporation Gather/scatter of multiple data elements with packed loading/storing into/from a register file entry
US9594724B2 (en) 2012-08-09 2017-03-14 International Business Machines Corporation Vector register file
US9298395B2 (en) 2012-10-22 2016-03-29 Globalfoundries Inc. Memory system connector
US8972782B2 (en) 2012-11-09 2015-03-03 International Business Machines Corporation Exposed-pipeline processing element with rollback
JP5985403B2 (ja) 2013-01-10 2016-09-06 株式会社東芝 ストレージ装置
US9244684B2 (en) 2013-03-15 2016-01-26 Intel Corporation Limited range vector memory access instructions, processors, methods, and systems
US9236564B2 (en) 2013-12-11 2016-01-12 Samsung Electronics Co., Ltd. Method and system for providing an engineered magnetic layer including Heusler layers and an amorphous insertion layer
US9880971B2 (en) 2013-12-20 2018-01-30 Rambus Inc. Memory appliance for accessing memory
US9558143B2 (en) * 2014-05-09 2017-01-31 Micron Technology, Inc. Interconnect systems and methods using hybrid memory cube links to send packetized data over different endpoints of a data handling device

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US5396606A (en) * 1991-07-31 1995-03-07 Franklin Electronic Publishers, Incorporated Address bus switching between sequential and non-sequential ROM searches
DE69530292T2 (de) * 1994-04-13 2003-12-04 Ericsson Inc., Research Triangle Park Effiziente adressierung von grossen speichern
US6038630A (en) * 1998-03-24 2000-03-14 International Business Machines Corporation Shared access control device for integrated system with multiple functional units accessing external structures over multiple data buses
CN1205477A (zh) * 1998-07-16 1999-01-20 英业达股份有限公司 存储器替代方法及其装置
US6633947B1 (en) * 1998-09-16 2003-10-14 Intel Corporation Memory expansion channel for propagation of control and request packets
JP4483168B2 (ja) * 2002-10-23 2010-06-16 株式会社日立製作所 ディスクアレイ制御装置
US7870218B2 (en) * 2003-04-09 2011-01-11 Nec Laboratories America, Inc. Peer-to-peer system and method with improved utilization
US7788451B2 (en) * 2004-02-05 2010-08-31 Micron Technology, Inc. Apparatus and method for data bypass for a bi-directional data bus in a hub-based memory sub-system
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