JP2011521475A5 - - Google Patents
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- JP2011521475A5 JP2011521475A5 JP2011510665A JP2011510665A JP2011521475A5 JP 2011521475 A5 JP2011521475 A5 JP 2011521475A5 JP 2011510665 A JP2011510665 A JP 2011510665A JP 2011510665 A JP2011510665 A JP 2011510665A JP 2011521475 A5 JP2011521475 A5 JP 2011521475A5
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- 238000000034 method Methods 0.000 claims 32
- 239000011159 matrix material Substances 0.000 claims 9
- 239000000758 substrate Substances 0.000 claims 4
- 238000000206 photolithography Methods 0.000 claims 3
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US5489708P | 2008-05-21 | 2008-05-21 | |
| US61/054,897 | 2008-05-21 | ||
| PCT/US2009/044594 WO2009143200A2 (en) | 2008-05-21 | 2009-05-20 | Substrate matrix to decouple tool and process effects |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2015105955A Division JP2015180953A (ja) | 2008-05-21 | 2015-05-26 | ツール及びプロセスの効果を分離する基板マトリクス |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2011521475A JP2011521475A (ja) | 2011-07-21 |
| JP2011521475A5 true JP2011521475A5 (enExample) | 2011-12-08 |
Family
ID=41340835
Family Applications (3)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2011510665A Pending JP2011521475A (ja) | 2008-05-21 | 2009-05-20 | ツール及びプロセスの効果を分離する基板マトリクス |
| JP2015105955A Pending JP2015180953A (ja) | 2008-05-21 | 2015-05-26 | ツール及びプロセスの効果を分離する基板マトリクス |
| JP2017115541A Pending JP2017201402A (ja) | 2008-05-21 | 2017-06-13 | ツール及びプロセスの効果を分離する基板マトリクス |
Family Applications After (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2015105955A Pending JP2015180953A (ja) | 2008-05-21 | 2015-05-26 | ツール及びプロセスの効果を分離する基板マトリクス |
| JP2017115541A Pending JP2017201402A (ja) | 2008-05-21 | 2017-06-13 | ツール及びプロセスの効果を分離する基板マトリクス |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US8142966B2 (enExample) |
| EP (1) | EP2286447A2 (enExample) |
| JP (3) | JP2011521475A (enExample) |
| KR (1) | KR101504504B1 (enExample) |
| CN (1) | CN102037550B (enExample) |
| IL (1) | IL208576A (enExample) |
| WO (1) | WO2009143200A2 (enExample) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9588439B1 (en) * | 2010-12-21 | 2017-03-07 | Asml Netherlands B.V. | Information matrix creation and calibration test pattern selection based on computational lithography model parameters |
| CN105892238B (zh) * | 2011-08-31 | 2018-04-13 | Asml荷兰有限公司 | 确定聚焦位置修正的方法、光刻处理元和器件制造方法 |
| JP6122290B2 (ja) | 2011-12-22 | 2017-04-26 | 三星電子株式会社Samsung Electronics Co.,Ltd. | 再配線層を有する半導体パッケージ |
| US9875946B2 (en) | 2013-04-19 | 2018-01-23 | Kla-Tencor Corporation | On-device metrology |
| WO2015049087A1 (en) | 2013-10-02 | 2015-04-09 | Asml Netherlands B.V. | Methods & apparatus for obtaining diagnostic information relating to an industrial process |
| US9490182B2 (en) | 2013-12-23 | 2016-11-08 | Kla-Tencor Corporation | Measurement of multiple patterning parameters |
| WO2016162231A1 (en) * | 2015-04-10 | 2016-10-13 | Asml Netherlands B.V. | Method and apparatus for inspection and metrology |
| US10504759B2 (en) | 2016-04-04 | 2019-12-10 | Kla-Tencor Corporation | Semiconductor metrology with information from multiple processing steps |
| US9940705B2 (en) * | 2016-05-04 | 2018-04-10 | Kla-Tencor Corporation | System, method and computer program product for detecting defects in a fabricated target component using consistent modulation for the target and reference components |
| JP6924261B2 (ja) | 2016-10-20 | 2021-08-25 | ケーエルエー コーポレイション | パターニングされたウェハの特性評価のためのハイブリッド計量 |
| JP6779173B2 (ja) * | 2017-05-18 | 2020-11-04 | 株式会社荏原製作所 | 基板処理装置、プログラムを記録した記録媒体 |
| JP7281547B2 (ja) * | 2018-12-31 | 2023-05-25 | エーエスエムエル ネザーランズ ビー.ブイ. | プロセス制御のためのインダイメトロロジ方法及びシステム |
Family Cites Families (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03265121A (ja) * | 1990-03-15 | 1991-11-26 | Fujitsu Ltd | 半導体装置の製造方法 |
| JPH04282820A (ja) * | 1991-03-11 | 1992-10-07 | Nippon Telegr & Teleph Corp <Ntt> | パタン形成方法 |
| JP3109631B2 (ja) | 1992-12-14 | 2000-11-20 | 沖電気工業株式会社 | ホトリソグラフィーのパターン検証方法 |
| EP1205806A1 (en) * | 2000-11-09 | 2002-05-15 | Semiconductor300 GmbH & Co KG | Method for exposing a semiconductor wafer |
| US6625497B2 (en) * | 2000-11-20 | 2003-09-23 | Applied Materials Inc. | Semiconductor processing module with integrated feedback/feed forward metrology |
| JP4158384B2 (ja) * | 2001-07-19 | 2008-10-01 | 株式会社日立製作所 | 半導体デバイスの製造工程監視方法及びそのシステム |
| JP4288694B2 (ja) * | 2001-12-20 | 2009-07-01 | 株式会社ニコン | 基板保持装置、露光装置及びデバイス製造方法 |
| JP2004072000A (ja) * | 2002-08-09 | 2004-03-04 | Matsushita Electric Ind Co Ltd | 加熱装置 |
| US6915177B2 (en) * | 2002-09-30 | 2005-07-05 | Advanced Micro Devices, Inc. | Comprehensive integrated lithographic process control system based on product design and yield feedback system |
| JP2007528114A (ja) * | 2003-04-29 | 2007-10-04 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | ウェハ上のリソグラフィ効果を特性化するシステム及び方法 |
| EP1507172A1 (en) * | 2003-08-12 | 2005-02-16 | ASML Netherlands B.V. | Lithographic apparatus and apparatus adjustment method |
| JP2005228978A (ja) * | 2004-02-13 | 2005-08-25 | Canon Inc | 露光装置及び半導体デバイスの製造方法 |
| US20050185174A1 (en) * | 2004-02-23 | 2005-08-25 | Asml Netherlands B.V. | Method to determine the value of process parameters based on scatterometry data |
| JP4361830B2 (ja) * | 2004-05-13 | 2009-11-11 | 信越化学工業株式会社 | レジストパターン寸法の面内分布の評価方法、フォトマスクブランクの製造方法、フォトマスクブランク、及びレジストパターン形成工程の管理方法 |
| JP4527652B2 (ja) * | 2004-11-16 | 2010-08-18 | 東京エレクトロン株式会社 | 露光条件設定方法、基板処理装置およびコンピュータプログラム |
| KR20060055863A (ko) | 2004-11-19 | 2006-05-24 | 삼성전자주식회사 | 반도체 집적회로 칩의 구리 패드 구조와 형성 방법 및이를 이용한 적층 패키지 |
| US7239368B2 (en) * | 2004-11-29 | 2007-07-03 | Asml Netherlands B.V. | Using unflatness information of the substrate table or mask table for decreasing overlay |
| US7381634B2 (en) * | 2005-04-13 | 2008-06-03 | Stats Chippac Ltd. | Integrated circuit system for bonding |
| KR100958714B1 (ko) * | 2005-08-08 | 2010-05-18 | 브라이언 테크놀로지스, 인코포레이티드 | 리소그래피 공정의 포커스-노광 모델을 생성하는 시스템 및방법 |
| US7566650B2 (en) * | 2005-09-23 | 2009-07-28 | Stats Chippac Ltd. | Integrated circuit solder bumping system |
| US7596420B2 (en) * | 2006-06-19 | 2009-09-29 | Asml Netherlands B.V. | Device manufacturing method and computer program product |
| US7916284B2 (en) * | 2006-07-18 | 2011-03-29 | Asml Netherlands B.V. | Inspection method and apparatus, lithographic apparatus, lithographic processing cell and device manufacturing method |
| DE102006034679A1 (de) * | 2006-07-24 | 2008-01-31 | Infineon Technologies Ag | Halbleitermodul mit Leistungshalbleiterchip und passiven Bauelement sowie Verfahren zur Herstellung desselben |
-
2009
- 2009-05-20 US US12/990,183 patent/US8142966B2/en active Active
- 2009-05-20 CN CN2009801185750A patent/CN102037550B/zh active Active
- 2009-05-20 JP JP2011510665A patent/JP2011521475A/ja active Pending
- 2009-05-20 WO PCT/US2009/044594 patent/WO2009143200A2/en not_active Ceased
- 2009-05-20 KR KR1020107028740A patent/KR101504504B1/ko active Active
- 2009-05-20 EP EP09751428A patent/EP2286447A2/en active Pending
-
2010
- 2010-10-07 IL IL208576A patent/IL208576A/en active IP Right Grant
-
2015
- 2015-05-26 JP JP2015105955A patent/JP2015180953A/ja active Pending
-
2017
- 2017-06-13 JP JP2017115541A patent/JP2017201402A/ja active Pending
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