JP2011511395A5 - - Google Patents

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Publication number
JP2011511395A5
JP2011511395A5 JP2010544941A JP2010544941A JP2011511395A5 JP 2011511395 A5 JP2011511395 A5 JP 2011511395A5 JP 2010544941 A JP2010544941 A JP 2010544941A JP 2010544941 A JP2010544941 A JP 2010544941A JP 2011511395 A5 JP2011511395 A5 JP 2011511395A5
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JP
Japan
Prior art keywords
circuit
voltage level
given
weak
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2010544941A
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English (en)
Japanese (ja)
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JP2011511395A (ja
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Publication date
Application filed filed Critical
Priority claimed from PCT/US2008/052454 external-priority patent/WO2009096957A1/en
Publication of JP2011511395A publication Critical patent/JP2011511395A/ja
Publication of JP2011511395A5 publication Critical patent/JP2011511395A5/ja
Pending legal-status Critical Current

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JP2010544941A 2008-01-30 2008-01-30 電子回路において歩留りを向上させるための方法及び装置 Pending JP2011511395A (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US2008/052454 WO2009096957A1 (en) 2008-01-30 2008-01-30 Method and apparatus for increasing yeild in an electronic circuit

Publications (2)

Publication Number Publication Date
JP2011511395A JP2011511395A (ja) 2011-04-07
JP2011511395A5 true JP2011511395A5 (enExample) 2011-05-19

Family

ID=39705034

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2010544941A Pending JP2011511395A (ja) 2008-01-30 2008-01-30 電子回路において歩留りを向上させるための方法及び装置

Country Status (7)

Country Link
US (1) US7940594B2 (enExample)
EP (1) EP2240936A1 (enExample)
JP (1) JP2011511395A (enExample)
KR (1) KR20100121475A (enExample)
CN (1) CN101874272B (enExample)
TW (1) TWI479500B (enExample)
WO (1) WO2009096957A1 (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2240936A1 (en) 2008-01-30 2010-10-20 Agere Systems, Inc. Method and apparatus for increasing yeild in an electronic circuit
CN101682325B (zh) * 2008-02-27 2013-06-05 松下电器产业株式会社 半导体集成电路以及包括该半导体集成电路的各种装置
DE202009007395U1 (de) * 2009-05-19 2009-08-20 Balluff Gmbh Stromversorgungs-Anschlussvorrichtung für ein parametrierbares elektrisches Gerät
CN102468650B (zh) 2010-11-18 2015-07-08 英业达股份有限公司 多电源供电装置
TWI492471B (zh) * 2010-12-20 2015-07-11 英業達股份有限公司 多電源供電裝置
US9786385B2 (en) * 2015-03-02 2017-10-10 Oracle International Corporation Memory power selection using local voltage regulators
US10664035B2 (en) * 2017-08-31 2020-05-26 Qualcomm Incorporated Reconfigurable power delivery networks

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10214122A (ja) * 1996-11-27 1998-08-11 Yamaha Corp 降圧回路および集積回路
JPH10261946A (ja) 1997-03-19 1998-09-29 Mitsubishi Electric Corp 半導体集積回路
JP2003132683A (ja) 2001-10-23 2003-05-09 Hitachi Ltd 半導体装置
US20030076729A1 (en) * 2001-10-24 2003-04-24 Fetzer Eric S. Method and apparatus for reducing average power and increasing cache performance by modulating power supplies
KR100488544B1 (ko) * 2002-11-11 2005-05-11 삼성전자주식회사 반도체 메모리장치의 블록선택정보를 이용한 뱅크전압제어장치 및 그 제어방법
US7456525B2 (en) * 2004-07-09 2008-11-25 Honeywell International Inc. Multi-output power supply device for power sequencing
JP2006228277A (ja) * 2005-02-15 2006-08-31 Matsushita Electric Ind Co Ltd 半導体記憶装置
US7236396B2 (en) * 2005-06-30 2007-06-26 Texas Instruments Incorporated Area efficient implementation of small blocks in an SRAM array
ITVA20060081A1 (it) * 2006-12-22 2008-06-23 St Microelectronics Srl Riduzione del consumo da parte di un sistema elettronico integrato comprendente distinte risorse statiche ad accesso casuale di memorizzazione dati
JP2008251603A (ja) * 2007-03-29 2008-10-16 Toshiba Corp 半導体集積回路
EP2240936A1 (en) 2008-01-30 2010-10-20 Agere Systems, Inc. Method and apparatus for increasing yeild in an electronic circuit

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