JP2011228650A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2011228650A5 JP2011228650A5 JP2011065142A JP2011065142A JP2011228650A5 JP 2011228650 A5 JP2011228650 A5 JP 2011228650A5 JP 2011065142 A JP2011065142 A JP 2011065142A JP 2011065142 A JP2011065142 A JP 2011065142A JP 2011228650 A5 JP2011228650 A5 JP 2011228650A5
- Authority
- JP
- Japan
- Prior art keywords
- single crystal
- semiconductor substrate
- crystal semiconductor
- irradiation angle
- insulating layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 239000004065 semiconductor Substances 0.000 claims 28
- 239000000758 substrate Substances 0.000 claims 27
- 239000013078 crystal Substances 0.000 claims 22
- GPRLSGONYQIRFK-UHFFFAOYSA-N hydron Chemical compound [H+] GPRLSGONYQIRFK-UHFFFAOYSA-N 0.000 claims 6
- 238000004519 manufacturing process Methods 0.000 claims 5
- 238000000034 method Methods 0.000 claims 5
- 238000010438 heat treatment Methods 0.000 claims 2
- 238000004140 cleaning Methods 0.000 claims 1
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011065142A JP2011228650A (ja) | 2010-03-31 | 2011-03-24 | 半導体基板の作製方法及び半導体装置の作製方法 |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2010083832 | 2010-03-31 | ||
| JP2010083832 | 2010-03-31 | ||
| JP2011065142A JP2011228650A (ja) | 2010-03-31 | 2011-03-24 | 半導体基板の作製方法及び半導体装置の作製方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2011228650A JP2011228650A (ja) | 2011-11-10 |
| JP2011228650A5 true JP2011228650A5 (https=) | 2014-03-13 |
Family
ID=44710147
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2011065142A Withdrawn JP2011228650A (ja) | 2010-03-31 | 2011-03-24 | 半導体基板の作製方法及び半導体装置の作製方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US8445358B2 (https=) |
| JP (1) | JP2011228650A (https=) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5927894B2 (ja) * | 2011-12-15 | 2016-06-01 | 信越半導体株式会社 | Ｓｏｉウェーハの製造方法 |
| FR2988516B1 (fr) * | 2012-03-23 | 2014-03-07 | Soitec Silicon On Insulator | Procede d'implantation de fragilisation de substrats ameliore |
| JP5910352B2 (ja) * | 2012-06-28 | 2016-04-27 | 信越半導体株式会社 | 貼り合わせウェーハの製造方法 |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2610264B2 (ja) * | 1986-06-10 | 1997-05-14 | 株式会社東芝 | 半導体装置の製造方法 |
| US5358879A (en) | 1993-04-30 | 1994-10-25 | Loral Federal Systems Company | Method of making gate overlapped lightly doped drain for buried channel devices |
| US6773971B1 (en) | 1994-07-14 | 2004-08-10 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing a semiconductor device having lightly-doped drain (LDD) regions |
| KR0132490B1 (ko) | 1994-07-21 | 1998-04-16 | 문정환 | 박막트랜지스터 제조방법 |
| JPH09260301A (ja) * | 1996-03-26 | 1997-10-03 | Sony Corp | イオン注入方法 |
| FR2748851B1 (fr) * | 1996-05-15 | 1998-08-07 | Commissariat Energie Atomique | Procede de realisation d'une couche mince de materiau semiconducteur |
| JP2000124092A (ja) | 1998-10-16 | 2000-04-28 | Shin Etsu Handotai Co Ltd | 水素イオン注入剥離法によってｓｏｉウエーハを製造する方法およびこの方法で製造されたｓｏｉウエーハ |
| JP2000294515A (ja) | 1999-04-09 | 2000-10-20 | Seiko Epson Corp | イオン注入装置及びイオン注入方法 |
| WO2001093334A1 (en) * | 2000-05-30 | 2001-12-06 | Shin-Etsu Handotai Co.,Ltd. | Method for producing bonded wafer and bonded wafer |
| US7365361B2 (en) | 2003-07-23 | 2008-04-29 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing the same |
-
2011
- 2011-03-24 US US13/070,513 patent/US8445358B2/en not_active Expired - Fee Related
- 2011-03-24 JP JP2011065142A patent/JP2011228650A/ja not_active Withdrawn
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2013102154A5 (ja) | 半導体装置の作製方法 | |
| JP2014212305A5 (ja) | 半導体装置の作製方法 | |
| JP2009260295A5 (ja) | 半導体基板の作製方法 | |
| JP2016066792A5 (https=) | ||
| JP2009111375A5 (https=) | ||
| JP2011258939A5 (https=) | ||
| JP2016046530A5 (ja) | 半導体装置の作製方法 | |
| JP2013070070A5 (ja) | 半導体装置及びその作製方法 | |
| JP2009135464A5 (https=) | ||
| JP2009135473A5 (https=) | ||
| JP2009177145A5 (https=) | ||
| JP2013153160A5 (ja) | 半導体装置の作製方法 | |
| JP2012054540A5 (ja) | Ｓｏｉ基板の作製方法 | |
| JP2013153156A5 (https=) | ||
| JP2011100984A5 (https=) | ||
| JP2014237545A5 (https=) | ||
| WO2011094302A3 (en) | Process for reconditioning semiconductor surface to facilitate bonding | |
| JP2013038404A5 (https=) | ||
| JP2015073092A5 (ja) | 半導体装置の作製方法 | |
| JP2009260314A5 (https=) | ||
| JP2011040729A5 (ja) | 半導体基板の作製方法 | |
| JP2011077505A5 (ja) | Ｓｏｉ基板の作製方法 | |
| JP2010103510A5 (ja) | 半導体装置の作製方法及び半導体装置 | |
| JP2011228680A5 (ja) | Ｓｏｉ基板の作製方法、および半導体基板の作製方法 | |
| JP2012119669A5 (https=) |