JP2011159853A - 半導体装置およびその製造方法 - Google Patents
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 83
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 17
- 238000009792 diffusion process Methods 0.000 claims abstract description 134
- 230000001629 suppression Effects 0.000 claims abstract description 92
- 239000012535 impurity Substances 0.000 claims abstract description 81
- 239000000758 substrate Substances 0.000 claims abstract description 36
- 239000013078 crystal Substances 0.000 claims description 31
- 238000009826 distribution Methods 0.000 claims description 8
- 229910052799 carbon Inorganic materials 0.000 claims description 3
- 230000000694 effects Effects 0.000 abstract description 15
- 230000003071 parasitic effect Effects 0.000 abstract description 11
- 238000000034 method Methods 0.000 description 20
- 125000006850 spacer group Chemical group 0.000 description 19
- 229910004298 SiO 2 Inorganic materials 0.000 description 9
- 238000000137 annealing Methods 0.000 description 8
- 230000007423 decrease Effects 0.000 description 8
- 238000005468 ion implantation Methods 0.000 description 8
- 238000002955 isolation Methods 0.000 description 8
- 230000000052 comparative effect Effects 0.000 description 7
- 238000001020 plasma etching Methods 0.000 description 6
- 230000008569 process Effects 0.000 description 6
- 238000005530 etching Methods 0.000 description 5
- 230000003213 activating effect Effects 0.000 description 4
- 229910052796 boron Inorganic materials 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 238000002513 implantation Methods 0.000 description 4
- 239000011810 insulating material Substances 0.000 description 3
- 238000002109 crystal growth method Methods 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- 238000011065 in-situ storage Methods 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 238000004088 simulation Methods 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 229910004541 SiN Inorganic materials 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000005192 partition Methods 0.000 description 1
- 238000005036 potential barrier Methods 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000000638 solvent extraction Methods 0.000 description 1
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Abstract
【解決手段】本発明の一態様に係る半導体装置100は、半導体基板2上にゲート絶縁膜11を介して形成されたゲート電極12と、半導体基板2中のゲート電極12の両側に形成され、ゲート電極12側にエクステンション領域161を有し、導電型不純物を含むソース・ドレイン領域16と、ソース・ドレイン領域16のエクステンション領域161のゲート電極12側の側面のみに接し、導電型不純物の半導体基板2中での拡散を抑制する性質を有する拡散抑制不純物を含む拡散抑制層15と、を有する。
【選択図】図1
Description
(半導体装置の構成)
図1は、本発明の第1の実施の形態に係る半導体装置100の断面図である。半導体装置100は、半導体基板2と、半導体基板2中に形成され、素子領域を区画する素子分離領域3と、半導体基板2上にゲート絶縁膜11を介して形成されたゲート電極12と、ゲート電極12の両側面に形成されたオフセットスペーサ13と、オフセットスペーサ13の側面に形成されたゲート側壁14と、半導体基板2中のゲート絶縁膜11下に形成された拡散抑制層15と、拡散抑制層15の両側に形成されたソース・ドレイン領域16とを含む。
図3A(a)〜(d)、図3B(e)、(f)は、本発明の第1の実施の形態に係る半導体装置100の製造工程を示す断面図である。
本発明の第1の実施の形態によれば、エクステンション領域161中の導電型不純物の水平方向(チャネル方向)への拡散を抑えることにより、短チャネル効果の発生を抑えることができる。さらに、エクステンション領域161中の導電型不純物の鉛直方向への拡散を抑えないことにより、エクステンション領域161の深さが不十分になることを防ぎ、寄生抵抗の上昇を抑えることができる。
本発明の第2の実施の形態は、拡散抑制層15の上と下にそれぞれSi系結晶層と固定電荷抑制層が形成される点において、第1の実施の形態と異なる。なお、第1の実施の形態と同様の構成については、説明を省略または簡略化する。
図6は、本発明の第2の実施の形態に係る半導体装置200の断面図である。半導体装置200は、半導体基板2と、半導体基板2中に形成され、素子領域を区画する素子分離領域3と、半導体基板2上にゲート絶縁膜11を介して形成されたゲート電極12と、ゲート電極12の両側面に形成されたオフセットスペーサ13と、オフセットスペーサ13の側面に形成されたゲート側壁14と、半導体基板2中のゲート絶縁膜11下に形成されたSi系結晶層21と、Si系結晶層21下に形成された拡散抑制層15と、拡散抑制層15下に形成された固定電荷抑制層20と、拡散抑制層15の両側に形成されたソース・ドレイン領域16とを含む。
図7A(a)〜(d)、図7B(e)、(f)は、本発明の第2の実施の形態に係る半導体装置200の製造工程を示す断面図である。
本発明の第2の実施の形態によれば、第1の実施の形態と同様に、短チャネル効果発生の抑制およびエクステンション領域161の寄生抵抗上昇の抑制という効果を得ることができる。
本発明は、上記各実施の形態に限定されず、発明の主旨を逸脱しない範囲内において種々変形実施が可能である。
Claims (5)
- 半導体基板上にゲート絶縁膜を介して形成されたゲート電極と、
前記半導体基板中の前記ゲート電極の両側に形成され、前記ゲート電極側にエクステンション領域を有し、導電型不純物を含むソース・ドレイン領域と、
前記ソース・ドレイン領域の前記エクステンション領域の前記ゲート電極側の側面のみに接し、前記導電型不純物の前記半導体基板中での拡散を抑制する性質を有する拡散抑制不純物を含む拡散抑制層と、
を有する半導体装置。 - 前記エクステンション領域の前記側面近傍における前記導電型不純物の濃度分布は、前記エクステンション領域の下面近傍における前記導電型不純物の濃度分布よりも急峻である、
請求項1に記載の半導体装置。 - 前記導電型不純物と前記拡散抑制不純物の組み合わせは、BとC、PとC、またはAsとXeである、
請求項1または2に記載の半導体装置。 - 前記拡散抑制層よりもC濃度が小さく、チャネル領域として機能する、前記拡散抑制層上のSi系結晶層、および前記拡散抑制不純物に起因する固定電荷の発生を抑制する機能を有する固定電荷抑制不純物を含み、前記拡散抑制層と接する固定電荷抑制層の、少なくともいずれか一方をさらに有する、
請求項1〜3のいずれか1つに記載の半導体装置。 - 半導体基板上に拡散抑制層を形成する工程と、
前記拡散抑制層の上方にゲート絶縁膜を介してゲート電極を形成する工程と、
前記拡散抑制層および前記半導体基板中の前記ゲート電極の両側に溝を形成し、前記拡散抑制層の前記ゲート電極の両側の部分を除去する工程と、
前記溝内に、前記拡散抑制層により拡散が抑制される性質を有する導電型不純物から構成されるソース・ドレイン領域の浅い領域を含むエピタキシャル結晶層を形成する工程と、
を含む半導体装置の製造方法。
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JP2013069977A (ja) | 2011-09-26 | 2013-04-18 | Toshiba Corp | 半導体装置の製造方法 |
US10072509B2 (en) | 2013-03-06 | 2018-09-11 | United Technologies Corporation | Gas turbine engine nose cone attachment |
US9246002B2 (en) | 2014-03-13 | 2016-01-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Structure and method for semiconductor device |
WO2018101941A1 (en) * | 2016-12-01 | 2018-06-07 | Intel Corporation | Device isolation by fixed charge |
US11784239B2 (en) | 2016-12-14 | 2023-10-10 | Intel Corporation | Subfin leakage suppression using fixed charge |
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US5413949A (en) * | 1994-04-26 | 1995-05-09 | United Microelectronics Corporation | Method of making self-aligned MOSFET |
US5712501A (en) * | 1995-10-10 | 1998-01-27 | Motorola, Inc. | Graded-channel semiconductor device |
JP2002198529A (ja) * | 2000-10-18 | 2002-07-12 | Hitachi Ltd | 半導体装置およびその製造方法 |
US6822297B2 (en) * | 2001-06-07 | 2004-11-23 | Texas Instruments Incorporated | Additional n-type LDD/pocket implant for improving short-channel NMOS ESD robustness |
JP3865233B2 (ja) * | 2002-08-19 | 2007-01-10 | 富士通株式会社 | Cmos集積回路装置 |
JP2005005406A (ja) * | 2003-06-10 | 2005-01-06 | Semiconductor Leading Edge Technologies Inc | 半導体装置の製造方法 |
JP2008147548A (ja) | 2006-12-13 | 2008-06-26 | Nec Electronics Corp | 半導体装置及び半導体装置の製造方法 |
JP2009158853A (ja) | 2007-12-27 | 2009-07-16 | Toshiba Corp | 半導体装置 |
-
2010
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