JP2011058093A - Method for producing printed wiring board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electroplating of a printed wiring board for plating-filling of non-through-holes and through-holes and for a film plating over the surface to be plated. <P>SOLUTION: In areas in contact with insulative bodies 20A and 20B, the growth of an electroplating film 36 is retarded. In other words, iron ions are forcibly fed into the plating interface by the insulative bodies 20A and 20B, and then a reduction reaction in which trivalent iron ions are converted into divalent iron ions takes place to suppress the deposition of copper. Within a through-hole 31a not in contact with the insulative bodies 20A and 20B, trivalent iron ions merely diffuse into the plating interface and not forcibly fed there, the reduction reaction of trivalent iron ions is slow, and the electroplating film 36 grows to fill a through-hole conductor 42 and to form a thin electroplating film 36 on the surface of a core substrate. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a printed wiring board including immersing a substrate having an opening in an electrolytic plating solution containing iron ions and forming an electrolytic plating film in the opening and on the surface of the substrate.

WO 2006/033315 A1 discloses a method of filling through holes and non-through holes with an electrolytic plating film while bringing an insulator into contact with the surface to be plated.

WO2006 / 033315A1

In the above-described prior art, since the thickness of the plating film formed on the substrate surface is mechanically suppressed, it is considered that the case where the film thickness is too thick occurs.

An object of the present invention is to provide a method for manufacturing a printed wiring board capable of reducing the film thickness of an electrolytic plating film formed on the substrate surface at the same time as filling the opening of the substrate with the electrolytic plating film.

The method for manufacturing a printed wiring board of the present invention includes forming an opening in a substrate,
Forming a seed layer for electrolytic plating on the inner wall of the opening and the surface of the substrate;
Immersing the substrate having the seed layer in an electrolytic plating solution;
Immersing an insulator in the electrolytic plating solution;
Forming an electrolytic plating film on the substrate while relatively moving the substrate and the insulator, and filling the opening with the electrolytic plating film;
Forming a conductor circuit on the substrate. The electrolytic plating solution contains copper sulfate, sulfuric acid, and iron ions.

It is process drawing which shows the manufacturing method of the multilayer printed wiring board of Example 1 of this invention. It is process drawing which shows the manufacturing method of the multilayer printed wiring board of Example 1. It is process drawing which shows the manufacturing method of the multilayer printed wiring board of Example 1. It is process drawing which shows the manufacturing method of the multilayer printed wiring board of Example 1. It is process drawing which shows the manufacturing method of the multilayer printed wiring board of Example 1. 1 is a cross-sectional view of a multilayer printed wiring board according to Example 1. FIG. 6 is a process diagram illustrating a method for manufacturing a multilayer printed wiring board according to a modification of Example 1. FIG. 10 is a process diagram illustrating a method for manufacturing a printed wiring board according to still another modification of Example 1. FIG. It is a schematic diagram which shows the structure of the plating apparatus used in Embodiment 1. FIG. 6 is an explanatory diagram showing an overall configuration of a transport mechanism in a plating tank in Example 2. FIG. 6 is an explanatory diagram showing an overall configuration of a transport mechanism in a plating tank in Example 2. It is process drawing which shows the manufacturing method of the multilayer printed wiring board of Example 2. It is process drawing which shows the manufacturing method of the printed wiring board in embodiment.

[Embodiment]
With reference to FIG. 9, the structure of the plating apparatus which concerns on embodiment of this invention is demonstrated.
The plating apparatus 10 is porous in contact with a plating tank 14 filled with a plating solution 12, a circulation device 16 for circulating the plating solution 12, and a plating surface (substrate surface) on the surface side of the printed wiring board 30. The insulator 20A made of resin (sponge), the insulator 20B made of sponge in contact with the back side plating surface (back surface of the substrate), and the insulators 20A and 20B are moved up and down along the printed wiring board 30. And a lifting device 24. The insulators 20 </ b> A and 20 </ b> B are moved via a lifting bar 22 that moves up and down by a lifting device 24. The printed wiring board 20 is connected to the cathode side. An anode (not shown) is provided in the plating tank, and a copper ball is accommodated in the anode. The plating solution 12 contains copper sulfate, sulfuric acid, and iron ions. The iron ion source is preferably iron sulfate. As iron sulfate, a hydrate is preferable, and iron sulfate heptahydrate (FeSO ₄ .7H ₂ O) is desirable. The concentration of Fe ²⁺ and Fe ³⁺ can be adjusted by air electrolytic treatment.

With reference to FIG. 13, a method of forming an electrolytic plating film on a substrate having an opening using the plating apparatus 10 will be described. First, openings 31a and 31b are formed in the substrate 30 having the first surface 30A and the second surface 30B opposite to the first surface (FIG. 13A). The openings have through-hole conductor through holes (through-hole conductor openings) and via holes, the openings 31a are through-holes, and the openings 31b are non-through holes (via conductor openings). Subsequently, a seed layer 34 is formed on the first and second surfaces of the substrate 30 and the inner wall of the opening (FIG. 13B). Examples of the seed layer include an electroless plating film, a sputtered film, and a deposited film. In addition, by forming conductive particles such as Pd and C on the inner wall of the through hole and the substrate surface, an electrolytic plating film can be formed directly on the substrate surface and the inner wall of the opening. In this case, the conductive particles function as a seed layer. The seed layer 34 in FIG. 13B is an electroless copper plating film. The substrate having the seed layer 34 is immersed in the following plating solution 12.
(Composition of plating solution 12)
Copper sulfate concentration: 0.8 ± 0.1 mol / l
Sulfuric acid concentration: 0.5 ± 0.15 mol / l
Chlorine ion concentration: 5-100ppm
Iron ion concentration: 1g / l-20g / l
* Iron ion concentration is the total value of divalent iron ions and trivalent iron ions * Divalent iron ion concentration: Trivalent iron ion concentration = 1: 2 to 1: 4
Additive concentration: 5 ± 1 mol / l
(Plating conditions)
Current density: 0.5 to 5 A / dm ²

Subsequently, the insulator 20A is pressed against the first surface of the substrate. The insulator 20B is pressed against the second surface of the substrate (FIG. 13C). When the insulator is brought into contact with the substrate, it is desirable that the insulator is further pressed into the surface of the substrate (surface to be plated) by 1.0 to 15.0 mm after contacting the surface of the substrate. If the indentation amount is less than 1.0 mm, the result is likely to be equivalent to a plating method that does not use an insulator. When the pressing amount exceeds 15.0 mm, the supply of the plating solution is hindered, so that the thickness of the plating film in the opening tends to vary. A pushing amount of 2 to 8 mm is most desirable. Variations in the surface of the substrate and the plating film in the opening are reduced. Moreover, the thickness of the electrolytic plating film formed on the substrate surface is reduced.

The substrate and the insulator are relatively moved while the insulators 20A and 20B are in contact with the substrate 30 (FIG. 13C). The moving speed of the insulator with respect to the substrate is desirably 1.0 to 16.0 m / min. Within this range, iron ions can be properly supplied to the substrate surface. As a result, the thickness of the electrolytic plating film formed on the substrate surface can be reduced. Moreover, since the plating solution can be supplied into the opening by the insulator, the opening can be filled with plating.

In the present embodiment, a substrate having a seed layer (see FIG. 13B) is immersed in the plating solution 12 described above. Then, the insulator is pressed against the substrate. The insulator and the substrate are relatively moved while the insulator is pressed against the substrate. While maintaining this state, an electrolytic plating film 36 is formed on the surface of the substrate 30 and in the openings 31a and 31b (FIG. 13C).

In the embodiment, an electrolytic plating film is formed on the substrate surface and in the opening of the substrate while contacting an insulator with the substrate in an electrolytic plating solution containing iron ions. For this reason, trivalent iron ions are easily supplied to the surface to be plated of the substrate. Therefore, it is speculated that the following reaction may occur on the plating film surface.
Reaction formula (1): 2Fe ³⁺ + Cu⇒2Fe ²⁺ + Cu ²⁺
Assuming that the above reaction occurs, it is considered that the plating film is deposited and dissolved in the portion where the insulator is in contact. The growth rate of the plating film on the substrate surface is considered to be slow. On the other hand, since the plating film in the opening does not come into contact with the insulator at the start of plating, it is considered that the growth of the electrolytic plating film in the opening is hardly suppressed by iron ions. Since trivalent iron ions diffuse into the opening due to the concentration gradient, the trivalent iron ion concentration is considered to be low. Therefore, in the embodiment, it is considered that openings (including through holes and non-through holes (via holes)) can be filled with a plating film, and the thickness of the plating film on the substrate surface is reduced. When the electrolytic plating film 36 in the opening is gradually thickened, the insulators 20A and 20B come into contact with the surface of the plating film filling the opening. When in contact with the insulator, the growth rate of the plating film filling the opening and the plating film on the substrate surface is considered to be equal. Therefore, it is considered that the plating film obtained by the present embodiment is a uniform and thin plating film.
Or the mechanism by which precipitation of plating is suppressed by the following reaction is also considered.
Reaction formula (2): Fe ³⁺ + Cu ²⁺ + 3e ⁻ → Fe ²⁺ + Cu
In the case of the reaction formula (2), it is considered that the growth of the plating film is suppressed because the electrons for depositing the copper plating film are used to reduce the trivalent iron ion to the divalent iron ion. In the case of reaction formula (2), it is considered that the opening can be filled with plating and the plating film on the substrate surface can be made thin for the same reason as in reaction formula (1).
The above reactions (reaction formula (1) and reaction formula (2)) are considered to occur even with iron ions. However, in the embodiment, it is considered that iron ions are forcibly supplied to the surface of the plating film using an insulator, and thus iron is considered suitable as a metal ion added to the plating solution. The reason is considered to be that the ionization tendency of iron and copper is close. The method of forming a plating film on the substrate surface and the opening of the substrate while bringing an insulator into contact with the substrate in an electrolytic plating solution containing iron ions is superior to the prior art in, for example, forming fine wiring. When an electrolytic plating film is formed on a substrate having an opening by the embodiment of the present invention and the conventional technique, the thickness of the electrolytic plating film obtained by the embodiment of the present invention (the thickness of the plating film formed on the substrate) is the conventional one. It is about 1/2 to 1/3 of the thickness of the electrolytic plating film (thickness of the plating film formed on the substrate). The opening is filled with a plating film substantially the same as in the embodiment of the present invention and the prior art.
By using the plating method of the embodiment, the opening can be filled with plating, and the surface of the plating film exposed from the opening is likely to be flat (see FIGS. 13D and 13E). Further, the upper surface of the plating film exposed from the opening and the upper surface of the plating film formed on the substrate surface are located at the same level, and the electrolytic plating film 36 on the substrate surface can be formed thin. According to the plating method of this embodiment, it is possible to simultaneously fill a deep opening with a plating film and reduce the thickness of the plating film formed on the substrate surface. After that, by patterning the thin electrolytic plating film 36 and the seed layer 34 on the substrate surface, a fine pitch conductor circuit can be formed (FIG. 13F). At the same time, the through-hole conductor 42, the via conductor 60, and the conductor circuit 58 are completed.

Furthermore, when the insulators 20A and 20B made of a porous resin (sponge) or a brush are used as the insulator 20, trivalent iron ions are easily supplied to the surface to be plated. This is probably because the plating solution is easily supplied to the substrate surface from the pores of the porous resin or the space between the hairs of the brush. The plating film formed on the substrate surface tends to be thin.

According to the embodiment of the present application, the opening can be filled with the electrolytic plating film, and the electrolytic plating film formed on the substrate surface becomes thin. Therefore, the embodiment of the present application is particularly applied to a process of forming an electrolytic plating film in a method (subtractive method, tenting method) in which an electrolytic plating film is formed on the entire surface of a substrate and a conductor circuit is formed by etching. It is preferable. By applying the embodiment of the present application, a fine-pitch conductor circuit can be formed, which is advantageous for increasing the density.

[Example 1]
The manufacturing method of the multilayer printed wiring board of Example 1 is demonstrated with reference to FIGS.
FIG. 6 is a cross-sectional view illustrating the multilayer printed wiring board according to the first embodiment. In the multilayer printed wiring board, conductor circuits 40 are formed on the first surface and the second surface of the core substrate 30, and the conductor circuits on the first surface and the second surface are connected by a through-hole conductor 42. Furthermore, the interlayer resin insulation layer 50 in which the via conductor 60 and the conductor circuit 58 are formed on the core substrate 30 and the conductor circuit 40, and the interlayer resin insulation layer 150 in which the via conductor 160 and the conductor circuit 158 are formed. And are formed. A solder resist layer 70 having an opening 71 is formed on the via conductor 160, the conductor circuit 158, and the interlayer resin insulating layer 150. Bumps 76U and 76D are formed on the via conductor 160 and the conductor circuit 158 exposed through the opening 71 of the solder resist layer 70.

Hereinafter, the manufacturing process of the multilayer printed wiring board shown in FIG. 6 will be described.
(1) A double-sided copper-clad laminate having a thickness of 0.8 mm is prepared (FIG. 1A). An insulating layer substrate (core substrate) 30 of a double-sided copper-clad laminate is made of glass epoxy resin or BT (bismaleimide triazine) resin and a core material such as glass cloth, and the first surface of the core substrate 30 and the first surface thereof. Copper foils 130A and 130B are laminated on the second surface on the opposite side. First, the through-hole 32 for through-hole conductors is formed in a double-sided copper clad laminated board with a drill or a laser (FIG. 1 (B)).

(2) Then, catalyst nuclei are attached to the surface of the double-sided copper-clad laminate and the inner wall surface of the through-hole through hole 32 (not shown). Next, the core substrate provided with the catalyst is immersed in a commercially available electroless copper plating aqueous solution (for example, THRU-CUP manufactured by Uemura Kogyo Co., Ltd.), and a thickness of 0.3 is formed on the substrate surface and the inner wall of the through hole. An electroless copper plating film 34 having a thickness of ˜3.0 μm is formed (FIG. 1C).

(3) Next, the core substrate 30 is washed and degreased with water at 50 ° C., washed with water at 25 ° C. and further washed with sulfuric acid, and then immersed in the electrolytic copper plating solution 12 having the following composition. Thereafter, using the plating apparatus 10 described above with reference to FIG. 9, electrolytic plating films 36 are formed on both surfaces of the copper-clad laminate and in the through holes under the following conditions (FIG. 1D).
[Electrolytic plating solution]
Sulfuric acid 0.5 mol / l
Copper sulfate 0.8 mol / l
Iron sulfate heptahydrate 5 g / l
Leveling agent 50 mg / l
Brightener 50 mg / l
Fe ²⁺ : Fe ³⁺ 1: 2-1: 4
[Electrolytic plating conditions]
Current density 1 A / dm ²
Time 65 minutes Temperature 22 ± 2 ℃

At this time, as described above with reference to FIG. 9, as the insulators 20 </ b> A and 20 </ b> B, using the porous resin, the surface to be plated is moved up and down, and the through holes 32 are filled on the core substrate while being plated. An electrolytic copper plating film 36 is formed. The through hole is filled with the electrolytic copper plating film 36. At this time, the moving speed of the insulator is 7 m / min, the size of the insulator with respect to the core substrate is 0.80, and the pushing amount of the insulator is 8 mm.

(4) An etching resist 38 having a predetermined pattern is formed on the electrolytic plating film 36 (FIG. 1E).

(5) By removing the electrolytic plating film 36, the electroless plating film 34 and the copper foils 130A and 130B exposed from the etching resist by etching, the through-hole conductor 40 and the conductor circuit 42 are formed (FIG. 2A). ).

(6) Next, a roughened surface 40α is formed on the entire surface of the conductor circuit 40 and the upper surface of the through-hole conductor (FIG. 2B).

[Formation of build-up layer]
(7) A resin film for an interlayer resin insulation layer (manufactured by Ajinomoto Co., Inc .: trade name; ABF-45SH) is laminated on both surfaces of the core substrate 30. Thereafter, the interlayer resin insulation layer 50 is formed on both surfaces of the core substrate by curing the resin film for the interlayer resin insulation layer (FIG. 2C).

(8) Next, via conductor openings 50a having a diameter of 80 μm are formed in the interlayer resin insulation layer with a CO ₂ gas laser (FIG. 2D).

(9) The substrate 30 having the via hole opening 50a is immersed in an 80 ° C. solution containing 60 g / l of permanganic acid for 10 minutes, and is formed on the surface of the interlayer resin insulating layer 50 including the inner wall of the via conductor opening 50a. A rough surface 50α is formed (FIG. 2E).

(10) Next, the substrate 30 is immersed in a neutralizing solution (manufactured by Shipley Co., Ltd.) and then washed with water.
Further, catalyst nuclei are attached to the surface of the interlayer resin insulation layer 50 and the inner wall surface of the via conductor opening 50a (not shown).

(11) Next, the substrate provided with the catalyst is immersed in a commercially available electroless copper plating aqueous solution, and a thickness of 0.3 to 3.0 μm is formed on the surface of the interlayer resin insulation layer and the inner wall of the via conductor opening. The electroless copper plating film 52 is formed (FIG. 3A).

(12) Next, the substrate having the interlayer resin insulation layer is washed and degreased with water at 50 ° C., washed with water at 25 ° C. and further washed with sulfuric acid, and then the electrolytic copper as in (3) above. Immerse in the plating solution 12. Using the plating apparatus 10 described above with reference to FIG. 9, an electrolytic copper plating film 56 is formed on the interlayer resin insulation layer and in the via conductor opening under the same conditions as in (3) above (FIG. 3B). )). The via conductor opening is filled with an electrolytic copper plating film 56.

At this time, as described above with reference to FIG. 9, as the insulators 20 </ b> A and 20 </ b> B, the porous resin is used to fill the opening 50 a while moving the surface to be plated up and down, and the interlayer resin insulation An electrolytic copper plating film 56 having a thickness of 12 μm is formed on the surface of the layer 50. At this time, the moving speed of the insulator is 7 m / min, the size of the insulator with respect to the core substrate is 0.80, and the pushing amount of the insulator is 8 mm.

(13) An etching resist 54 is formed on the electrolytic copper plating film 56 (FIG. 3C).

(14) Further, the electrolytic plating film 56 and the electroless plating film 52 exposed from the etching resist 54 are removed by etching. Thereafter, by removing the etching resist 54, an independent upper layer conductor circuit 58 and a filled via 60 are formed (FIG. 3D).

(15) Next, roughened surfaces 58α and 60α are formed on the surface of the upper conductor circuit 58 and the filled via 60 (FIG. 4A).

(16) By repeating the steps (6) to (15), an upper interlayer insulating layer 150, a conductor circuit 158, and a filled via 160 are formed to obtain the multilayer wiring board 300 (FIG. 4B).

(17)
Next, a commercially available solder resist composition (for example, SR7200 manufactured by Hitachi Chemical Co., Ltd.) 70 is applied to both surfaces of the multilayer wiring board 300 in a thickness of 20 μm (FIG. 4C), and at 70 ° C. for 20 minutes. Drying is performed at 70 ° C. for 30 minutes. Then, the opening 71 which exposes a conductor circuit and a filled via is formed in a soldering resist composition by exposure and development processing (Drawing 5 (A)).
Further, the solder resist composition is cured by heating at 80 ° C. for 1 hour, 100 ° C. for 1 hour, 120 ° C. for 1 hour, and 150 ° C. for 3 hours to expose the conductor circuit and filled via. A solder resist layer 70 having an opening is formed on the interlayer resin insulation layer. The upper surface of the conductor circuit and filled via exposed from the opening of the solder resist layer functions as a pad for mounting electronic parts, pins, and the like.

(18) Next, a nickel layer, a palladium layer, and a gold layer are formed in this order on the pad exposed from the opening of the solder resist layer 70.

(19) Thereafter, solder bumps (solder bodies) 76U and 76D are formed on the pads by supplying solder balls onto the pads and performing reflow.

The multilayer printed wiring board 10 having the solder bumps 76U and 76D is completed (FIG. 6).

[First Modification of Example 1]
Next, the manufacturing process according to the modified example of the first embodiment will be described with reference to FIG.
In the process of Example 1 described above with reference to FIG. 3, the electrolytic plating film 56 is formed on the entire surface of the electroless plating film 52. On the other hand, in the first modified example, the plating resist 54 is formed on the intermediate substrate (FIG. 7A) in the state of FIG. 3A (FIG. 7B).

Next, the substrate 30 is washed and degreased with water at 50 ° C., washed with water at 25 ° C. and further washed with sulfuric acid, and then immersed in the electrolytic copper plating solution 12 similar to (3) of Example 1. . An electrolytic copper plating film 56 is formed on the interlayer resin insulation layer and in the via conductor opening under the same conditions as in (1) of Example 1 (FIG. 7C). The via conductor opening is filled with an electrolytic copper plating film 56 (FIG. 7C).

At this time, as described above with reference to FIG. 9, as the insulators 20 </ b> A and 20 </ b> B, using a porous resin, the surface to be plated is moved up and down, and electrolysis is performed on the interlayer resin insulating layer and in the via conductor opening. A copper plating film 56 is formed. The via conductor opening is filled with an electrolytic copper plating film 56. At this time, the moving speed of the insulator is 7 m / min, the size of the insulator with respect to the core substrate is 0.80, and the pushing amount of the insulator is 8 mm.

Further, the plating resist 54 is stripped and removed with 5% KOH. Thereafter, by removing the electroless plating film 52 exposed from the electrolytic plating film, an independent upper layer conductor circuit 58 and a filled via 60 are formed (FIG. 7D). Since the subsequent steps are the same as those in the first embodiment, the description thereof is omitted.

[Second Modification of Example 1]
Next, a manufacturing process according to the second modification of Example 1 will be described with reference to FIG.
The second modification is an example relating to a method of manufacturing a printed wiring board having an hourglass-like through-hole conductor. Here, the hourglass-shaped through-hole conductors are a first opening tapered from the first surface of the core substrate 30 toward the second surface and a second opening tapered from the second surface toward the first surface. Is a through-hole conductor in which a through-hole consisting of

(1) First, a double-sided copper-clad laminate 30C in which copper foils 130A and 130B are attached to both sides of the core substrate 30 and the core substrate is prepared. The core substrate has a first surface and a second surface opposite to the first surface. Copper foil 130A is formed on the first surface of the core substrate, and copper foil 130B is formed on the second surface of the core substrate (FIG. 8A).

(2) Next, a CO2 laser is irradiated from the first surface side of the core substrate. A first opening 136A that penetrates through the copper foil 130A and is tapered from the first surface to the second surface of the core substrate is formed (FIG. 8B). The taper from the first surface toward the second surface includes that the diameter of the first opening gradually decreases from the first surface toward the second surface. Here, it supplements about the diameter of the 1st opening. When the cut surface obtained by cutting the first opening at a plane parallel to the first surface is a circle, the diameter of the first opening is a diameter, and when the cut surface is an ellipse, the diameter is a long diameter.

(3) Thereafter, the CO2 laser is irradiated from the second surface side of the core substrate. The position where the laser is irradiated is a position facing the first opening. A second opening 136B that penetrates through the copper foil 130B and is tapered from the second surface of the core substrate toward the first surface is formed. By forming the second opening, the first opening and the second opening are connected in the core substrate, and a through-hole 136 including the first opening and the second opening is formed in the core substrate (FIG. 8 (C)). The taper from the second surface toward the first surface includes that the diameter of the second opening gradually decreases from the second surface toward the first surface. Here, it supplements about the diameter of the 2nd opening. When the cut surface obtained by cutting the second opening in a plane parallel to the first surface is a circle, the diameter of the second opening is a diameter, and when the cut surface is an ellipse, the diameter is a long diameter.

(4) A seed layer 137 made of a sputtered film is formed on the surface of the copper foil and the inner wall of the through hole (FIG. 8D). The seed layer is copper. Since the first and second openings are tapered, it is easy to form a seed layer by sputtering. Note that the seed layer can be formed by electroless plating.

(5) An electrolytic copper plating film 134 is formed on the first surface and the second surface of the core substrate with the same plating apparatus, plating solution, plating method, and plating conditions as in (1) of Example 1. At this time, the through hole 136 is filled with the electrolytic copper plating film 134 (FIG. 8E).
The through hole of Example 1 has a substantially straight shape, whereas the through hole of the second modified example of Example 1 has an hourglass shape. When through holes having the same diameter (diameters on the front and back surfaces of the core substrate) are formed in the same core substrate, the volume of the hourglass-shaped through hole is smaller than the volume of the straight through hole. Due to this difference, the thickness of the electrolytic plating film on the core substrate of the second modified example of Example 1 tends to be thinner than the thickness of the electrolytic plating film on the core substrate of Example 1. That is, a fine conductor circuit can be formed in the second modification of the first embodiment.

(6) An etching resist is formed on the electrolytic copper plating film 134 as in the first embodiment. Thereafter, the electrolytic plating film 134, the sputtered film 137 and the copper foils 130A and 130B exposed from the etching resist are dissolved and removed to form independent conductor circuits 134A and through-hole conductors 142 (FIG. 8E).
Thereafter, a build-up layer can be formed on the core substrate as in the first embodiment.

[Embodiment 2]
The configuration of the plating apparatus according to the second embodiment of the present invention will be described with reference to FIGS.
FIG. 11 is an explanatory diagram showing the overall configuration of the plating apparatus of the second embodiment. FIG. 10 is an explanatory diagram showing the configuration of the conveyance mechanism on one side in the plating tank.
The plating apparatus 210 is an apparatus for plating a belt-like substrate for a flexible printed wiring board. In this apparatus, electrolytic plating is performed on one surface of the belt-like substrate 230A drawn from the reel 298A on which the belt-like substrate having a width of 180 mm and a length of 120 m is wound, and the belt-like substrate is wound on the take-up reel 298B. The plating apparatus 210 includes an insulating cylindrical contact body 220 that is in contact with the plating surface side of the strip substrate 230A, a back plate 228 that prevents the strip substrate 230A from being bent by the contact body (insulator) 220, an anode 204. In the anode 204, a copper ball 206 for supplying copper to the plating solution is accommodated. As shown in FIG. 11, the plating tank 212 is 20 m in total. A semiconductor contact body may be used instead of the insulating contact body. The contact body of Example 2 has the same role as the insulators 20A and 20B of Embodiment and Example 1.

The contact body 220 is made of a tubular brush made of PVC (vinyl chloride) having a height of 200 mm and a diameter of 100 mm. In the contact body 220, the tip of the brush comes into contact with the printed wiring board side and bends. The contact body 220 is supported by a support bar 220A made of stainless steel, and is rotated via a gear (not shown).

With reference to FIG. 12, formation of filled vias and conductor circuits by the plating apparatus 210 will be described. FIG. 12A shows a double-sided copper-clad flexible substrate. A commercially available dry film is attached to one side of the substrate, and the copper foil 33U at the position where the via conductor opening 37 is formed is removed by etching using a well-known photographic method. Via conductor opening 37 is formed with a carbon dioxide laser using copper foil 33U as a mask (see FIG. 12B). Next, the electroless plating film 34 is formed on the copper foil 33U and the inner wall of the via conductor opening 37 (FIG. 12C), and then the electrolytic plating film 36 is formed by the plating apparatus 210 shown in FIG. 12 (D)). In this case, a plating film is formed while a part of the contact body is in contact with at least a part of the surface of the printed wiring board. At the start of electroplating, the contact body 220 is in contact with the electroless plating film 34 of the printed wiring board. When the electrolytic plating film is formed, the contact body 220 contacts the electrolytic plating film.

Similar to Example 1, in Example 2, the plating solution contains copper sulfate, sulfuric acid, and iron ions. Since the plating solution contains trivalent iron ions, the thickness of the electrolytic plating film formed on the substrate surface is reduced compared to a plating solution that does not contain high concentrations of trivalent iron ions. Further, since the plating film is formed using the contact body, the via conductor opening is easily filled with the electrolytic plating film.

It is desirable that the size of the contact body is equal to or greater than the portion to be plated in the strip substrate. The pushing amount of the contact body (the amount pushed further from the time when the tip of the contact body contacts the surface of the printed wiring board) is desirably pushed into the printed wiring board surface by 1.0 to 15.0 mm. If the thickness is less than 1.0 mm, the result may be the same as the plating method without using the contact body. When the indentation exceeds 15.0 mm, it is considered difficult to supply trivalent iron ions to the substrate surface. Further, it is considered that the contact body easily enters the via conductor opening or the through-hole conductor opening, and the trivalent iron ion concentration in the opening increases. A pushing amount of 2 to 8 mm is most desirable. This is because the plating film is less likely to vary.

As the contact body, it is desirable to use one selected from a flexible brush and a spatula. By providing flexibility, it is possible to follow the unevenness of the substrate and form a plating film with a uniform thickness on the uneven surface.

A resin brush can be used as the contact body. In this case, the hair tip is brought into contact with the surface to be plated. Here, the diameter of the hair is preferably larger than the diameter of the opening. This is because the tip of the hair does not enter the opening, and the plating film can be appropriately filled in the hole. As the resin brush, PP, PVC (vinyl chloride), PTFE (tetrafluoroethylene), etc. having resistance to plating chemicals can be used. Resin and rubber may be used. Furthermore, it is also possible to use resin fibers, such as a vinyl chloride woven fabric and a nonwoven fabric, as a hair tip.

[Example 2]
Production of a printed wiring board (subtractive method, tenting method) using the plating apparatus of Example 2 will be described with reference to FIG.
A laminated strip substrate 230A in which a 9 μm copper foil 33U is laminated on the surface (first surface) of a polyimide strip substrate 230 having a thickness of 25 μm and a 12 μm copper foil 33D is laminated on the back surface (second surface) is used as a starting material ( FIG. 12 (A)). First, the copper foil on the second surface is covered with a resist. Next, the thickness of the 9 μm-thick copper foil 33U on the surface is adjusted to 7 μm by light etching. Thereafter, a black oxide treatment is applied to the copper foil on the first surface. A via conductor opening 37 is formed by laser from the first surface side, penetrating through the copper foil 33U and the polyimide strip substrate 30 and reaching the back surface of the copper foil 33D (FIG. 12B). Then, a palladium catalyst is applied to the surface of the strip substrate 230A (not shown).

Next, the substrate provided with the catalyst is immersed in an electroless plating solution (sulfur cup) manufactured by Uemura Kogyo Co., Ltd., and an electroless plating film (seed layer) having a thickness of 1.0 μm is formed on the first surface of the belt-like substrate 230A. ) 34 is formed (FIG. 12C).

Next, the strip-shaped substrate 230A is washed with 50 ° C. water for degreasing, washed with 25 ° C. water, further washed with sulfuric acid, and then immersed in a plating bath having an electrolytic copper plating solution having the following composition. Using the plating apparatus 210 described above with reference to FIG. 10, an electrolytic plating film 36 is formed on the seed layer under the following conditions (FIG. 12D).
[Electrolytic plating solution]
Sulfuric acid 0.5 mol / l
Copper sulfate 0.8 mol / l
Iron sulfate heptahydrate 100 g / l
Leveling agent 50 mg / l
Brightener 50 mg / l
Fe ²⁺ : Fe ³⁺ 1: 2-1: 4
[Electrolytic plating conditions]
Current density 5.0-30 mA / cm ²
Time 10-90 minutes Temperature 22 ± 2 ℃
Here, the current density, 5.0~30mA / cm ^2, in particular, 10 mA / cm ² or more.

Then, a resist having a predetermined pattern is formed on both surfaces of the belt-like substrate, and etching is performed to form the conductor circuit 42U and the conductor circuit 42D (FIG. 12E). This is a so-called subtractive method or tenting method.

[Example 3]
In the second modified example of Example 1, the composition of the electrolytic plating solution is changed to the following composition. The rest is the same as the second modification of the first embodiment.
[Electrolytic plating solution]
Sulfuric acid 0.5 mol / l
Copper sulfate 0.8 mol / l
Iron sulfate heptahydrate 50 g / l
Leveling agent 50 mg / l
Brightener 50 mg / l
Fe ²⁺ : Fe ³⁺ 1: 2-1: 4

[Example 4]
In the second modified example of Example 1, the composition of the electrolytic plating solution is changed to the following composition. The rest is the same as the second modification of the first embodiment.
[Electrolytic plating solution]
Sulfuric acid 0.5 mol / l
Copper sulfate 0.8 mol / l
Iron sulfate heptahydrate 100 g / l
Leveling agent 50 mg / l
Brightener 50 mg / l
Fe ²⁺ : Fe ³⁺ 1: 2-1: 4
When Example 3 and Example 4 are compared, in Example 4, the plating film exposed from the opening tends to be concave. In Example 4, it is presumed that the plating growth in the opening is slow because there are many trivalent iron ions. If the iron ion concentration is 1 g / L to 10 g / L, the flatness of the plating film exposed from the opening becomes high, so that an interlayer resin insulating layer can be easily formed thereon.
The iron ions in the plating solution are composed of divalent iron ions and trivalent iron ions, and the ratio of the divalent iron ion concentration to the trivalent iron ion concentration in the electrolytic plating solution is 1: 2 to 1: 4. When it is within the range, precipitation of the plating film on the substrate surface is effectively suppressed. It is easy to satisfy both filling in the opening and thinning of the plating film on the substrate surface.
It is desirable that iron sulfate heptahydrate is added in an amount of 5 to 100 g in 1000 mL of the electroplating solution. When the iron ion concentration is 1 g / L to 20 g / L, the opening can be filled with plating, and the plating film on the substrate surface can be made thin.

[Example 5]
In the second modified example of Example 1, the composition of the electrolytic plating solution is changed to the following composition. The rest is the same as the second modification of the first embodiment.
[Electrolytic plating solution]
Sulfuric acid 0.65 mol / l
Copper sulfate 0.7 mol / l
Iron sulfate heptahydrate 50 g / l
Leveling agent 50 mg / l
Brightener 50 mg / l
Fe ²⁺ : Fe ³⁺ 1: 2-1: 4

[Example 6]
In the second modified example of Example 1, the composition of the electrolytic plating solution is changed to the following composition. The rest is the same as the second modification of the first embodiment.
[Electrolytic plating solution]
Sulfuric acid 0.35 mol / l
Copper sulfate 0.9 mol / l
Iron sulfate heptahydrate 50 g / l
Leveling agent 50 mg / l
Brightener 50 mg / l
Fe ²⁺ : Fe ³⁺ 1: 2-1: 4

In the embodiments and examples of the present invention, an electroplating is performed while bringing an insulator into contact with the surface to be plated and moving the insulator relative to the surface to be plated. On the surface to be plated in contact with the insulator, the growth of the plating film is delayed. It is considered that iron ions are forcibly supplied to the surface to be plated by the insulator, so that a reduction reaction of iron ions occurs on the surface to be plated, and the growth of the electrolytic plating film is suppressed. On the other hand, in a portion where the insulator is not in contact, iron ions diffuse on the surface to be plated due to the concentration gradient, so that the reduction reaction of iron ions on the surface to be plated is small and the growth rate of the electrolytic plating film is considered to be fast. Therefore, the electrolytic plating film grows quickly in the opening for the via conductor or the through-hole conductor, but the plating film on the surface to be plated other than the opening does not become too thick. In other words, the openings for via conductors and through-hole conductors are reliably filled with the electrolytic plating film, but on the surface to be plated (substrate surface), compared to the thickness of the electrolytic plating film formed in the opening, A plating film having a relatively small thickness can be formed as compared with the film thickness of the conductor circuit in the prior art. In the embodiments and examples of the present invention, since a thin plating film is patterned, it is easier to form a finer conductor circuit than in the past.

DESCRIPTION OF SYMBOLS 10 Plating apparatus 20A, 20B Insulator 30 Substrate 32 Through-hole opening 34 Electroless plating film 36 Electrolytic plating film 40 Through-hole conductor 42 Conductor circuit 58 Conductor circuit 60 Via conductor

Claims (9)

Forming an opening in the substrate;
Forming a seed layer for electrolytic plating on the inner wall of the opening and the surface of the substrate;
Immersing the substrate having the seed layer in an electrolytic plating solution;
Immersing an insulator in the electrolytic plating solution;
Forming an electrolytic plating film on the substrate while relatively moving the substrate and the insulator, and filling the opening with the electrolytic plating film;
In the method for producing a printed wiring board, comprising forming a conductor circuit on the substrate,
The electrolytic plating solution contains copper sulfate, sulfuric acid, and iron ions. In the manufacturing method of the printed wiring board of Claim 1,
The iron ion source is made of iron sulfate. The method for manufacturing a printed wiring board according to claim 1, wherein the iron ions are composed of divalent iron ions and trivalent iron ions, and a ratio of divalent iron ions to trivalent iron ions in the electrolytic plating solution is set. The range is 1: 2 to 1: 4. 3. The method for manufacturing a printed wiring board according to claim 2, wherein the iron sulfate is iron sulfate heptahydrate, and the concentration of the iron sulfate heptahydrate is 5 to 100 g / L. 2. The method of manufacturing a printed wiring board according to claim 1, wherein the insulator is one selected from a long fiber, a porous material, a fibrous resin, and rubber. 2. The method for manufacturing a printed wiring board according to claim 1, wherein the insulator is made of a porous ceramic or a porous resin. 2. The method of manufacturing a printed wiring board according to claim 1, wherein the insulator is a brush, and the bristles of the brush are made of resin. 2. The printed wiring board manufacturing method according to claim 1, wherein the insulator is made of resin fiber. In the manufacturing method of the printed wiring board of Claim 1, the density | concentration of the said iron ion is 1g / L-20g / L.

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