CN102014589A - Method of manufacturing printed wiring board - Google Patents

Method of manufacturing printed wiring board Download PDF

Info

Publication number
CN102014589A
CN102014589A CN2010102758576A CN201010275857A CN102014589A CN 102014589 A CN102014589 A CN 102014589A CN 2010102758576 A CN2010102758576 A CN 2010102758576A CN 201010275857 A CN201010275857 A CN 201010275857A CN 102014589 A CN102014589 A CN 102014589A
Authority
CN
China
Prior art keywords
substrate
opening
insulator
electroplating
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN2010102758576A
Other languages
Chinese (zh)
Inventor
川合悟
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Publication of CN102014589A publication Critical patent/CN102014589A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/427—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/02—Electroplating of selected surface areas
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/22—Electroplating combined with mechanical treatment during the deposition
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00—Electroplating characterised by the article coated
    • C25D7/12—Semiconductors
    • C25D7/123—Semiconductors first coated with a seed layer or a conductive layer
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D3/00—Electroplating: Baths therefor
    • C25D3/02—Electroplating: Baths therefor from solutions
    • C25D3/38—Electroplating: Baths therefor from solutions of copper
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Organic Chemistry (AREA)
  • Electrochemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Mechanical Engineering (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Electroplating And Plating Baths Therefor (AREA)

Abstract

A printed wiring board is manufactured by a method in which an opening is formed in a substrate, and a seed layer for electrolytic plating is formed on an inner wall of the opening and a surface of the substrate. The substrate with the seed layer is placed in an electrolytic plating solution, and an insulative body is placed in the electrolytic plating solution. The substrate and the insulative body are moved relative to each other to form an electrolytic plated film on the substrate and fill the opening with the electrolytic plated film. A conductive circuit is formed on the substrate. The electrolytic plating solution includes copper sulfate, sulfuric acid, and iron ions.

Description

The manufacture method of printed substrate
The cross reference of related application
The rights and interests of the priority of the U.S. Provisional Patent Application 61/239,995 of present patent application requirement submission on September 4th, 2009 are all introduced its content with for referencial use.
Background technology
Relevant with the manufacture method of printed substrate, international publication WO2006/033315A1 discloses with electroplating film and has filled through hole and non-through hole, the method that insulator is contacted with surface to be plated.
Summary of the invention
In method of fabricating printed wiring board according to one embodiment of the invention, in substrate, form opening, and the crystal seed layer that on the surface of the inwall of opening and substrate, is formed for electroplating.The substrate that will have crystal seed layer places electroplate liquid, and insulator is placed electroplate liquid.Thereby described substrate and described insulator relative to each other move and form electroplating film and use the electroplating film filling opening on described substrate.On described substrate, form the galvanic circle.Described electroplate liquid comprises copper sulphate, sulfuric acid and iron ion.
Description of drawings
In conjunction with the accompanying drawings with reference to following detailed description when understanding better, can easier acquisition to more comprehensively the understanding of the present invention and many attendant advantages thereof, wherein:
Figure 1A-1E is the sectional view that multilayer printed circuit board step of manufacturing according to an embodiment of the invention is shown.
Fig. 2 A-2E is the sectional view that multilayer printed circuit board step of manufacturing according to an embodiment of the invention is shown.
Fig. 3 A-3D is the sectional view that multilayer printed circuit board step of manufacturing according to an embodiment of the invention is shown.
Fig. 4 A-4C is the sectional view that multilayer printed circuit board step of manufacturing according to an embodiment of the invention is shown.
Fig. 5 A and 5B are the sectional views that multilayer printed circuit board step of manufacturing according to an embodiment of the invention is shown.
Fig. 6 is the sectional view of the multilayer printed circuit board of manufacture method production according to an embodiment of the invention.
Fig. 7 A-7D is the sectional view that multilayer printed circuit board step of manufacturing according to an embodiment of the invention is shown.
Fig. 8 A-8F is the sectional view that the step of method of fabricating printed wiring board according to an embodiment of the invention is shown.
Fig. 9 is the perspective view that schematically shows the structure of the electroplating device that is used for method of fabricating printed wiring board according to an embodiment of the invention.
Figure 10 is the schematic diagram of conveying mechanism structure that the electroplating device electroplating bath of the method for fabricating printed wiring board that is used for according to an embodiment of the invention is shown.
Figure 11 is the schematic diagram of conveying mechanism structure that the electroplating device electroplating bath of the method for fabricating printed wiring board that is used for according to an embodiment of the invention is shown.
Figure 12 A-12E is the sectional view that multilayer printed circuit board step of manufacturing according to an embodiment of the invention is shown.
Figure 13 A-13F is the sectional view that multilayer printed circuit board step of manufacturing according to an embodiment of the invention is shown.
Embodiment
Describe embodiment with reference to accompanying drawing, wherein identical Reference numeral is represented corresponding or components identical in each accompanying drawing.
＜the first embodiment 〉
With reference to figure 9 electroplating device that is used for according to the method for fabricating printed wiring board of first embodiment of the invention is described.Electroplating device 10 comprise electroplating bath 14, circulating device 16, insulator (20A, 20B), lifting arm (elevator bars) 22 and lifting device 24.Fill electroplating bath 14 with electroplate liquid 12.Circulating device 16 circulation electroplate liquids 12.Insulator (20A) is made up of porous material such as porous resin (for example sponge).In order to electroplate the surface of printed substrate 30, with insulator (20A) place electroplate liquid 12 and with one of the surface to be plated of printed substrate 30 for example positive the contact.Insulator (20B) is made up of porous material such as porous resin (for example sponge).In order to electroplate the surface of printed substrate 30, insulator (20B) is placed electroplate liquid 12 and contact with another surface to be plated (for example back side) of printed substrate 30.Lifting device 24 along printed substrate 30 vertical moving insulators (20A, 20B).(20A 20B) moves by the lifting arm 12 by lifting device 24 vertical moving insulator.Printed substrate 30 is connected to cathode side.In electroplating bath 14, be arranged on not shown anode and in anode, store source metal such as copper ball.Electroplate liquid 12 contains for example copper sulphate, sulfuric acid and iron ion.Electroplate liquid 12 before electroplating begins to contain ferric ion.Along with plating is carried out, produce ferrous ion, so ferrous ion and ferric ion are present in the electroplate liquid 12.About iron ion source, preferably sulfuric acid is ferrous.The preferred water compound is as ferrous sulfate, preferred green vitriol (FeSO 47H 2O).By simulating plating (dummy plating), can regulate Fe 2+Concentration and Fe 3+Concentration.
With reference to figure 13A-13F, below describe to use the method for electroplating device 10 with the electroplating film that is formed for printed substrate (substrate) 30.Have first surface (30A) and with the substrate 30 of first surface (30A) opposing second surface (30B) in form opening (31a, 31b) (Figure 13 A).(31a 31b) comprises through hole (penetrating holes) (via conductors opening) and the via hole (via hole) that is used for via conductors to opening.In this example, opening (31a) is a through hole, and opening (31b) is non-through hole (via conductor (via-conductor) opening).On first and second surfaces of substrate 30 (30A, 30B) and opening (31a forms crystal seed layer 34 (Figure 13 B) on inwall 31b).As the example of crystal seed layer, can enumerate plated film, sputtered film and vapor-deposited film.Selectively, by on the inwall of through hole and substrate surface, conductive particle such as Pd or C being set, can (31a 31b) directly forms electroplating film on the inwall at substrate surface and opening.In this case, conductive particle is as crystal seed layer.Crystal seed layer 34 in this example is chemical plating copper films.The substrate 30 that will have crystal seed layer 34 places electrolyte 12 to form electroplating film 36.The example of the composition of electroplate liquid 12 and plating condition are as follows.
The composition of＜electroplate liquid 12 〉
Concentration of copper sulfate: 0.8 ± 0.1mol/L
Sulfuric acid concentration: 0.5 ± 0.15mol/L
Chlorine ion concentration: 5-100ppm
Iron concentration: 1g/L-20g/L
* iron concentration is the total value of ferrous ion and ferric ion concentration.
* ferrous ion concentration: ferric ion concentration=1: 2-1: 4
Additive concentration: 5 ± 1mol/L
＜plating condition 〉
Current density: 0.5-5A/dm 2
Insulator (20A) is tightly suppressed the first surface (30A) of substrate 30, insulator (20B) is tightly suppressed the second surface (30B) (Figure 13 C) of substrate 30.When insulator (20A, 20B) during contact substrate 30, preferred insulator (20A, 20B) 1.0-15.0mm for example it contact the further propelling in back substrate surface with substrate surface (surface to be plated) in.If push-in stroke is less than 1.0mm, the result tends to that (20A, plating 20B) is not the same with using insulator.If push-in stroke surpasses 15.0mm, (31a, 31b) thickness of Nei plated film tends to change, because the supply of electroplate liquid 12 will be limited at opening.Push-in stroke is 2-8mm most preferably.On substrate surface and opening (31a, 31b) variation of Nei plated film is with less.In addition, the thickness that is formed at the electroplating film on the substrate surface will reduce.
(20A, when 20B) contacting with substrate 30, (20A 20B) relative to each other moves (Figure 13 C) for substrate 30 and insulator when insulator.(20A is 20B) with respect to the preferred 1.0-16.0m/ of the translational speed of substrate 30 minute for insulator.In this scope, iron ion suitably can be supplied on the substrate surface.As a result, can be reduced in the thickness of the electroplating film 36 that forms on the substrate surface.In addition since can pass through insulator (20A, 20B) electroplate liquid 12 is supplied to opening (31a, 31b), can opening (31a, 31b) in the filling coating.
In the present embodiment, the substrate 30 (referring to Figure 13 B) that will have crystal seed layer 34 places above-mentioned electroplate liquid 12.Then, (20A 20B) tightly suppresses substrate 30 to make insulator.(20A, when 20B) tightly suppressing substrate 30, (20A 20B) relative to each other moves with substrate 30 insulator making insulator.When keeping this condition, on the surface of substrate 30 and opening (31a forms electroplating film 36 (Figure 13 C) in 31b).
In the present embodiment, insulator (20A, when 20B) in containing the electroplate liquid of iron ion, contacting with substrate 30, on the surface of substrate 30 and the opening of substrate 30 (31a forms electroplating film 36 in 31b).Therefore, can easily ferric ion be supplied to substrate surface to be plated.Under the situation of not wishing to be bound by any theory, think and below coated surface takes place, react.
Reaction equation (1): 2Fe 3++ Cu → 2Fe 2++ Cu 2+
If above-mentioned reaction takes place, think in that (20A 20B) deposition and the dissolving of plated film takes place in Jie Chu the zone with insulator.Think that the speed of growth of the plated film on substrate surface will reduce.By contrast, because in the starting point of electroplating, (31a, 31b) (20A, therefore 20B) contact does not think that (31a, 31b) growth of Nei electroplating film 36 seldom is subjected to the inhibition of iron ion at opening to Nei plated film with insulator at opening.Since ferric ion by concentration gradient be diffused into opening (31a, 31b) in, therefore think that the concentration of ferric ion is low.Therefore, in the present embodiment, think and to use electroplating film 36 filling openings (31a 31b) (comprises through hole and non-through hole (via hole)), and simultaneously the thickness of the electroplating film 36 on substrate surface is relatively little.When (when 31a, electroplating film 36 progressive additives in 31b), (20A is 20B) with filling opening (31a, the surface contact of electroplating film 36 31b) for insulator at opening.When ((31a, electroplating film 36 31b) and the electroplating film 36 on substrate surface had and thought the speed of growth that becomes identical filling opening 20A, 20B) when contact with insulator.Therefore, think that the electroplating film 36 that obtains is even and thin in the present embodiment.
Under the situation of not wishing to be bound by any theory, but the Selecting Mechanism and Procedure that suppresses to electroplate by following reactive deposition is feasible.
Reaction equation (2): Fe 3++ Cu 2++ 3e -→ Fe 2++ Cu
In reaction equation (2), be used to make ferric ion to be reduced to ferrous ion owing to will be used to deposit the electronics of copper plating film, therefore think the growth that has suppressed plated film.In reaction equation (2) since with identical reason in reaction equation (1), think that (31a fills coating in 31b), and the thickness of the plated film on substrate surface keeps relatively little simultaneously at opening.
Same and the iron ion ion generation in addition of above-mentioned reaction (reaction equation (1) and reaction equation (2)).Yet, in the present embodiment and since think forcibly iron ion is supplied to use insulator (20A, on coated surface 20B), therefore think preferred with iron ion as the metal ion that is added into electroplate liquid 12.This may be because the ionization tendency of iron and copper is similar.Compare with routine techniques, for example on the substrate surface of substrate 30 and opening (31a, form plated film in 31b) and insulator (20A, the 20B) method that contact with substrate 30 in containing the electroplate liquid of iron ion are being excellent aspect the formation forming fine wiring.When using embodiment of the present invention and routine techniques to have to form electroplating film on the substrate of opening, use the thickness (at the thickness of the plated film that forms on the substrate) of the electroplating film that embodiment of the present invention obtain approximately be to use the electroplating film that routine techniques obtains thickness (thickness of the plated film that on substrate, forms) 1/2nd to 1/3rd.With identical in routine techniques, can use the plated film filling opening in embodiments of the invention.
By using the electro-plating method of the present embodiment, (31a, 31b), (31a, 31b) smooth (referring to Figure 13 D and 13E) tended to be in the surface of the plated film of Bao Luing by opening can to use the coating filling opening.And (31a, 31b) end face of the plated film of Bao Luing can be positioned at equal height with the end face of the plated film that forms on substrate surface, can form the electroplating film 36 on the substrate surface thinly by opening.According to the electro-plating method of the present embodiment, can realize simultaneously filling dark opening and being reduced in the coating film thickness that forms on the substrate surface with plated film.Subsequently, thin electroplating film 36 and crystal seed layer 34 patternings by will be on substrate surface can form close spacing galvanic circle (Figure 13 F).Simultaneously, finish via conductors 42, via conductor 60 and galvanic circle 58.
In addition, (20A, 20B), ferric ion tends to be supplied on the surface to be plated if use the insulator of being made up of porous resin (for example sponge) or hairbrush.This may be because electroplate liquid 12 by porous resin the hole or the gap between the bristle of hairbrush easily be supplied on the substrate surface.The plated film that forms on substrate surface tends to thin.
Insulator (20A, 20B) in Jie Chu the zone, the decreased growth of electroplating film 36.That is, forcibly (20A 20B) supplies on the plating interface, and it is the reaction of ferrous ion that the reduction ferric ion takes place, and suppresses the deposition of copper by insulator with iron ion.In that (20A 20B) in Jie Chu the through hole (31a), does not forcibly supply with ferric ion, but only diffuses on the plating interface by concentration gradient, and the degree of ferric ion reduction reaction is low, and electroplating film 36 growth with insulator.Therefore, can be formed on the lip-deep electroplating film 36 of core substrate thinly, simultaneously filling vias conductor 42.
According to embodiment of the present invention, not only opening can be filled with electroplating film, and the electroplating film that forms on substrate surface can be for thin.Therefore, embodiment of the present invention are available for the technology that forms electroplating film by the method (as Subtractive (subtractive method) and protuberance method (tenting method)) that wherein forms electroplating film on the whole base plate surface especially, and form the galvanic circle by etching.Owing to can form close spacing galvanic circle, utilization embodiment of the present invention are favourable for making the height circuit board.
＜manufacture method 1 〉
The manufacture method (manufacture method 1) of multilayer printed circuit board is described with reference to figure 1A-6.
Fig. 6 is the sectional view of multilayer printed circuit board 100.Described multilayer printed circuit board 100 has core substrate 30, galvanic circle 40, via conductors 42 and interlayer resin insulating layers (50,150).Core substrate 30 have first surface (end face among Fig. 6) and with described first surface opposing second surface (bottom surface among Fig. 6).Described galvanic circle 40 is arranged on first and second surfaces of core substrate 30.Described galvanic circle 40 connects by via conductors 42.What form on core substrate 30 and galvanic circle 40 is interlayer resin insulating layers 50, forms via conductor 60 and conductor circuit 58 in interlayer resin insulating layers 50.On described interlayer resin insulating layers 50, form interlayer resin insulating layers 150, in interlayer resin insulating layers 150, form via conductor 160 and galvanic circle 158.On described via conductor 160, galvanic circle 158 and interlayer resin insulating layers 150, form solder mask 70 with peristome 71.On via conductor 160 that exposes by the peristome in the solder mask 70 71 and galvanic circle 158, form projection (76U, 76D).
In following, the step of making the multilayer printed circuit board 100 that is shown in Fig. 6 is described with reference to figure 1A-5B.
Preparation has thickness and is for example double-sided copper-clad layered product (Figure 1A) of 0.8mm.The core substrate of described double-sided copper-clad layered product (insulated substrate) 30 made by glass-epoxy resin or BT (Bismaleimide Triazine) resin and core resin such as glass cloth.On the first surface of core substrate 30 and with the first surface opposing second surface on, the lamination Copper Foil (130A, 130B).Use rig or laser on the double-sided copper-clad layered product, to be formed for the through hole 32 (Figure 1B) of via conductors.
Catalyst core is attached to the surface and the inner wall surface (not shown in FIG.) that is used for the through hole 32 of via conductors of double-sided copper-clad layered product.The core substrate 30 that will have the catalyst that adheres to is immersed in the chemical bronze plating liquid that is obtained commercially (as by C.Uyemura Co., the THRU-CUP that Ltd. makes) has the chemical plating copper film 34 that thickness is 0.3-3.0 μ m (Fig. 1 C) to form on the inwall of substrate surface and through hole 32.
Thereby, described core substrate 30 is immersed in the electrolytic copper plating liquor 12 with following composition with 50 ℃ of water purification degreasings, with 25 ℃ of water cleanings and after further with sulfuric acid purification.Subsequently, by using above-mentioned electroplating device 10, form electroplating film 36 (Fig. 1 D) with reference to figure 9 under the following conditions on the two sides of copper-clad laminate and in the through hole.
The composition of＜electroplate liquid 12 〉
Sulfuric acid 0.5mol/L
Copper sulphate 0.8mol/L
Green vitriol (FeSO 47H 2O) 5g/L
Levelling agent 50mg/L
Polishing agent 50mg/L
Fe 2+∶Fe 3+ 1∶2-1∶4
＜plating condition 〉
Current density 1A/dm 2
65 minutes time
22 ± 2 ℃ of temperature
Herein, as aforesaid with reference to figure 9, (20A 20B) moves along Surface Vertical to be plated the insulator of use porous resin, forms electroplating copper film 36 on core substrate 30, fills through hole 32 with coating simultaneously.Described through hole 32 usefulness electroplating copper films 36 are filled.During this period, insulator (20A, translational speed 20B) is 7m/ minute, insulator (20A, size 20B) is of a size of 0.80 with respect to core substrate, and insulator (20A, push-in stroke 20B) they are 8mm.
Subsequently, on electroplating film 36, form etch-resistant coating 38 (Fig. 1 E) with predetermined pattern.
(130A 130B), and forms via conductors 40 and galvanic circle 42 (Fig. 2 A) to remove electroplating film 36, plated film 34 and the Copper Foil that 38 exposures stay by etch-resistant coating by etching.
Forming roughened surface (40 α) (Fig. 2 B) on the whole surface of galvanic circle 40 and on the end face of via conductors 42.
＜form and make up (Built-up) layer
On the two sides of core substrate 30, lamination is used for the resin molding (trade name: ABF-45SH, by Ajinomoto Fine-Techno Co., Inc. makes) of interlayer resin insulating layers.Then, be used for the resin molding of interlayer resin insulating layers, on the two sides of core substrate 30, form interlayer resin insulating layers 50 (Fig. 2 C) by curing.
By using CO 2Gas laser, formation has the via conductor opening (50a) (Fig. 2 D) that diameter is 80 μ m in interlayer resin insulating layers 50.
The substrate 30 that will have a via conductor opening (50a) was immersed in 80 ℃ the solution that contains the 60g/L permanganic acid 10 minutes, and formed roughened surface (50 α) (Fig. 2 E) on the surface of the interlayer resin insulating layers 50 that comprises via conductor opening (50a) inwall.
Be immersed in substrate 30 in the neutralization solution (making) and then wash with water by Shipley Company.Further, with the catalyst core (not shown) attached on the surface of interlayer resin insulating layers 50 and on the inner wall surface of via conductor opening (50a).
Thereby being immersed in the chemical bronze plating liquid that is obtained commercially to form, the substrate 30 that will have the catalyst that adheres to has the chemical plating copper film 52 that thickness is 0.3-3.0 μ m (Fig. 3 A) on the inwall of the surface of interlayer resin insulating layers 50 and via conductor opening (50a).
Thereby purify degreasings with 50 ℃ of water, with 25 ℃ of water cleanings and after further with sulfuric acid purification, the substrate 30 that will have interlayer resin insulating layers 50 is immersed in the electrolytic copper plating liquor 12 with composition same as described above.Use above-mentioned electroplating device 10 with reference to figure 9, under these conditions, form electroplating copper film 56 (Fig. 3 B) on interlayer resin insulating layers 50 and in the via conductor opening (50a).With electroplating copper film 56 filling vias conductor openings (50a).
Herein, as aforesaid with reference to figure 9, (20A is 20B) when Surface Vertical to be plated moves using the insulator of porous resin, coating is filled in the opening (50a), and on the surface of interlayer resin insulating layers 50, also forms and have the electroplating copper film 56 that thickness is 12 μ m.Insulator (20A, translational speed 20B) is 7m/ minute, insulator (20A, size 20B) is of a size of 0.80 with respect to core substrate 30, and insulator (20A, push-in stroke 20B) they are 8mm.
Subsequently, on electroplating copper film 56, form etch-resistant coating 54 (Fig. 3 C).Remove electroplating film 56 and the plated film 52 that 54 exposures stay by etch-resistant coating by etching.Then, by removing etch-resistant coating 54, form independently galvanic circle, upper strata 58 and the path 60 (Fig. 3 D) of filling.On the surface of galvanic circle, upper strata 58 and the path 60 of filling, form roughened surface (58 α, 60 α) (Fig. 4 A).
By the above-mentioned steps that repeated reference Fig. 2 B-4A describes, the path 160 that forms other upper strata interlayer insulating film 150, galvanic circle 158 and fill, and obtain multilayer circuit board 300 (Fig. 4 B).
With the welding resistance composition that is obtained commercially (as by Hitachi Chemical Co., Ltd. the SR 7200 of Zhi Zaoing) 70 be applied on the two sides of multilayer circuit board 300 to 20 μ m thick (Fig. 4 C), to its carry out 70 ℃ following 20 minutes and 70 ℃ of following dried of 30 minutes.Subsequently, by exposure and development treatment, in the welding resistance composition, form the opening 71 (Fig. 5 A) of the path that exposes galvanic circle and filling.Then, respectively by carrying out heat treated under the following conditions: 80 ℃ 1 hour, 100 ℃ 1 hour, 120 ℃ 1 hour and 150 ℃ 3 hours, the welding resistance composition is solidified, and on interlayer resin insulating layers, form the solder mask 70 of opening with the path that exposes galvanic circle and filling.The end face of the galvanic circle that will expose by the opening in solder mask and the path of filling is with acting on the pad that electronic building brick and pin (pin) are installed.
On the pad that exposes by the opening in solder mask 70, form nickel dam, palladium layer and gold layer successively.Subsequently, solder ball being applied to pad goes up and follows and reflux.Therefore on pad, form solder projection (welding body) (76U, 76D).Finish have solder projection (76U, multilayer printed circuit board 100 (Fig. 6) 76D).
＜manufacture method 2 〉
Below, with reference to the manufacturing step of figure 7A-7D description according to manufacture method 2.As shown in fig. 7b, on Intermediate substrate, form the anti-plating agent 54 that is in the state that is shown in Fig. 3 A.This is different from the method described above 1 with reference to figure 3A-3D, in described method 1, forms electroplating film 56 on the whole surface of plated film 52.
Thereby purify degreasings with 50 ℃ of water, with 25 ℃ of water cleanings and after further with sulfuric acid purification, with substrate 30 be immersed in have with said method 1 in the electrolytic copper plating liquor 12 of same composition.Under condition same as described above, form electroplating copper film 56 on interlayer resin insulating layers 50 and in the via conductor opening, with electroplating copper film 56 filling vias conductor openings (Fig. 7 C).
Herein, as aforesaid with reference to figure 9, (20A 20B) moves along Surface Vertical to be plated the insulator of use porous resin, and form electroplating copper film 56 on interlayer resin insulating layers 50 and in the via conductor opening, the via conductor opening is filled with coating simultaneously.The via conductor opening is filled with electroplating copper film 56.Insulator (20A, translational speed 20B) is 7m/ minute, insulator (20A, size 20B) is of a size of 0.80 with respect to core substrate 30, and insulator (20A, push-in stroke 20B) they are 8mm.
Use the anti-plating of 5%KOH solution removal agent 54.Subsequently, by removing the plated film 52 that is not covered, form independently galvanic circle, upper strata 58 and the path 60 (Fig. 7 D) of filling by electroplating film 56.Because step subsequently is with identical in manufacture method 1, the descriptions thereof are omitted.
＜manufacture method 3 〉
Below, with reference to the manufacturing step of figure 8A-8F description according to manufacture method 3.This method relates to have the example of manufacture method of the printed substrate of hourglass shape via conductors.Herein, the hourglass shape via conductors refers to by coating being filled into the via conductors of making in the through hole, and described through hole is formed to second opening that first surface diminishes gradually by first opening that diminishes gradually to second surface from the first surface of core substrate 30 with from second surface.
Preparation double-sided copper-clad layered product (30C), (130A 130B) makes by lamination Copper Foil on the two sides of core substrate 30.Described core substrate 30 have first surface and with the first surface opposing second surface.Form Copper Foil (130A) on the first surface of core substrate 30 and on the second surface of core substrate 30, forming Copper Foil (130B) (Fig. 8 A).
Apply CO from the first surface side of core substrate 30 2Laser.Form first opening (136A), its connect Copper Foil (130A) and from the first surface of core substrate 30 to second surface diminish gradually (Fig. 8 B).Has first opening (136A) diameter that becomes littler gradually to second surface from first surface to diminishing gradually of second surface from first surface.Diameter about first opening (136A), when cutting apart first opening (136A) by the plane that is parallel to first surface, if first opening (136A) is circular, the distance of then crossing the cross section is a diameter, if and first opening (136A) is oval-shaped, then main shaft is a diameter.
Then, the second surface side from core substrate 30 applies CO 2Laser.Position by laser illumination is relative with first opening (136A).Form second opening (136B), it connects Copper Foil (130B) and diminishes gradually to first surface from the second surface of core substrate 30.By forming second opening (136B), (136A 136B) connects in core substrate 30 inside first and second openings, and forms by first and second openings (136A, 136B) through hole 136 of Gou Chenging (Fig. 8 C) in core substrate 30.Has second opening (136B) diameter that becomes littler gradually to first surface from second surface to diminishing gradually of first surface from second surface.About the diameter of second opening, when cutting apart second opening by the plane that is parallel to first surface, if second opening is circular, the distance of then crossing the cross section is a diameter, and if second opening be oval-shaped, then main shaft is a diameter.
(130A forms the crystal seed layer of being made up of sputtered film 137 on the inwall of surface 130B) and through hole 136 at Copper Foil.Described crystal seed layer 137 is made up of copper.(136A 136B) diminishes gradually, and described crystal seed layer 137 easily forms by sputter because first and second openings.Yet crystal seed layer 137 can form by chemical plating.
Use and identical electroplating device 10, electroplate liquid 12, electro-plating method and the plating condition in manufacture method 1, described, on first and second surfaces of core substrate 30, form electroplating copper film 134.During this time, through hole 136 usefulness electroplating copper films 134 are filled (Fig. 8 E).Although the through hole 32 in the manufacture method 1 is rectilinear basically, the through hole 136 in this manufacture method 3 is hourglass shape.When thereby the formation through hole had identical diameter (diameter on the front and back at core substrate) in identical core substrate, the volume of hourglass shape through hole was less than the volume of linear through hole.Because this difference, the thickness of the electroplating film on the core substrate in manufacture method 3 tends to the thin thickness than the electroplating film on the substrate in manufacture method 1.So, can form meticulous galvanic circle by manufacture method 3.
With with manufacture method 1 in identical mode, on electroplating copper film 134, form etch-resistant coating.Subsequently, will expose electroplating film 134, sputtered film 137 and Copper Foil (30A, 30B) dissolving and the removal that stays by described etch-resistant coating.Therefore, form independently galvanic circle (134A) and via conductors 142 (Fig. 8 E).Then, can with manufacture method 1 in identical mode on core substrate, form combination layer.
＜the second embodiment 〉
With reference to Figure 10 and 11 electroplating device that is used for according to the method for fabricating printed wiring board of second embodiment of the invention is described.
Figure 11 is the schematic diagram that electroplating device 210 side views are shown, and Figure 10 illustrates the schematic diagram that is arranged in the conveying mechanism structure on electroplating device 210 electroplating baths one side.Electroplating device 210 is at the enterprising electroplating of used for flexible printed circuit board stripe shape substrate.In this electroplating device 210, at the enterprising electroplating of one side of the bar shaped substrate (230A) of pulling out from spool (298A), the bar shaped substrate that coiling 180mm is wide on described spool, 120m is long.Then, bar shaped substrate (230A) will be wrapped on the spool (298B).Described electroplating device 210 has the cylindric contact 220 of insulating properties that contacts with bar shaped substrate (230A) to be plated surface, prevent curling backboard 228 and the anode 204 of bar shaped substrate (230A) that caused by contact (insulator) 220.In anode 204, thereby hold copper ball 206 supplementation with copper composition in electroplate liquid.Electroplating bath 212 is the 20m length overall.Replace contact 220 to use insulating material, can also use the semiconductor interface contact.Contact 220 in second embodiment has and the insulator of describing in the first embodiment (20A, 20B) substantially the same function.
Described contact 220 uses to have height and forms as 200mm and the diameter cylindric hairbrush of being made by PVC (polyvinyl chloride) as 100mm.In contact 220, the tip of described hairbrush contacts with printed substrate and is crooked.Contact 220 supports by the support bar of being made by stainless steel (220A) and rotates by unshowned in the drawings gear.
The path and the galvanic circle of using electroplating device 210 to form filling described with reference to figure 12A-12E.Figure 12 A illustrates by substrate 230 and Copper Foil (33U, 33D) the double-sided copper-clad flexible base, board of Gou Chenging.On the one side of substrate 230, and use known electrophotographic method that Copper Foil (33U) is etched away from the zone that will form via conductor opening 37 dry film lamination that is obtained commercially.Copper Foil (33U) as mask, is formed via conductor opening 37 (referring to Figure 12 B) by the carbon dioxide gas volumetric laser.On the inwall of Copper Foil (33U) and via conductor opening 37, form plated film 34 (Figure 12 C), and then use the electroplating device 210 that is shown in Figure 10 to form electroplating film 36 (Figure 12 D).When contacting with at least a portion of print circuit board surface, the part of contact 220 forms electroplating film 36.In a single day contact 220 contacts with plated film 34 on the printed substrate at the initial point of electroplating, and forms electroplating film 36 and just contact with electroplating film 36.
According to second embodiment, electroplate liquid 12 contains copper sulphate, sulfuric acid and iron ion, as in the first embodiment.Compare with the film thickness that the electroplate liquid that does not contain the high concentration ferric ion by use obtains, because electroplate liquid 12 contains ferric ion, the thickness of the electroplating film 36 that forms on substrate surface is littler.In addition, owing to use contact 220 to form plated film 36, can use electroplating film 36 filling vias conductor openings.
The gravel size decision of contact is identical with the zone to be plated on the bar shaped substrate or greater than zone to be plated.Contact to be advanced the amount (at the tip of contact with after the surface of described printed substrate contacts, the amount that described tip will further push in) of printed substrate to be preferably and enter surperficial 1.0-15.0mm.If described amount is less than 1.0mm, the result is the same with the electro-plating method that does not use contact.If described amount surpasses 15.0mm, think that ferric ion is supplied to substrate surface will become difficult.In addition, contact tends to inlet passage conductor openings and via conductors opening, and thinks that thus the ferric ion concentration in opening raises.The preferred 2-8mm of push-in stroke.This is because the variation in plated film is rare.
About contact, can preferably use the contact that is selected among Flexible brush (flexible brushes) and the spatula (spatulas).Owing to be flexible, contact is followed concavo-convex on the substrate and can form the plated film with uniform thickness on convex-concave surface.
Can be with the resin brush as contact.In the case, bristle tips contacts with surface to be plated.Herein, the diameter of described bristle is preferably greater than the diameter of opening, and this is because described bristle tips can not enter opening and plated film suitably can be filled in the opening.About the resin hairbrush, can use for electroplate liquid to have PP, the PVC (polyvinyl chloride) of tolerance or PTFE (polytetrafluoroethylene) etc.In addition, about bristle tips, can also use resin fabric such as vinyl chloride fabric or non-woven.
＜manufacture method 4 〉
The method of fabricating printed wiring board (use, for example, Subtractive, protuberance method) that uses electroplating device according to second embodiment is described with reference to figure 12A-12E.Be called manufacture method 4 below the described method.
Preparation layer press strip type substrate (230A) is as raw material, wherein 9 μ m Copper Foils (33U) are laminated on the front (first surface) of the thick polyimides bar shaped substrate 230 of 25 μ m, and 12 μ m Copper Foils (33D) are laminated to the back side (second surface) upward (Figure 12 A).Copper Foil on second surface is covered with resist.The thickness of 9 μ m Copper Foils (33U) that will be on the front is adjusted into 7 μ m by photoengraving.Subsequently, on Copper Foil, carrying out black oxidation processing (black-oxide treatment) on the first surface.By from first surface side irradiating laser, form the via conductor opening 37 (Figure 12 B) that connects Copper Foil (33U) and the polyimides bar shaped substrate 230 and arrival Copper Foil (33D) back side.Then, palladium catalyst is attached to the surperficial (not shown in FIG.) of bar shaped substrate (230A).
The substrate that will have the catalyst that adheres to immerses by C.Uyemura Co., forms the thick plated films of 1.0 μ m (crystal seed layer) 34 (Figure 12 C) in the chemical plating fluid (Thru-Cup) that Ltd. makes and on the first surface of bar shaped substrate (230A).
Thereby purify degreasings with 50 ℃ of water, with 25 ℃ of water cleanings and after further with sulfuric acid purification, (230A) is immersed in the electrolysis tank that holds the electrolytic copper plating liquor with following composition with the bar shaped substrate.Use forms electroplating film 36 (Figure 12 D) under the following conditions with reference to the above-mentioned electroplating device 210 of Figure 10 on crystal seed layer 34.
The composition of＜electroplate liquid 〉
Sulfuric acid 0.5mol/L
Copper sulphate 0.8mol/L
Green vitriol (FeSO 47H 2O) 100g/L
Levelling agent 50mg/L
Polishing agent 50mg/L
Fe 2+∶Fe 3+ 1∶2-1∶4
＜plating condition 〉
Current density 5.0-30mA/cm 2
Time 10-90 minute
22 ± 2 ℃ of temperature
Preferably current density is set in 5.0-30mA/cm herein, 2, especially at 10mA/cm 2More than.Then, have the resist layer of predetermined pattern and carry out etching, form galvanic circle (42U) and galvanic circle (42D) (Figure 12 E) by on the two sides of bar shaped substrate, forming.This is so-called Subtractive or projection method.
＜manufacture method 5 〉
To change into following composition at the composition of the electroplate liquid in the manufacture method 3.Remaining is with identical in manufacture method 3.
The composition of＜electroplate liquid 〉
Sulfuric acid 0.5mol/L
Copper sulphate 0.8mol/L
Green vitriol (FeSO 47H 2O) 50g/L
Levelling agent 50mg/L
Polishing agent 50mg/L
Fe 2+∶Fe 3+ 1∶2-1∶4
＜manufacture method 6 〉
To change into following composition at the composition of the electroplate liquid in the manufacture method 3.Remaining is with identical in manufacture method 3.
The composition of＜electroplate liquid 〉
Sulfuric acid 0.5mol/L
Copper sulphate 0.8mol/L
Green vitriol (FeSO 47H 2O) 100g/L
Levelling agent 50mg/L
Polishing agent 50mg/L
Fe 2+∶Fe 3+ 1∶2-1∶4
When comparing manufacture method 5 and 6, the plated film that exposes by opening tends to depression in manufacture method 6.Think that this is because coating growth in opening is slow because the amount of the ferric ion in manufacture method 6 is bigger.If the concentration of iron ion is 1g/L-10g/L, the plated film that exposes by opening will demonstrate higher flatness feature.Therefore, on plated film, can easily form interlayer resin insulating layers.Iron ion in electroplate liquid is ferrous ion and ferric ion.If the ratio of the concentration of the ferrous ion in electroplate liquid and the concentration of ferric ion is 1: 2-1: in 4 the scope, will suppress plated film effectively and deposit on substrate surface.The thickness both of plated film tends to realize on filling opening and the reduction substrate surface.Green vitriol (FeSO 47H 2O) preferably be added into 1, in the 000mL electroplate liquid with the amount of 5-100g.If iron concentration in the scope of 1g/L-20g/L, can be used the plated film filling opening, be reduced in the thickness of plated film on the substrate simultaneously.
＜manufacture method 7 〉
To change into following composition at the composition of the electroplate liquid in the manufacture method 3.Remaining is with identical in manufacture method 3.
The composition of＜electroplate liquid 〉
Sulfuric acid 0.65mol/L
Copper sulphate 0.7mol/L
Green vitriol (FeSO 47H 2O) 50g/L
Levelling agent 50mg/L
Polishing agent 50mg/L
Fe 2+∶Fe 3+ 1∶2-1∶4
＜manufacture method 8 〉
To change into following composition at the composition of the electroplate liquid in the manufacture method 3.Remaining is with identical in manufacture method 3.
The composition of＜electroplate liquid 〉
Sulfuric acid 0.35mol/L
Copper sulphate 0.9mol/L
Green vitriol (FeSO 47H 2O) 50g/L
Levelling agent 50mg/L
Polishing agent 50mg/L
Fe 2+∶Fe 3+ 1∶2-1∶4
In embodiment of the present invention and embodiment, insulator contacts with surface to be plated, and described insulator is being electroplated when mobile with respect to surface to be plated.On the surface to be plated that contacts with insulator, the decreased growth of plated film.Think that being forced to property of iron ion ground supplies on the surface to be plated by insulator, causes the reduction reaction at lip-deep iron ion to be plated.Therefore, think and to suppress the growth of electroplating film.By relatively,,, on surface to be plated, tend to seldom take place the reduction reaction of iron ion because concentration gradient causes iron ion to be diffused on the surface to be plated in the discontiguous zone of insulator.Thus, think that the speed of growth of electroplating film will be faster.Therefore, electroplating film is grown sooner in via conductor opening and via conductors opening, but the to be plated lip-deep electroplating film that will be suppressed at except that opening becomes too thick.Promptly, via conductor opening and via conductors opening must be filled with electroplating film, and compare with the thickness of the electroplating film that forms in opening or compare with the thickness of galvanic circle in routine techniques, the plated film on surface to be plated (substrate surface) can form on relative thin ground.In embodiment of the present invention and embodiment, owing to thin plated film is patterned, therefore can be than under regular situation, more easily forming meticulousr galvanic circle.
Can in the scope that does not depart from purport of the present invention, freely change the order and the content of step in the above-described embodiment.In addition, according to using needs etc. can omit some step.For example, can also make correction based on the image drawing data beyond the vector data.
Conspicuous, be feasible according to above-mentioned instruction various improvement of the present invention and variation.Therefore should be understood that within the scope of the appended claims that the situation beyond the present invention specifically describes herein also is enforceable.

Claims (9)

1. the manufacture method of a printed substrate, it comprises:
In substrate, form opening;
The crystal seed layer that on the surface of the inwall of described opening and described substrate, is formed for electroplating;
The substrate that will have described crystal seed layer places electroplate liquid;
Insulator is placed described electroplate liquid;
Described substrate and described insulator are relative to each other moved to form electroplating film and fill described opening with described electroplating film on described substrate; With
On described substrate, form the galvanic circle,
Wherein said electroplate liquid comprises copper sulphate, sulfuric acid and iron ion.
2. method according to claim 1, the source of wherein said iron ion is a ferrous sulfate.
3. method according to claim 1, wherein said iron ion comprises ferrous ion and ferric ion, and the ratio of ferrous ion and ferric ion is 1: 2 to 1: 4 in described electrolyte.
4. method according to claim 2, wherein said ferrous sulfate are the FeSO that the concentration with 5-100g/L comprises 47H 2O.
5. method according to claim 1, wherein said insulator comprise the material that is selected from the group of being made up of long fibre, porous resin, fibrous resin and rubber.
6. method according to claim 1, wherein said insulator comprises porous ceramic or porous resin.
7. method according to claim 1, wherein said insulator comprises hairbrush, described hairbrush has the bristle that comprises resin.
8. method according to claim 1, wherein said insulator comprises resin fibre.
9. method according to claim 1, wherein said iron ion comprises with the concentration of 1g/L-20g/L.
CN2010102758576A 2009-09-04 2010-09-03 Method of manufacturing printed wiring board Pending CN102014589A (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US23999509P 2009-09-04 2009-09-04
US61/239,995 2009-09-04
US12/862,331 2010-08-24
US12/862,331 US20110056838A1 (en) 2009-09-04 2010-08-24 Method of manufacturing printed wiring board

Publications (1)

Publication Number Publication Date
CN102014589A true CN102014589A (en) 2011-04-13

Family

ID=43646852

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2010102758576A Pending CN102014589A (en) 2009-09-04 2010-09-03 Method of manufacturing printed wiring board

Country Status (5)

Country Link
US (1) US20110056838A1 (en)
JP (1) JP2011058093A (en)
KR (1) KR20110025612A (en)
CN (1) CN102014589A (en)
TW (1) TW201132263A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103456643A (en) * 2012-05-31 2013-12-18 富葵精密组件(深圳)有限公司 Ic carrier plate and manufacturing method thereof
CN108754555A (en) * 2018-08-29 2018-11-06 广东天承科技有限公司 A kind of electroplate liquid and its electro-plating method
CN110430674A (en) * 2019-07-10 2019-11-08 广东工业大学 A kind of preparation method of electroplating deposition circuit board

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8686300B2 (en) 2008-12-24 2014-04-01 Ibiden Co., Ltd. Printed wiring board and method for manufacturing the same
US8188380B2 (en) 2008-12-29 2012-05-29 Ibiden Co., Ltd. Printed wiring board and method for manufacturing printed wiring board
EP2475234A3 (en) * 2009-04-24 2012-09-19 Sumitomo Electric Industries, Ltd. Substrate for printed wiring board, printed wiring board, and methods for producing same
EP2518187A1 (en) * 2011-04-26 2012-10-31 Atotech Deutschland GmbH Aqueous acidic bath for electrolytic deposition of copper
CN103517583B (en) 2012-06-27 2016-09-28 富葵精密组件(深圳)有限公司 Multilayer circuit board and preparation method thereof
JP6329027B2 (en) * 2014-08-04 2018-05-23 ミネベアミツミ株式会社 Flexible printed circuit board
WO2021245766A1 (en) * 2020-06-02 2021-12-09 奥野製薬工業株式会社 Intermittent electroplating method

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1210363A (en) * 1997-08-28 1999-03-10 华通电脑股份有限公司 Method for automatically welding package of ball array integrated circuit by coil belt
CN1433256A (en) * 2002-01-18 2003-07-30 富士通株式会社 Printed circuit board and its making process
JP2004311919A (en) * 2003-02-21 2004-11-04 Shinko Electric Ind Co Ltd Through-hole filling method
CN1610486A (en) * 2003-05-07 2005-04-27 日东电工株式会社 Method for manufacturing wiring circuit substrate
CN1917158A (en) * 2005-08-17 2007-02-21 通用电气公司 Power semiconductor packaging method and structure
CN101027431A (en) * 2004-09-24 2007-08-29 揖斐电株式会社 Plating method and plating apparatus
CN101030033A (en) * 2007-03-30 2007-09-05 华东师范大学 Production of MEMS suspending structure by laminated photoetching glue victim layer
CN101341278A (en) * 2006-02-22 2009-01-07 揖斐电株式会社 Plating apparatus and method of plating
CN101416569A (en) * 2006-03-30 2009-04-22 埃托特克德国有限公司 Electrolytic method for filling holes and cavities with metals

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ATE282248T1 (en) * 1999-01-21 2004-11-15 Atotech Deutschland Gmbh METHOD FOR GALVANICALLY FORMING CONDUCTOR STRUCTURES FROM HIGH PURITY COPPER IN THE PRODUCTION OF INTEGRATED CIRCUITS
TW511408B (en) * 2000-09-18 2002-11-21 Nippon Denkai Kk Method of producing copper foil for fine wiring

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1210363A (en) * 1997-08-28 1999-03-10 华通电脑股份有限公司 Method for automatically welding package of ball array integrated circuit by coil belt
CN1433256A (en) * 2002-01-18 2003-07-30 富士通株式会社 Printed circuit board and its making process
JP2004311919A (en) * 2003-02-21 2004-11-04 Shinko Electric Ind Co Ltd Through-hole filling method
CN1610486A (en) * 2003-05-07 2005-04-27 日东电工株式会社 Method for manufacturing wiring circuit substrate
CN101027431A (en) * 2004-09-24 2007-08-29 揖斐电株式会社 Plating method and plating apparatus
CN1917158A (en) * 2005-08-17 2007-02-21 通用电气公司 Power semiconductor packaging method and structure
CN101341278A (en) * 2006-02-22 2009-01-07 揖斐电株式会社 Plating apparatus and method of plating
CN101416569A (en) * 2006-03-30 2009-04-22 埃托特克德国有限公司 Electrolytic method for filling holes and cavities with metals
CN101030033A (en) * 2007-03-30 2007-09-05 华东师范大学 Production of MEMS suspending structure by laminated photoetching glue victim layer

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103456643A (en) * 2012-05-31 2013-12-18 富葵精密组件(深圳)有限公司 Ic carrier plate and manufacturing method thereof
CN108754555A (en) * 2018-08-29 2018-11-06 广东天承科技有限公司 A kind of electroplate liquid and its electro-plating method
WO2020042613A1 (en) * 2018-08-29 2020-03-05 广东天承科技有限公司 Electroplating solution and electroplating method employing same
CN108754555B (en) * 2018-08-29 2020-04-28 广东天承科技有限公司 Electroplating solution and electroplating method thereof
CN110430674A (en) * 2019-07-10 2019-11-08 广东工业大学 A kind of preparation method of electroplating deposition circuit board

Also Published As

Publication number Publication date
JP2011058093A (en) 2011-03-24
US20110056838A1 (en) 2011-03-10
KR20110025612A (en) 2011-03-10
TW201132263A (en) 2011-09-16

Similar Documents

Publication Publication Date Title
CN102014589A (en) Method of manufacturing printed wiring board
EP2796019A1 (en) Method for combined through-hole plating and via filling
JP2007224347A (en) Plating apparatus and plating method
US20220304164A1 (en) Manufacturing sequences for high density interconnect printed circuit boards and a high density interconnect printed circuit board
JP3250994B2 (en) Electrolytic copper foil
JP2005093934A (en) Filling method into through-hole
JP2005019577A (en) Method for manufacturing tape carrier for semiconductor device
Yin et al. Effect of PEG molecular weight on bottom-up filling of copper electrodeposition for PCB interconnects
TWI683931B (en) Anode for electrolytic copper plating and electrolytic copper plating device using the same
JP2009252952A (en) Copper charge plating method and printed circuit board manufactured by the method
JP2009167506A (en) Acid copper electroplating solution and method for producing fine wiring circuit using the same
JP5146774B2 (en) Two-layer plated substrate and method for manufacturing the same
US20220279662A1 (en) Method of preparing a high density interconnect printed circuit board including microvias filled with copper
KR100828239B1 (en) Apparatus for manufacturing metal thin film having multi-layer surface
JP2006339483A (en) Wiring board and manufacturing method thereof
JP5502967B2 (en) Acid electrolytic copper plating solution
KR101224034B1 (en) Copper foil for printed circuit and Fabrication method thereof
JP2008218540A (en) Manufacturing method for wiring board
KR102504286B1 (en) Surface treated copper foil and Method for producing the same
KR20120123237A (en) Method for manufacturing printed wiring board
KR102686710B1 (en) Method for fabricating circuit pattern of substrate using metal foil having low surface roughness
JP2005217052A (en) Wiring board and method for manufacturing same
JPWO2021032775A5 (en)
TW200532058A (en) Composition for copper electroplating solution
KR20230080171A (en) Method for fabricating circuit pattern of substrate using metal foil having low surface roughness

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C02 Deemed withdrawal of patent application after publication (patent law 2001)
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20110413