JP2011041121A5 - 送受信装置 - Google Patents
送受信装置 Download PDFInfo
- Publication number
- JP2011041121A5 JP2011041121A5 JP2009188352A JP2009188352A JP2011041121A5 JP 2011041121 A5 JP2011041121 A5 JP 2011041121A5 JP 2009188352 A JP2009188352 A JP 2009188352A JP 2009188352 A JP2009188352 A JP 2009188352A JP 2011041121 A5 JP2011041121 A5 JP 2011041121A5
- Authority
- JP
- Japan
- Prior art keywords
- clock
- frequency
- signal
- pll circuit
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 230000005540 biological transmission Effects 0.000 claims 2
- 238000011084 recovery Methods 0.000 claims 2
- 239000000284 extract Substances 0.000 claims 1
Claims (1)
- クロックデータリカバリ回路と、デシリアライザと、シリアライザと、PLL回路と、周波数検出器とを具備して、
前記クロックデータリカバリ回路は受信信号と前記PLL回路から生成されるクロック信号とに応答して、再生クロックと再生データとを抽出するものであり、
シリアル・パラレル変換器としての前記デシリアライザは、前記再生クロックと前記再生データとからパラレル受信データを生成するものであり、
パラレル・シリアル変換器としての前記シリアライザは、パラレル送信データと前記PLL回路から生成される前記クロック信号とからシリアル送信信号を生成するものであり、
前記周波数検出器は前記受信信号の周波数と前記クロック信号の周波数との差を検出することによって、前記PLL回路に供給される周波数制御信号を生成するものであり、
前記周波数制御信号に応答して前記受信信号の前記周波数と前記クロック信号の前記周波数との前記差を低減するように、前記PLL回路は前記クロック信号の周期を制御する
ことを特徴とする送受信装置。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009188352A JP2011041121A (ja) | 2009-08-17 | 2009-08-17 | 送受信装置およびその動作方法 |
TW099122180A TW201138318A (en) | 2009-08-17 | 2010-07-06 | Transceiver and operating method thereof |
US12/843,926 US20110037505A1 (en) | 2009-08-17 | 2010-07-27 | Transceiver and operating method thereof |
CN2010102435777A CN101997629A (zh) | 2009-08-17 | 2010-07-30 | 发送接收装置及其工作方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009188352A JP2011041121A (ja) | 2009-08-17 | 2009-08-17 | 送受信装置およびその動作方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2011041121A JP2011041121A (ja) | 2011-02-24 |
JP2011041121A5 true JP2011041121A5 (ja) | 2012-06-07 |
Family
ID=43588226
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2009188352A Withdrawn JP2011041121A (ja) | 2009-08-17 | 2009-08-17 | 送受信装置およびその動作方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US20110037505A1 (ja) |
JP (1) | JP2011041121A (ja) |
CN (1) | CN101997629A (ja) |
TW (1) | TW201138318A (ja) |
Families Citing this family (31)
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US8689253B2 (en) * | 2006-03-03 | 2014-04-01 | Sharp Laboratories Of America, Inc. | Method and system for configuring media-playing sets |
US8971430B2 (en) * | 2010-05-25 | 2015-03-03 | Kyocera Corporation | Receiving device, base station and wireless communication terminal |
JP5792582B2 (ja) | 2011-10-17 | 2015-10-14 | ルネサスエレクトロニクス株式会社 | 半導体装置、受信機、送信機、送受信機及び通信システム |
JP5926125B2 (ja) | 2012-06-08 | 2016-05-25 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
CN102801411A (zh) * | 2012-07-25 | 2012-11-28 | 苏州亮智科技有限公司 | 高速输入输出接口的接收电路 |
US8810299B2 (en) * | 2012-10-09 | 2014-08-19 | Altera Corporation | Signal flow control through clock signal rate adjustments |
US9265458B2 (en) | 2012-12-04 | 2016-02-23 | Sync-Think, Inc. | Application of smooth pursuit cognitive testing paradigms to clinical drug development |
US8832338B2 (en) * | 2013-01-08 | 2014-09-09 | Silicon Image, Inc. | Mechanism for facilitating dynamic timestamp-less clock generation for transmitting media streams over shared channels |
US9380976B2 (en) | 2013-03-11 | 2016-07-05 | Sync-Think, Inc. | Optical neuroinformatics |
US9166605B2 (en) * | 2013-03-18 | 2015-10-20 | Terasquare Co., Ltd. | Low-power and all-digital phase interpolator-based clock and data recovery architecture |
JP6209065B2 (ja) * | 2013-11-15 | 2017-10-04 | シナプティクス・ジャパン合同会社 | 通信装置および双方向通信システム |
JP6703364B2 (ja) * | 2014-04-10 | 2020-06-03 | ザインエレクトロニクス株式会社 | 受信装置 |
TWI533608B (zh) * | 2014-06-30 | 2016-05-11 | 友達光電股份有限公司 | 資料接收器及資料接收方法 |
US9792247B2 (en) * | 2014-07-18 | 2017-10-17 | Qualcomm Incorporated | Systems and methods for chip to chip communication |
TWI551082B (zh) * | 2014-12-26 | 2016-09-21 | Intelligent transmission system with automatic measurement function and its measurement method | |
KR20170008077A (ko) * | 2015-07-13 | 2017-01-23 | 에스케이하이닉스 주식회사 | 고속 통신을 위한 인터페이스 회로 및 이를 포함하는 시스템 |
US9338041B1 (en) * | 2015-07-24 | 2016-05-10 | Tm Ip Holdings, Llc | Extracting carrier signals from modulated signals |
US9338042B1 (en) | 2015-07-27 | 2016-05-10 | Tm Ip Holdings, Llc | Separating and extracting modulated signals |
US10641881B2 (en) | 2015-08-28 | 2020-05-05 | Aptiv Technologies Limited | Bi-static radar system |
CN106526582B (zh) * | 2015-08-28 | 2022-10-04 | 安波福技术有限公司 | 双基地雷达系统 |
FR3053860A1 (fr) * | 2016-07-06 | 2018-01-12 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Procede et dispositif pour ameliorer la synchronisation dans une liaison de communication |
US11580373B2 (en) * | 2017-01-20 | 2023-02-14 | International Business Machines Corporation | System, method and article of manufacture for synchronization-free transmittal of neuron values in a hardware artificial neural networks |
CN107064591A (zh) * | 2017-03-21 | 2017-08-18 | 北京晓程科技股份有限公司 | 新型数字互感隔离装置 |
WO2019193670A1 (ja) * | 2018-04-04 | 2019-10-10 | オリンパス株式会社 | 撮像システムおよび内視鏡システム |
US10686375B1 (en) * | 2019-01-31 | 2020-06-16 | Texas Instruments Incorporated | Power conversion with modulated switching |
JP7224637B2 (ja) * | 2019-03-28 | 2023-02-20 | ザインエレクトロニクス株式会社 | 送信装置、受信装置、送受信装置および送受信システム |
US10892794B1 (en) * | 2020-02-06 | 2021-01-12 | Global Unichip Corporation | Multi-channel transmission device |
US11784651B2 (en) * | 2021-10-27 | 2023-10-10 | Nxp B.V. | Circuitry and methods for fractional division of high-frequency clock signals |
US11764795B2 (en) | 2021-11-29 | 2023-09-19 | Qualcomm Incorporated | Fractional phase locked loop (PLL) with digital control driven by clock with higher frequency than PLL feedback signal |
US11870347B2 (en) | 2022-01-28 | 2024-01-09 | Texas Instruments Incorporated | Spread spectrum modulation of rising and falling edge delays for current mode switching converters |
CN117353765B (zh) * | 2023-12-06 | 2024-04-02 | 杭州长川科技股份有限公司 | 信号发送装置、测试机和测试机信号输出方法 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6650140B2 (en) * | 2001-03-19 | 2003-11-18 | Altera Corporation | Programmable logic device with high speed serial interface circuitry |
US7133648B1 (en) * | 2003-06-03 | 2006-11-07 | Xilinx, Inc. | Bidirectional multi-gigabit transceiver |
JP2008235985A (ja) * | 2007-03-16 | 2008-10-02 | Ricoh Co Ltd | クロックデータリカバリー回路及び通信装置 |
-
2009
- 2009-08-17 JP JP2009188352A patent/JP2011041121A/ja not_active Withdrawn
-
2010
- 2010-07-06 TW TW099122180A patent/TW201138318A/zh unknown
- 2010-07-27 US US12/843,926 patent/US20110037505A1/en not_active Abandoned
- 2010-07-30 CN CN2010102435777A patent/CN101997629A/zh active Pending
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