JP2011009750A - 集積回路構造を形成する方法 - Google Patents

集積回路構造を形成する方法 Download PDF

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Publication number
JP2011009750A
JP2011009750A JP2010145180A JP2010145180A JP2011009750A JP 2011009750 A JP2011009750 A JP 2011009750A JP 2010145180 A JP2010145180 A JP 2010145180A JP 2010145180 A JP2010145180 A JP 2010145180A JP 2011009750 A JP2011009750 A JP 2011009750A
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notch
wafer
semiconductor wafer
carrier wafer
carrier
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JP5504070B2 (ja
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Hon-Lin Huang
宏麟 黄
Chin-Wen Hsiao
景文 蕭
Kuo-Ching Hsu
國經 許
Chen-Shien Chen
承先 陳
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Abstract

【課題】 裏面相互接続構造と製造方法を提供する。
【解決手段】 集積回路構造を形成する方法であって、前記方法は、半導体ウエハの端から前記半導体ウエハの中に延びる第１ノッチを含む半導体ウエハを提供するステップ、及び前記半導体ウエハの上に、第２ノッチを含むキャリアウエハを設置するステップを含み、前記キャリアウエハを設置するステップは、前記第１ノッチの少なくとも一部を前記第２ノッチの少なくとも一部と重ねる方法である。
【選択図】 図５Ｂ

Description

本発明は、集積回路構造に関し、特に、シリコン貫通ビアに関し、更に特に、ウエハの裏面（backside）上で、シリコン貫通ビアに接続された相互接続構造を形成することに関するものである。
集積回路の発明以来、半導体産業は、さまざまな電子構成要素（例えば、トランジスタ、ダイオード、抵抗器、コンデンサなど）の集積密度の継続的な改善により、急成長を遂げてきた。ほとんどの場合、集積密度のこの改善は、より多くの構成要素が所定の領域に集積されるように、最小加工寸法（minimum feature size）の度重なる縮小により、もたらされたものである。
これらの集積密度の改善は、実際には、基本的に二次元（２D）に関するものであり、集積された構成要素によって占められる体積は、基本的に半導体ウエハの表面にある。リソグラフィーの劇的な向上は、２Ｄ集積回路の形成に大幅な改善をもたらしたが、２次元で達成することができる密度には、物理的な制限がある。これらの制限の１つは、これらの構成要素を作製するのに必要な最小サイズである。また、１つのチップに入れるデバイスが多ければ多いほど、複雑な設計が必要となる。
もう１つの制限は、デバイスの数の増加に伴ってデバイス間の相互接続の数と長さが大きく増加することである。相互接続の数と長さが増加した時、回路のＲＣ遅延と電力消費の両方が増加する。
上述の制限を解決する取り組みには、３次元集積回路（3DICs）の使用が含まれ、スタックダイが一般的に用いられる。よってシリコン貫通ビア（TSVs）は、３DICｓとスタックダイに用いられる。この場合、シリコン貫通ビアは、ダイ上の集積回路をダイの裏面側へ接続するのにしばしば用いられる。また、シリコン貫通ビアは、ダイの裏面を通して集積回路を接地する短い接地経路（short grounding paths）を提供するのに用いられ、接地した金属膜（grounded metallic film）によって覆われることができる。
裏面シリコン貫通ビア接続（backside TSV connections）の従来の形成方法は、欠点を有する。裏面相互接続構造の製造の中間段階の断面図を示す図１を参照すると、シリコンウエハ１００は、シリコン貫通ビア１０２を含む。シリコンウエハ１００は、接着剤１０６によってキャリアウエハ（carrier wafer）１０４の上に設置される。バンプ下地金属（Under-bump metallurgy；UBM）１０８は、シリコンウエハ１００の上に堆積される。キャリアウエハ１０４は、一般的にシリコンウエハ１００より大きいため、バンプ下地金属１０８はキャリアウエハ１０４の上にも堆積される。キャリアウエハ１０４が、ベベル領域（beveled areas）１１０を有するため、バンプ下地金属１０８はベベル領域１１０上に堆積した部分を含み、バンプ下地金属１０８のこれらの部分は、傷（scratching）がつきやすく、剥離（peeling）し易い。製造プロセスでは、図１に示された構造は、ロボットによって固定されるか、または移送されることがある。ベベル領域１１０上のバンプ下地金属１０８の部分がクランプまたはロボットによって固定または接触された場合、粒子が落ち、ウエハを汚染してしまうおそれがある。
もう１つの問題は、ノッチ（notch）を探す難しさである。図２Aは、図１に示された構造の上面図を示している。ノッチ１１２は、位置合わせの目的のために形成される。図２Bは、図２Aに示された構造の断面図を示しており、その断面図は、図２Aの切断線２B‐２Bに沿った断面を示している。バンプ下地金属１０８がノッチ１１２によって露出されたキャリアウエハ１０４の部分の上にも堆積していることに気づかされる。バンプ下地金属１０８は、透明でないため、ステッパー（photo stepper）などの機器は、しばしばノッチ１１２を見つけることができず、よって次のプロセスのための位置合わせを行うことができない。
裏面シリコン貫通ビア接続を形成するには、図１に示された構造がチャンバ内に配置されて、静電チャック（electrostatic chuck；ESC または E-Chuck）によって固定される必要がある。しかし、キャリアウエハ１０４は、一般的にガラスで形成されており、静電チャック上にしっかりと固定されることができない。これは、ガラスの不十分な可動イオンに一部起因している。よって、上述の問題を克服する裏面相互接続構造と製造方法が必要である。
裏面相互接続構造と製造方法を提供する。
実施例の一態様に基づけば、集積回路構造は、半導体ウエハの端から半導体ウエハの中に延びる第１ノッチを含む半導体ウエハを含む。キャリアウエハは、半導体ウエハの上に設置される。キャリアウエハは、第１ノッチの少なくとも一部と重なる第２ノッチを有する。半導体ウエハに面したキャリアウエハの一面は、キャリアウエハの端面と鋭角を形成する。キャリアウエハ１６は、1x108 Ohm-cmより低い抵抗率を有する。
他の実施例も述べられる。
本発明の特徴は、より確実な位置合わせ、低減された粒子の発生と、キャリアウエハを静電チャックに固定する改善能力を含む。
キャリアウエハのベベル領域にバンプ下地金属層が堆積されている、裏面相互接続構造を製造する中間段階の断面図である。 ノッチがシリコンウエハに形成されている、キャリアウエハの上に設置されたシリコンウエハの上面図である。 図２Aに示された構造の断面図である。 実施例に基づいた相互接続構造を製造する中間段階の断面図である。 実施例に用いられるウエハの上面図である。 実施例に用いられるキャリアウエハの上面図である。 図４Ａに示すキャリアウエハの断面図である。 図３Ａの後に続く工程を説明するための断面図である。 図５Ａに示す構造の上面図である。 図５Ａに示す構造の他の例を示す上面図である。 図５Ａに示す構造のさらに他の例を示す上面図である。 図５Ａに示す構造に生じ得る反りの一例を示す図である。 図５Ａに示す構造に生じ得る反りの他の例を示す図である。 図５Ａの後に続く工程を説明するための断面図である。 図６の後に続く工程を説明するための断面図である。 図７Ａに示された構造の端部を示す側面図である。 図７Ａの後に続く工程を説明するための断面図である。 図８の後に続く工程を説明するための断面図である。 図９の後に続く工程を説明するための断面図である。 図１０の後に続く工程を説明するための断面図である。 図１１の後に続く工程を説明するための断面図である。
本発明についての目的、特徴、長所が一層明確に理解されるよう、以下に実施形態を例示し、図面を参照にしながら、詳細に説明する。
シリコン貫通ビア（TSVs、半導体貫通ビア（through-semiconductor vias）としても知られている）に接続される新規的な裏面相互接続構造を形成する方法が提供される。実施例の製造における中間段階が例示される。各図と実施例中、同一の参照番号が同一の素子を示すのに用いられる。
図３Aを参照すると、基板１０を含むウエハ２が提供（用意）される。基板１０は、例えばバルクシリコン基板などの半導体基板であってよいが、例えばIII族、IV族、及び／またはＶ族元素などの他の半導体材料を含むこともできる。例えばトランジスタ（ブロック４によって表示される）などの集積回路デバイスは、基板１０の表面（図３Aの上に向いた表面）に形成されることができる。内部に形成された金属線とビア（図示せず）を含む相互接続構造１２は、基板１０上に形成され、集積回路デバイスに接続されることができる。金属線とビアは、銅、または銅合金で形成することができ、周知のダマシンプロセスを用いて形成することができる。相互接続構造１２は、一般的に知られた層間誘電体（ILDs）と金属間誘電体（IMDs）を含むことができる。
シリコン貫通ビア２０は、基板１０に形成され、基板１０の表面（図３Aの上に向いた表面）から基板１０の中に延伸する。図３Aに示されるように、実施例１では、シリコン貫通ビア２０は、ビアファースト法を用いて形成され、底部金属化層（M1として一般的に知られている）の形成の前に形成される。よって、シリコン貫通ビア２０は、相互接続構造１２の金属間誘電体の中に延伸せず、アクティブ素子を覆うように用いられる層間誘電体内にのみ延伸する。もう１つの実施例では（図示せず）、シリコン貫通ビア２０は、ビアラスト法を用いて形成され、相互接続構造１２の形成後に形成される。よって、シリコン貫通ビア２０は、基板１０と相互接続構造１２の両方を貫く。絶縁層２２は、シリコン貫通ビア２０の側壁上に形成され、シリコン貫通ビア２０を基板１０から電気的に絶縁する。絶縁層２２は、例えば窒化ケイ素、酸化ケイ素（例えば、テトラメチル水酸化アンモニウム（TEOS）酸化物）と、その同類の一般的に用いられる誘電体材料で形成することができる。
図３Bは、ウエハ２の上面図を示しており、ノッチ１５がウエハに形成されているのを示している。ノッチ１５は、ウエハ２の１つの表面から反対の表面（両表面が平面である）に達することができる。また、ノッチ１５は、ウエハ２の端からウエハ２の中に（中心側へ）延びる。実施例では、ノッチ１５は、上面図において三角形を有する。他の実施例では、ノッチ１５は、上面図において例えば長方形などの他の形状を有することができる。
図４Ａは、キャリアウエハ（時にキャリア基板と呼ばれる）１６の上面図を示している。キャリアウエハ１６は、ガラス、シリコン、ガラスセラミック、及びその同類のものなどで形成することができる。実施例では、キャリアウエハ１６は、約1x108 Ohm-cmより低い抵抗率を有する。抵抗率は、約1x106 Ohm-cmより低い、または更には約1x103 Ohm-cmより低いことができる。これは例えばキャリアウエハ１６の製造で、例えばNa、K、Al、またはその同類の可動イオンを適当な濃度にドーピングすることで達成されることができる。続くプロセスでキャリアウエハ１６の抵抗率を減少させることで、キャリアウエハ１６はより確実に静電チャックに固定されることができる。
キャリアウエハ１６はまた、ノッチ１７を含み、ノッチ１７は、キャリアウエハ１６の１つの表面から反対側（両表面が平面である）に達することができる。ある実施例では、キャリアウエハ１６の直径D2は、ウエハ２の直径D1より大きい。またキャリアウエハ１６の中心C2からノッチ１７の距離S2は、ウエハ２（図３Bを参照）の半径R1より小さい。距離S2は、ウエハ２の中心C1からノッチ１５の最接近点までの距離S1より大きい、距離S1と等しい、または距離S1より小さいこともできる。
図４Bは、キャリアウエハ１６の断面図を示している。好ましくは、上部角１９（点線を用いて表された、後に続いて接着されるウエハ２に面した側）は、ベベル領域のないシャープな輪郭（sharp profile）を有する。言い換えれば、キャリアウエハ１６の一面（図の上面）は、キャリアウエハ１６の端面（周面）と鋭角（ここでは９０度を含み、例えば９０度）を形成する。
図５Aを参照すると、ボンドパッド１４は、ウエハ２の表面の前側（図５Aの上に向いた側）に形成され、ウエハ２の表面から突き出ている。続いてウエハ２は、接着剤１８によってキャリアウエハ１６の上（図では下側）に設置される。好ましくは接着の後、ウエハ２とキャリアウエハ１６を含む結合構造の反りW（図５Eと図５Fを参照）は、約２０μmより小さいか、または更には約１μmより小さい。図５Eは、反りWの実例１を示している。図５Fに表されるように、反りWは、反対方向に生じることもあることがわかる。反りWの低減は、ガラスの平坦度または接着剤の制御によって達成されることができる。
図５Bは、図５Aに表された構造の上面図を示している。１つの実施例では、図５Bに示されるように、ノッチ１７の一部は、ノッチ１５の全体と重なり、ウエハ２の下に延びることができる。もう１つの実施例では、図５Cに示すように、ノッチ１７の端はノッチ１５の端に位置合わせされる。もう１つの実施例では、図５Dに示されるように、ノッチ１７の全体は、ノッチ１５の一部に重なる。
図６では、裏面研磨（backside grinding）が基板１０の余分な部分を除去するのに行われる。化学機械研磨（CMP）がウエハ２の裏面（図の上側）に対して行われ、シリコン貫通ビア２０が露出する。裏面絶縁層２４は、基板１０の裏面を覆うように形成される。模範的な実施例では、裏面絶縁層２４の形成は、基板１０の裏面のエッチバック、裏面絶縁層２４のブランケット形成と、シリコン貫通ビア２０の直上の裏面絶縁層２４の部分を除去する軽い化学機械研磨の実行を含む。よって、シリコン貫通ビア２０は、裏面絶縁層２４の開口によって露出する。もう１つの実施例では、シリコン貫通ビア２０を露出させた裏面絶縁層２４の開口は、エッチングによって形成される。ウエハ２は、複数のシリコン貫通ビア２０を含むことができるため、反りの低減は、シリコン貫通ビアの一部が露出せず、あるいは一部が露出過剰とならずに、ウエハ２のシリコン貫通ビア２０を全体的に均一に露出させることになる。
図７Aを参照すると、シード層２６は、バンプ下地金属（UBM）２６としても知られ、裏面絶縁層２４とシリコン貫通ビア２０上にブランケット形成される。バンプ下地金属２６は、スパッタリングまたは他の適当な方法によって形成することができる。バンプ下地金属２６に用いることができる材料は、銅、または銅合金を含む。しかし、例えば銀、金、アルミニウム、あるいはその組み合わせなどの他の金属も含めることができる。
図７Bは、図７Aに表された構造の端部を示している。簡単にするために、バンプ下地金属２６、ウエハ２、接着層１８、キャリアウエハ１６のみが示され、他の要素は示されない。キャリアウエハ１６のノッチ１７がウエハ２のノッチ１５の下方に形成されているため、バンプ下地金属２６がキャリアウエハ１６上に堆積して、ノッチ１５によって露出することはないことがわかる。よって、例えばステッパーなどの後に続くプロセスを行う機器は、より容易にノッチ１５を見つけることができ、より信頼できるプロセスとなることがわかる。
図７Aはまたマスク４６の形成を示している。ある実施例では、マスク４６は、フォトレジストである。またはマスク４６は、ドライフィルムで形成され、例えばAjinomoto Build-up Film（ABF）などのように有機材料を含むことができる。続いて、マスク４６がパターン化され、マスク４６に開口５０を形成し、シリコン貫通ビア２０（とバンプ下地金属２６の被覆部分）が開口５０によって露出する。キャリアウエハ１６に切り欠き（ノッチ１７）が設けられていることから、マスク４６のパターンニングでより正確な位置合わせを行うことができる。
図８では、図７Aに表された開口５０は、金属材料で選択的に充填され、開口５０に再配線（redistribution line；RDL）５２が形成される。好ましい実施例では、充填材料は、銅または銅合金を含むが、例えばアルミニウム、銀、金、またはその組み合わせなどの他の金属も用いることができる。形成方法は、電気化学めっき（ECP）や、無電解めっき、または例えばスパッタリング、印刷、化学蒸着（CVD）法などその他の一般的に用いられる堆積法を含むことができる。続いてマスク４６が除去される。よって、マスク４６の下方のバンプ下地金属２６の一部分が露出する。
図９を参照すると、バンプ下地金属２６の露出した部分は、フラッシュエッチングによって除去される。残りの再配線５２は、シリコン貫通ビア２０の真上の部分でシリコン貫通ビア２０に接続された部分を含む再配線ストリップ（strip）（redistribution traceともいわれる）５２１と、再配線ストリップ５２１に選択的に接続するパッド５２２を含むことができる。図９と後に続く図では、バンプ下地金属２６は、再配線５２と類似の材料で一般的に形成されることから表示されず、再配線５２と一体に表示される。フラッシュエッチングの結果として、再配線５２も薄く除去される。しかし、再配線５２の除去された部分は、その全体的な厚さに比べ、わずかである。
次に、図１０に示されるように、保護層５６は、ブランケット形成され、パターン化されて開口５８を形成する。保護層５６は、窒化物、酸化物、ポリイミドなどで形成されることができる。フォトレジスト６０が塗布され、現像されて開口５８のパターンを画定する。パッド５２２の一部分は、保護層５６の開口５８によって露出する。開口５８は、パッド５２２の中心部分に位置することができる。再配線ストリップ５２１は、保護層５６によって覆われ続けることができる。
次に、図１１に示されるように、フォトレジスト６０が除去され、銅ピラー６４とバリア層６６を含むボンディングパッドが形成される。ある実施例では、フォトレジスト６３が形成される。フォトレジスト６３は、フォトレジスト６０より厚いことが望ましい。ある実施例では、フォトレジスト６３の厚さは、約２０μmより大きいか、または更には約６０μmより大きい。フォトレジスト６３は、パターン化され、開口６５を形成し、開口６５によってパッド５２２が露出する。次に、銅ピラー６４は、電気めっきによって開口６５から開始して形成される。銅ピラー６４は、銅、及び／または他の金属、例えば銀、金、タングステン、アルミニウム、あるいはそれらの組み合わせ、を含むことができる。ニッケルで形成することができるバリア層６６は、銅ピラー６４の上に形成することができ、はんだ６８は、障壁層６６の上に形成することができる。
図１２を参照すると、フォトレジスト６３が除去される。続いてキャリアウエハ１６をウエハ２から取り外すことができる。図１１に表されるような構造は、例えばチップ／ウエハ８０のような他のチップまたはウエハに接合することができる。模範的な実施例では、チップ／ウエハ８０は、その表面（図の下側）上に銅ポスト（copper post）８６とバリア層８４を有し、はんだ６８は、ウエハ２とチップ／ウエハ８０にリフロー接合されることができる。アンダーフィル９０は、ウエハ２とチップ／ウエハ８０の間に充填されることができる。もう１つの実施例では、ウエハ２は、他のチップ／ウエハに接合される前にチップに分割されることができる。もう１つの実施例では、キャリアウエハ１６の取り外しは、ウエハ２がチップ／ウエハ８０上に接合された後に行われることができる。
上述した実施例では、シリコン貫通ビアの裏面相互接続構造は、実施例の概念を説明する例として用いられる。実施例の概念は、例えばウエハ対ウエハボンディングプロセスなどのキャリアウエハを含む全ての他の製造プロセスに用いることができる。
実施例は、いくつかの特徴を有する。キャリアウエハにノッチを形成することで、半導体ウエハのノッチによって露出するキャリアウエハの部分に堆積するバンプ下地金属がない。よってより信頼できる位置合わせが行える。ベベル領域を有さないキャリアウエハの角により、バンプ下地金属の剥離が減少する。また、キャリアウエハの減少した抵抗率により、キャリアウエハは、静電チャックにより確実に固定できる。
以上、本発明の好適な実施例を例示したが、これは本発明を限定するものではなく、本発明の精神及び範囲を逸脱しない限りにおいては、当業者であれば行い得る変更や修飾を付加することが可能である。従って、本発明が請求する保護範囲は、特許請求の範囲を基準とする。また、本発明の範囲は、説明書に説明された特定の実施例のプロセス、機器、製造、物質組成、装置、方法とステップに限定されるものではない。当業者は、本発明の掲示内容にしたがい、現存する、または後に開発されるプロセス、機器、製造、物質組成、装置、方法とステップが、ここに記述される実施例に基づいて実質的に同様の機能または実質的に同様の結果を達成するならば、本発明中に用いることができる。よって、本発明の範囲は、上述のプロセス、機器、製造、物質組成、装置、方法とステップを含む。また、各特許請求の範囲は個別の実施例を構成し、本発明の範囲も各特許請求の範囲と実施例の組み合わせを含む。
２ ウエハ
４ トランジスタ
１０ 基板
１２ 相互接続構造
１４ パッド
１５、１７ ノッチ
１６ キャリアウエハ
１８ 接着剤
１９ 角
２０ シリコン貫通ビア
２２、２４ 絶縁層
２６ シード層（バンプ下地金属）
４６ マスク
５０、５８、６５ 開口
５２ 再配線
５２１ 再分布線ストリップ
５２２ パッド
５６ 保護層
６０、６３ フォトレジスト
６４、８６ 銅ピラー
６６、８４ 障壁層
６８ はんだ
８０ チップ／ウエハ
９０ アンダーフィル
１００ シリコンウエハ
１０２ シリコン貫通ビア
１０４ キャリアウエハ
１０６ 接着剤
１０８ バンプ下地金属
１１０ ベベル領域
１１２ ノッチ
C1、C2 中心
D1、D2 直径
R1 半径
S1、S2 距離
W 反り

Claims (12)

  1. 集積回路構造を形成する方法であって、前記方法は、
    半導体ウエハの端から前記半導体ウエハの中に延びる第１ノッチを含む半導体ウエハを提供するステップ、及び
    前記半導体ウエハの上に、第２ノッチを含むキャリアウエハを設置するステップを含み、前記キャリアウエハを設置するステップは、前記第１ノッチの少なくとも一部を前記第２ノッチの少なくとも一部と重ねる方法。
  2. 前記半導体ウエハは、前記半導体ウエハの中に延伸するシリコン貫通ビアを含み、前記方法は、
    前記キャリアウエハの設置ステップ後、前記半導体ウエハの裏面を研磨して前記シリコン貫通ビアを露出させるステップ、及び
    前記半導体ウエハの裏面上に導電層を堆積し、前記シリコン貫通ビアに電気的に接続するステップを更に含む請求項１に記載の方法。
  3. 前記第２ノッチは、前記キャリアウエハの端から前記キャリアウエハの中に延びる請求項１に記載の方法。
  4. 前記キャリアウエハの設置ステップは、前記第２ノッチの端を前記第１ノッチの端に位置合わせするステップを含む請求項１に記載の方法。
  5. 前記第２ノッチの全体より小さい前記第２ノッチの一部は、前記第１ノッチの全体と重なる請求項１に記載の方法。
  6. 前記第１ノッチの全体より小さい前記第１ノッチの一部は、前記第２ノッチの全体と重なる請求項１に記載の方法。
  7. 集積回路構造を形成する方法であって、前記方法は、
    半導体ウエハを提供するステップ、及び
    前記半導体ウエハの上に、キャリアウエハを設置するステップを含み、前記半導体ウエハに面した前記キャリアウエハの一面は、前記キャリアウエハの端面と鋭角を形成する方法。
  8. 前記半導体ウエハは、半導体基板と前記半導体基板の中に延伸するシリコン貫通ビアを含み、前記方法は、
    前記半導体基板の一面側にバンプ下地金属を形成し、前記シリコン貫通ビアに電気的に接続するステップ、及び
    前記バンプ下地金属の形成ステップ後、前記キャリアウエハを前記半導体ウエハから取り外すステップを更に含む請求項７に記載の方法。
  9. 前記半導体ウエハは、前記半導体ウエハの端から前記半導体ウエハの中に延びる第１ノッチを含み、前記キャリアウエハは、第２ノッチを含み、前記キャリアウエハを設置するステップは、前記第１ノッチの少なくとも一部と重なるように前記第２ノッチを位置合わせするステップを含む請求項７に記載の方法。
  10. 集積回路構造を形成する方法であって、前記方法は、
    半導体ウエハを提供するステップ、及び
    前記半導体ウエハの上に、キャリアウエハを設置するステップを含み、前記キャリアウエハは、1x108 Ohm-cmより低い抵抗率を有する方法。
  11. 前記半導体ウエハに面した側の前記キャリアウエハの全ての角は９０度角のシャープな輪郭を有する請求項１０に記載の方法。
  12. 前記半導体ウエハは、前記半導体ウエハの端から前記半導体ウエハの中に延びる第１ノッチを含み、前記キャリアウエハは、第２ノッチを含み、前記キャリアウエハを設置するステップは、前記第１ノッチの少なくとも一部と重なるように前記第２ノッチを位置合わせするステップを含む請求項１０に記載の方法。
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