JP2010118373A - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
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Abstract
【解決手段】接着層2を有する支持体1、また接着層2より強い接着力の接着層8を有する支持体7を準備しておく。接着層2とチップ3、5に設けられている端子4、6の端子面4a、6aとを接し、チップ3、5に、接着層2を介して支持体1を接着する。次いで、支持体1とチップ3、5を挟むように、チップ3、5に、接着層8を介して支持体7を接着する。その後、チップ3、5から支持体1を剥離し、支持体7上でチップ3、5を樹脂で封止する。
【選択図】図2
Description
本実施の形態におけるチップ(電子部品)を封止する半導体装置の製造技術について図面を参照して説明する。図1〜図8は製造工程中の半導体装置を模式的に示す断面図である。
本実施の形態におけるチップ(電子部品)を封止する半導体装置の製造技術について図面を参照して説明する。図9〜図16は製造工程中の半導体装置を模式的に示す断面図である。
前記実施の形態1、2では、支持体7、27を、半導体装置の基板に適用した場合について説明した。この支持体7、27上に形成した封止樹脂9、29の硬化収縮、膨張によりパッケージに反りが発生した場合、平坦な配線層11a、31aの形成は著しく困難となってしまうことが考えられる。パッケージの反りの発生は、構造の非対称が主要因である。そこで、本実施の形態では、半導体装置の基板同士を背面で仮接着した場合について図面を参照して説明する。図17、図18は本実施の形態における製造工程中の半導体装置を模式的に示す断面図である。
2 接着層
2a 仮固定面
3 チップ
4 端子
4a 端子面
5 チップ
6 端子
6a 端子面
7 支持体
8 接着層
9 封止樹脂
9a 配線面
10 貫通穴
11a、11b、11c 配線層
12a、12b 絶縁層
13 ソルダレジスト
21 支持体
21a 仮固定面
22 接着層
23 領域
27 支持体
28 接着層
29 封止樹脂
29a 配線面
30 貫通穴
31a、31b、31c 配線層
32a、32b 絶縁層
33 ソルダレジスト
101 支持体
102 接着層
102a 仮固定面
103 封止樹脂
103a 配線面
104 配線層
105 ソルダレジスト
Claims (8)
- 平坦面を有する第1支持体の前記平坦面上に第1接着層を介してチップを、前記チップの端子面を前記平坦面側に向けて接着する工程、
前記チップ上に第2接着層を介して第2支持体を接着する工程、
前記チップから前記第1支持体を剥離して前記チップの端子面を露出する工程、
前記第2支持体上に前記チップの端子面を露出した絶縁層を形成する工程、
を含むことを特徴とする半導体装置の製造方法。 - 前記第2接着層は前記第1接着層より強い接着力であることを特徴とする請求項1記載の半導体装置の製造方法。
- 前記絶縁層上に多層配線を形成する工程、
を含むことを特徴とする請求項1または2記載の半導体装置の製造方法。 - 前記チップは複数であることを特徴とする請求項1、2または3記載の半導体装置の製造方法。
- 平坦面を有する第1支持体の前記平坦面上に第1接着層を介してチップを、前記チップの端子と前記第1接着層とを接しないで、前記チップの端子面を前記平坦面側に向けて接着する工程、
前記チップ上に第2接着層を介して第2支持体を接着する工程、
前記チップから前記第1支持体を剥離して前記チップの端子面を露出する工程、
前記第2支持体上に前記チップの端子面を露出した絶縁層を形成する工程、
を含むことを特徴とする半導体装置の製造方法。 - 前記第2接着層は前記第1接着層より強い接着力であることを特徴とする請求項5記載の半導体装置の製造方法。
- 前記絶縁層上に多層配線を形成する工程、
を含むことを特徴とする請求項5または6記載の半導体装置の製造方法。 - 前記チップは複数であることを特徴とする請求項5、6または7記載の半導体装置の製造方法。
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