JP2010021239A - 半導体装置の製造方法及び半導体装置 - Google Patents
半導体装置の製造方法及び半導体装置 Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 30
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 14
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- 239000004020 conductor Substances 0.000 claims abstract description 12
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- 239000002184 metal Substances 0.000 claims description 31
- 238000005530 etching Methods 0.000 claims description 11
- 238000000059 patterning Methods 0.000 claims 2
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- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 4
- 229920005591 polysilicon Polymers 0.000 description 4
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- H01—ELECTRIC ELEMENTS
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- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
- H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66545—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
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- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/495—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a simple metal, e.g. W, Mo
- H01L29/4958—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a simple metal, e.g. W, Mo with a multiple layer structure
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- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4966—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2
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- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
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- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4966—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2
- H01L29/4975—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2 being a silicide layer, e.g. TiSi2
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/665—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using self aligned silicidation, i.e. salicide
Abstract
【解決手段】本発明の半導体装置の製造方法は、半導体基板1上にゲート絶縁膜2、第1のダミーゲート部3及び第2のダミーゲート部4を順に積層して形成する工程と、それらをパターン加工するとともに、第1のダミーゲート部3をゲート長方向Xで第2のダミーゲート部4よりも後退させることにより、ノッチ部6を形成する工程と、ゲート絶縁膜2、第1のダミーゲート部3及び第2のダミーゲート部4の側方に絶縁材料からなる側壁7を形成し、かつ当該絶縁材料でノッチ部6を埋め込む工程と、第1,第2のダミーゲート部3,4を除去して、当該除去部分の底部にゲート絶縁膜2及びノッチ部6を残す工程と、除去部分を導電材料で埋め込むことによりゲート電極を形成する工程とを有する。
【選択図】図2
Description
Claims (7)
- 半導体基板上にゲート絶縁膜、第1のダミーゲート部及び第2のダミーゲート部を順に積層して形成する工程と、
前記ゲート絶縁膜、前記第1のダミーゲート部及び前記第2のダミーゲート部を予め設定されたパターンに加工するとともに、前記第1のダミーゲート部をゲート長方向で前記第2のダミーゲート部よりも後退させることにより、ノッチ部を形成する工程と、
前記ゲート絶縁膜、前記第1のダミーゲート部及び前記第2のダミーゲート部の側方に絶縁材料からなる側壁を形成し、かつ当該絶縁材料で前記ノッチ部を埋め込む工程と、
前記第1のダミーゲート部及び前記第2のダミーゲート部を除去して、当該除去部分の底部に前記ゲート絶縁膜及び前記ノッチ部を残す工程と、
前記除去部分を導電材料で埋め込むことにより、当該導電材料からなるゲート電極を形成する工程と
を有する半導体装置の製造方法。 - 前記ゲート絶縁膜を高誘電率ゲート絶縁膜として形成するとともに、
前記ゲート電極を金属ゲート電極として形成する
請求項1記載の半導体装置の製造方法。 - 前記第1のダミーゲート部及び前記第2のダミーゲート部をパターン加工した後に、前記第1のダミーゲート部を選択的にエッチングすることにより、前記ノッチ部を形成する
請求項1又は2記載の半導体装置の製造方法。 - 前記第1のダミーゲート部及び前記第2のダミーゲート部をパターン加工する場合に、前記第2のダミーゲート部を異方性エッチングした後、前記第1のダミーゲート部を等方性エッチングすることにより、前記ノッチ部を形成する
請求項1又は2記載の半導体装置の製造方法。 - 半導体基板上に形成されたゲート絶縁膜と、
前記ゲート絶縁膜上に形成されたゲート電極と、
前記ゲート電極の側方に当該ゲート電極に接する状態で形成された側壁とを備え、
前記ゲート絶縁膜は、ゲート長方向で前記ゲート電極を挟むように向かい合う前記側壁の間隔と同じ幅で前記ゲート電極の下に形成され、
前記ゲート電極は、当該ゲート電極の下端部に前記ゲート長方向で前記側壁の間隔よりも幅狭とされた絞り部を有し、当該絞り部と同じ幅で前記ゲート絶縁膜に接している
半導体装置。 - 前記ゲート絶縁膜上で前記ゲート電極の絞り部を除く部分に、絶縁材料で埋め込まれた状態のノッチ部を有する
請求項5記載の半導体装置。 - 前記ゲート絶縁膜は、高誘電率ゲート絶縁膜からなり、
前記ゲート電極は、金属ゲート電極からなる
請求項5又は6記載の半導体装置。
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KR101188806B1 (ko) | 2010-07-14 | 2012-10-12 | 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 | N/p 금속 게이트에 대한 상호연결 구조물 |
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US8846474B2 (en) | 2012-08-20 | 2014-09-30 | Tokyo Electron Limited | Dual workfunction semiconductor devices and methods for forming thereof |
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US9281372B2 (en) * | 2014-07-17 | 2016-03-08 | Taiwan Semiconductor Manufacturing Company Ltd. | Metal gate structure and manufacturing method thereof |
US9558950B1 (en) * | 2015-08-19 | 2017-01-31 | International Business Machines Corporation | Overhang hardmask to prevent parasitic epitaxial nodules at gate end during source drain epitaxy |
US9722038B2 (en) * | 2015-09-11 | 2017-08-01 | International Business Machines Corporation | Metal cap protection layer for gate and contact metallization |
US11289583B2 (en) | 2018-09-28 | 2022-03-29 | Taiwan Semiconductor Manufacturing Co., Ltd. | High aspect ratio gate structure formation |
CN112447828B (zh) * | 2019-08-27 | 2024-03-01 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体结构及其形成方法 |
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JP2002110989A (ja) * | 2000-09-27 | 2002-04-12 | Japan Science & Technology Corp | 半導体集積回路装置およびその製造方法 |
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US8384166B2 (en) | 2013-02-26 |
JP4548521B2 (ja) | 2010-09-22 |
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