JP2009543104A - アクティブマトリックス有機電気−光学装置 - Google Patents
アクティブマトリックス有機電気−光学装置 Download PDFInfo
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- G09G3/3275—Details of drivers for data electrodes
- G09G3/3283—Details of drivers for data electrodes in which the data driver supplies a variable data current for setting the current through, or the voltage across, the light-emitting elements
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Abstract
【選択図】図1b
Description
OLEDを使用して製造されるディスプレイは、LCD及び他のフラットパネル技術に対して多くの利点を提供する。それは、明るく、カラフルであり、立ち上がりが早く(LCDに比較して)、広い視野角を提供し、多様な基板上に安く製造することができるというものである。有機(有機金属を含む)LEDは、導入される材料に応じた色の範囲において、ポリマー、低分子化合物及びデンドリマーを含む材料を使用して製造することができる。ポリマー系有機LEDの例は、WO90/13148、WO95/06400及びWO99/48160に記載されており、デンドリマー系材料の例は、WO99/21935及びWO02/067343に記載されており、いわゆる低分子系装置の例は、US4,539,507に記載されている。
図1cには、上面発光型アクティブマトリックスOLEDディスプレイの断面図100が示されている(例示のために、簡略化されている)。
図3aは、電圧制御されたアクティブマトリックス画素回路150の例を示す。回路150がディスプレイの各画素に供給され、接地152、Vss154、行選択124及び列データ126バスバーが画素を相互接続して供給される。したがって、各画素は電力及び設置接続を有し、各行の画素は共通の行選択ライン124を有し、各列の画素は共通の列データラインを有する。
12 駆動回路
14 OLED画素
16 追加の回路
100 上面発光型アクティブマトリックスOLEDディスプレイ
102 プラスチック基板
104 絶縁層
106 アノード層
108a 正孔輸送層
108b 電子発光層
110 カソード
112 バンク
120 蓄積容量
122 制御トランジスタ
122a トランジスタ
124 行選択ライン
152 接地ライン
154 電力ライン
158 駆動トランジスタ
159 ゲートノード
160 トランジスタ
162 フォトダイオード
164 スイッチングトランジスタ
166 参照電流シンク
400a 群バッファー
400b 群バッファー
400c 群バッファー
402 ディスプレイデータライン
404 一組の画素駆動回路
Claims (27)
- アクティブマトリックス有機電気−光装置であって、前記装置は、複数の画素を有し、前記各画素のための画素インターフェース回路及び前記画素インターフェース回路を覆う有機材料を有する基板から構成され、前記装置の少なくとも一部の領域上では、前記画素の少なくとも一つの下の領域が前記画素インターフェース回路によって不完全に占められるように前記画素インターフェース回路が前記画素に関してずれて配列されており、前記装置の追加の回路が前記画素インターフェース回路によって不完全に占められる前記領域において形成される装置。
- 前記装置の少なくとも一部の領域上では、一対の隣接する画素の下の領域が前記画素インターフェース回路によって不完全に占められるように前記画素インターフェース回路が前記画素に関してずれて配列されている請求項1に記載のアクティブマトリックス有機電気−光装置。
- 前記追加の回路は少なくとも1つの半導体装置を含む請求項1又は2に記載のアクティブマトリックス有機電気−光装置。
- 前記領域は前記ディスプレイの領域を横断して規則的な間隔で供給されている請求項1ないし3のいずれかに記載のアクティブマトリックス有機電気−光装置。
- 前記追加の回路は、前記画素の一群に対してインターフェースを提供する共有されたインターフェース回路から構成される請求項1ないし4のいずれかに記載のアクティブマトリックス有機電気−光装置。
- 前記共有されたインターフェース回路は信号生成回路から構成される請求項5に記載のアクティブマトリックス有機電気−光装置。
- 前記共有されたインターフェース回路は非増幅電流ミラーを含む請求項5又は6に記載のアクティブマトリックス有機電気−光装置。
- 前記追加の回路は、前記追加の回路が連結される画素の一群のためにセレクト又はイネーブル駆動するセレクト又はイネーブル回路を含む請求項1ないし7のいずれかに記載のアクティブマトリックス有機電気−光装置。
- 前記追加の回路は記憶素子を含む請求項1ないし8のいずれかに記載のアクティブマトリックス有機電気−光装置。
- 前記追加の回路は光又は接触センサーから構成される請求項1ないし9のいずれかに記載のアクティブマトリックス有機電気−光装置。
- 前記装置は接触感知ディスプレイであるアクティブマトリックス有機電気−光装置。
- 前記装置は上面発光型有機アクティブマトリックスOLED構造から構成され、前記画素インターフェース回路は画素駆動回路から構成され、前記有機材料は前記画素駆動回路上のOLED材料から構成され、前記構造は上面から光を放射するように構成されている請求項1ないし11のいずれかに記載のアクティブマトリックス有機電気−光装置。
- 画素ディスプレイを駆動する方法であって、前記ディスプレイは画素のディスプレイデータを書き込むためのデータラインをそれぞれ有する複数のアクティブマトリックス画素を有し、前記データラインは前記ディスプレイの複数の画素を駆動するために共有され、前記共有されたデータラインによって駆動される画素は一群に割り当てられ、各群は、複数の画素を含み、前記共有されたデータラインから画素駆動データを受信し、前記画素駆動データに応答する前記群の選択された画素を駆動するために、前記共有されたデータライン及び前記群の各画素に接続されるそれぞれの群データ駆動回路を有し、前記方法は、
前記各群の第一の画素を順番に駆動する工程、及び
次いで前記各群の第二の画素を順番に駆動する工程を含む方法。 - 前記共有されたデータラインによって駆動されるほぼ全部の前記画素を駆動するために、前記駆動を3回かつ各前記群の各次の画素を順番に繰り返し駆動する工程を更に含む請求項13に記載の方法。
- 前記共有されたデータラインは、前記ディスプレイの行又は列データラインから構成される請求項13又は14に記載の方法。
- 前記駆動は、前記群のそれぞれの群データ駆動回路を使用して、前記群の駆動される画素のための駆動信号を蓄積する工程から構成される請求項13、14又は15に記載の方法。
- 前記画素の駆動は、前記群データ駆動回路を使用して前記共有されたデータライン上の駆動信号をバッファーする工程、及び前記バッファーされた駆動信号で前記画素を駆動する工程を含む請求項13ないし16のいずれかに記載の方法。
- 前記駆動信号は電流駆動信号から構成され、各前記画素は連結された電流駆動回路を有し、前記バッファーする工程は減少した電流駆動信号を前記画素電流駆動回路に供給するために前記電流駆動信号のレベルを減少させる工程を含む請求項17に記載の方法。
- 前記バッファーする工程は、前記電流駆動信号の前記レベルを非増幅させるために電流ミラー回路を使用する工程を含む請求項18に記載の方法。
- 前記群データ駆動回路を前記群データ駆動回路によって駆動される群中の画素に隣接させて配置させる工程をさらに含む請求項13ないし19のいずれかに記載の方法。
- アクティブマトリックス画素はアクティブマトリックス駆動回路を有し、前記群の画素のための前記アクティブマトリックス駆動回路は、前記群データ駆動回路が前記群の画素のための前記アクティブマトリックス回路に沿った前記ディスプレイ中に含まれることを可能にするように配置される請求項13ないし20のいずれかに記載の方法。
- 前記ディスプレイはフラットパネルディスプレイから構成される請求項13ないし21のいずれかに記載の方法。
- 前記ディスプレイは上面発光型アクティブマトリックスOLEDから構成される請求項13ないし22のいずれかに記載の方法。
- 画素ディスプレイであって、前記ディスプレイはディスプレイデータを前記画素に書き込むためのデータラインを有する複数のアクティブマトリックス画素を有し、前記データラインは前記ディスプレイの複数の画素を駆動するために共有され、前記共有されたデータラインにより駆動される画素は群に割り当てられ、各群は複数の画素から構成され、前記共有されたデータラインから画素駆動データを受信し、前記画素駆動データに応答する前記群の選択された画素を駆動するために、前記データライン及び前記群の各画素に接続されるそれぞれの群データ駆動回路を有する画素ディスプレイ。
- 前記ディスプレイはフラットパネルディスプレイから構成される請求項24に記載のディスプレイ。
- 前記ディスプレイは上面発光型アクティブマトリックス電子発光ディスプレイから構成される請求項24又は25に記載のディスプレイ。
- 前記アクティブマトリックス画素はアクティブマトリックス駆動回路を有し、前記群の画素のための前記アクティブマトリックス駆動回路は、前記群データ駆動回路が前記群の画素のための前記アクティブマトリックスに沿った前記ディスプレイ中に含まれることを可能にするように配置される請求項24、25又は26に記載のディスプレイ。
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GB0612973A GB2439584A (en) | 2006-06-30 | 2006-06-30 | Active Matrix Organic Electro-Optic Devices |
GB0612973.8 | 2006-06-30 | ||
PCT/GB2007/002435 WO2008001106A1 (en) | 2006-06-30 | 2007-06-28 | Active matrix organic electro-optic devices |
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JP2009543104A5 JP2009543104A5 (ja) | 2011-05-26 |
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US (1) | US20090201230A1 (ja) |
EP (1) | EP2047452A1 (ja) |
JP (1) | JP5372746B2 (ja) |
KR (1) | KR101473496B1 (ja) |
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KR101473496B1 (ko) | 2014-12-16 |
US20090201230A1 (en) | 2009-08-13 |
GB0612973D0 (en) | 2006-08-09 |
GB2439584A (en) | 2008-01-02 |
JP5372746B2 (ja) | 2013-12-18 |
EP2047452A1 (en) | 2009-04-15 |
KR20090033425A (ko) | 2009-04-03 |
CN101501749B (zh) | 2012-05-30 |
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WO2008001106A1 (en) | 2008-01-03 |
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