JP2009534829A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2009534829A5 JP2009534829A5 JP2009506026A JP2009506026A JP2009534829A5 JP 2009534829 A5 JP2009534829 A5 JP 2009534829A5 JP 2009506026 A JP2009506026 A JP 2009506026A JP 2009506026 A JP2009506026 A JP 2009506026A JP 2009534829 A5 JP2009534829 A5 JP 2009534829A5
- Authority
- JP
- Japan
- Prior art keywords
- silicon
- intermediate tap
- integrated circuit
- silicided
- platform
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP06300393 | 2006-04-21 | ||
| EP06300393.3 | 2006-04-21 | ||
| PCT/IB2007/051409 WO2007122561A2 (en) | 2006-04-21 | 2007-04-19 | Adjustible resistor for use in a resistive divider circuit and method for manufacturing |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2009534829A JP2009534829A (ja) | 2009-09-24 |
| JP2009534829A5 true JP2009534829A5 (https=) | 2012-06-14 |
| JP5011376B2 JP5011376B2 (ja) | 2012-08-29 |
Family
ID=38477145
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2009506026A Expired - Fee Related JP5011376B2 (ja) | 2006-04-21 | 2007-04-19 | 抵抗分割回路を具える集積回路およびその製造方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US8026556B2 (https=) |
| EP (1) | EP2022082A2 (https=) |
| JP (1) | JP5011376B2 (https=) |
| CN (1) | CN101427346B (https=) |
| WO (1) | WO2007122561A2 (https=) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101427346B (zh) * | 2006-04-21 | 2010-12-15 | Nxp股份有限公司 | 电阻分压器电路中使用的可调电阻器及其制造方法 |
| WO2013057585A2 (en) * | 2011-10-20 | 2013-04-25 | King Abdullah University Of Science And Technology | A reactance-less oscillator |
Family Cites Families (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| IT1115654B (it) * | 1977-05-04 | 1986-02-03 | Ates Componenti Elettron | Partitore di tensione diffuso per circuito integrato monolitico |
| US4219797A (en) * | 1979-03-19 | 1980-08-26 | National Semiconductor Corporation | Integrated circuit resistance ladder having curvilinear connecting segments |
| US5247262A (en) | 1992-03-13 | 1993-09-21 | The United States Of America As Represented By The Secretary Of Commerce | Linewidth micro-bridge test structure |
| JPH05284031A (ja) * | 1992-03-31 | 1993-10-29 | Hitachi Ltd | 半導体装置 |
| KR950034754A (ko) | 1994-05-06 | 1995-12-28 | 윌리엄 이. 힐러 | 폴리실리콘 저항을 형성하는 방법 및 이 방법으로부터 제조된 저항 |
| US6087189A (en) | 1997-04-24 | 2000-07-11 | National Science Council | Test structure for monitoring overetching of silicide during contact opening |
| JP2001051661A (ja) | 1999-08-16 | 2001-02-23 | Semiconductor Energy Lab Co Ltd | D/a変換回路および半導体装置 |
| US6369736B2 (en) | 1999-12-20 | 2002-04-09 | Texas Instruments Incorporated | Data converter with vertical resistor meander |
| JP2003152079A (ja) * | 2001-11-14 | 2003-05-23 | Sharp Corp | 基準電圧発生機構、基準電圧発生機構の設計方法、及び基準電圧発生機構の設計装置 |
| US6730554B1 (en) | 2002-11-21 | 2004-05-04 | Texas Instruments Incorporated | Multi-layer silicide block process |
| US6879131B2 (en) * | 2003-04-03 | 2005-04-12 | Cirrus Logic, Inc. | Minimizing end boundary resistance in a programmable resistor of an integrated circuit |
| US20040235258A1 (en) | 2003-05-19 | 2004-11-25 | Wu David Donggang | Method of forming resistive structures |
| US20070063308A1 (en) | 2003-10-29 | 2007-03-22 | Koninklijke Philips Electronics N.V. | Integrated circuit with partly silicidated silicon layer |
| US7135376B2 (en) | 2003-12-24 | 2006-11-14 | Oki Electric Industry Co., Ltd. | Resistance dividing circuit and manufacturing method thereof |
| JP3955298B2 (ja) | 2003-12-25 | 2007-08-08 | 松下電器産業株式会社 | 抵抗分圧回路、およびこの抵抗分圧回路を使用した液晶駆動装置ならびに液晶表示装置 |
| JP3983751B2 (ja) * | 2004-06-08 | 2007-09-26 | 株式会社リコー | 半導体装置及びその製造方法 |
| US7790617B2 (en) * | 2005-11-12 | 2010-09-07 | Chartered Semiconductor Manufacturing, Ltd. | Formation of metal silicide layer over copper interconnect for reliability enhancement |
| CN101427346B (zh) * | 2006-04-21 | 2010-12-15 | Nxp股份有限公司 | 电阻分压器电路中使用的可调电阻器及其制造方法 |
| US8274722B2 (en) * | 2008-01-15 | 2012-09-25 | Moidu Abdul Jaleel K | Counter-balanced MEMS mirror with hidden hinge |
-
2007
- 2007-04-19 CN CN2007800142706A patent/CN101427346B/zh not_active Expired - Fee Related
- 2007-04-19 EP EP07735545A patent/EP2022082A2/en not_active Withdrawn
- 2007-04-19 US US12/297,281 patent/US8026556B2/en not_active Expired - Fee Related
- 2007-04-19 JP JP2009506026A patent/JP5011376B2/ja not_active Expired - Fee Related
- 2007-04-19 WO PCT/IB2007/051409 patent/WO2007122561A2/en not_active Ceased
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TWI335067B (en) | Method and structure to create multiple device widths in finfet technology in both bulk and soi | |
| TWI619204B (zh) | 積體電路中採用之自對準局部互連線用之方法、結構與設計 | |
| TWI527169B (zh) | 半導體裝置及其製造方法以及鰭式場效電晶體 | |
| JP2007502530A5 (https=) | ||
| JP2005072554A5 (https=) | ||
| WO2006113609A3 (en) | Maskless multiple sheet polysilicon resistor | |
| JP2006517350A5 (https=) | ||
| JP2006515956A5 (https=) | ||
| JP2008226963A (ja) | 半導体装置及びその製造方法 | |
| TW201626521A (zh) | 半導體元件結構 | |
| JP2009534829A5 (https=) | ||
| US9799644B2 (en) | FinFET and transistors with resistors and protection against electrostatic discharge (ESD) | |
| JP2006108169A5 (https=) | ||
| JP2006106110A5 (https=) | ||
| JP2008211144A5 (https=) | ||
| JP2006049581A5 (https=) | ||
| JP2007503727A (ja) | 抵抗構造を形成するための方法 | |
| JP2011003674A5 (ja) | 半導体装置の製造方法 | |
| JP5959254B2 (ja) | 半導体装置 | |
| JP2011003675A5 (ja) | 半導体装置の製造方法 | |
| CN102157450B (zh) | 半导体装置及其制造方法 | |
| JP2016076692A (ja) | 半導体装置およびその製造方法 | |
| JP2021531667A5 (https=) | ||
| JP3715886B2 (ja) | 熱型赤外線固体撮像装置の製造方法及びその構造 | |
| JP2008098225A5 (https=) |