CN101427346B - 电阻分压器电路中使用的可调电阻器及其制造方法 - Google Patents

电阻分压器电路中使用的可调电阻器及其制造方法 Download PDF

Info

Publication number
CN101427346B
CN101427346B CN2007800142706A CN200780014270A CN101427346B CN 101427346 B CN101427346 B CN 101427346B CN 2007800142706 A CN2007800142706 A CN 2007800142706A CN 200780014270 A CN200780014270 A CN 200780014270A CN 101427346 B CN101427346 B CN 101427346B
Authority
CN
China
Prior art keywords
silicon
taps
divider circuit
platform
silicided
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2007800142706A
Other languages
English (en)
Chinese (zh)
Other versions
CN101427346A (zh
Inventor
安迪·C·尼古瓦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Publication of CN101427346A publication Critical patent/CN101427346A/zh
Application granted granted Critical
Publication of CN101427346B publication Critical patent/CN101427346B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/201—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits
    • H10D84/204—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors
    • H10D84/209—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors of only resistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/40—Resistors
    • H10D1/47—Resistors having no potential barriers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/903—FET configuration adapted for use as static memory cell
    • Y10S257/904—FET configuration adapted for use as static memory cell with passive components,, e.g. polysilicon resistors

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Liquid Crystal (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
CN2007800142706A 2006-04-21 2007-04-19 电阻分压器电路中使用的可调电阻器及其制造方法 Expired - Fee Related CN101427346B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP06300393 2006-04-21
EP06300393.3 2006-04-21
PCT/IB2007/051409 WO2007122561A2 (en) 2006-04-21 2007-04-19 Adjustible resistor for use in a resistive divider circuit and method for manufacturing

Publications (2)

Publication Number Publication Date
CN101427346A CN101427346A (zh) 2009-05-06
CN101427346B true CN101427346B (zh) 2010-12-15

Family

ID=38477145

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2007800142706A Expired - Fee Related CN101427346B (zh) 2006-04-21 2007-04-19 电阻分压器电路中使用的可调电阻器及其制造方法

Country Status (5)

Country Link
US (1) US8026556B2 (https=)
EP (1) EP2022082A2 (https=)
JP (1) JP5011376B2 (https=)
CN (1) CN101427346B (https=)
WO (1) WO2007122561A2 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101427346B (zh) * 2006-04-21 2010-12-15 Nxp股份有限公司 电阻分压器电路中使用的可调电阻器及其制造方法
WO2013057585A2 (en) * 2011-10-20 2013-04-25 King Abdullah University Of Science And Technology A reactance-less oscillator

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4181878A (en) * 1977-05-04 1980-01-01 Sgs-Ates Component Elettronici S.P.A. Integrated-circuit chip with voltage divider
US4219797A (en) * 1979-03-19 1980-08-26 National Semiconductor Corporation Integrated circuit resistance ladder having curvilinear connecting segments
US5247262A (en) * 1992-03-13 1993-09-21 The United States Of America As Represented By The Secretary Of Commerce Linewidth micro-bridge test structure
US6087189A (en) * 1997-04-24 2000-07-11 National Science Council Test structure for monitoring overetching of silicide during contact opening

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05284031A (ja) * 1992-03-31 1993-10-29 Hitachi Ltd 半導体装置
KR950034754A (ko) 1994-05-06 1995-12-28 윌리엄 이. 힐러 폴리실리콘 저항을 형성하는 방법 및 이 방법으로부터 제조된 저항
JP2001051661A (ja) 1999-08-16 2001-02-23 Semiconductor Energy Lab Co Ltd Ｄ／ａ変換回路および半導体装置
US6369736B2 (en) 1999-12-20 2002-04-09 Texas Instruments Incorporated Data converter with vertical resistor meander
JP2003152079A (ja) * 2001-11-14 2003-05-23 Sharp Corp 基準電圧発生機構、基準電圧発生機構の設計方法、及び基準電圧発生機構の設計装置
US6730554B1 (en) 2002-11-21 2004-05-04 Texas Instruments Incorporated Multi-layer silicide block process
US6879131B2 (en) * 2003-04-03 2005-04-12 Cirrus Logic, Inc. Minimizing end boundary resistance in a programmable resistor of an integrated circuit
US20040235258A1 (en) 2003-05-19 2004-11-25 Wu David Donggang Method of forming resistive structures
US20070063308A1 (en) 2003-10-29 2007-03-22 Koninklijke Philips Electronics N.V. Integrated circuit with partly silicidated silicon layer
US7135376B2 (en) 2003-12-24 2006-11-14 Oki Electric Industry Co., Ltd. Resistance dividing circuit and manufacturing method thereof
JP3955298B2 (ja) 2003-12-25 2007-08-08 松下電器産業株式会社 抵抗分圧回路、およびこの抵抗分圧回路を使用した液晶駆動装置ならびに液晶表示装置
JP3983751B2 (ja) * 2004-06-08 2007-09-26 株式会社リコー 半導体装置及びその製造方法
US7790617B2 (en) * 2005-11-12 2010-09-07 Chartered Semiconductor Manufacturing, Ltd. Formation of metal silicide layer over copper interconnect for reliability enhancement
CN101427346B (zh) * 2006-04-21 2010-12-15 Nxp股份有限公司 电阻分压器电路中使用的可调电阻器及其制造方法
US8274722B2 (en) * 2008-01-15 2012-09-25 Moidu Abdul Jaleel K Counter-balanced MEMS mirror with hidden hinge

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4181878A (en) * 1977-05-04 1980-01-01 Sgs-Ates Component Elettronici S.P.A. Integrated-circuit chip with voltage divider
US4219797A (en) * 1979-03-19 1980-08-26 National Semiconductor Corporation Integrated circuit resistance ladder having curvilinear connecting segments
US5247262A (en) * 1992-03-13 1993-09-21 The United States Of America As Represented By The Secretary Of Commerce Linewidth micro-bridge test structure
US6087189A (en) * 1997-04-24 2000-07-11 National Science Council Test structure for monitoring overetching of silicide during contact opening

Also Published As

Publication number Publication date
JP5011376B2 (ja) 2012-08-29
EP2022082A2 (en) 2009-02-11
CN101427346A (zh) 2009-05-06
US20090174033A1 (en) 2009-07-09
JP2009534829A (ja) 2009-09-24
WO2007122561A3 (en) 2008-01-10
US8026556B2 (en) 2011-09-27
WO2007122561A2 (en) 2007-11-01

Similar Documents

Publication Publication Date Title
US7126157B2 (en) Active matrix substrate, method of making the substrate, and display device
US8502275B2 (en) Thin film transistor array panel for a liquid crystal display
US7599014B2 (en) Method for fabricating pixel array substrate
CN103915448B (zh) 薄膜晶体管阵列面板
KR100968339B1 (ko) 액정 표시 장치 및 그 제조 방법
US7465612B2 (en) Fabricating method for thin film transistor substrate and thin film transistor substrate using the same
US20090303423A1 (en) Liquid crystal display and a method for manufacturing the same
TWI636299B (zh) 顯示器之像素結構
JP4699395B2 (ja) 液晶ディスプレイの製造方法
CN108254983B (zh) 显示基板及其制备方法、触控显示装置
CN101427346B (zh) 电阻分压器电路中使用的可调电阻器及其制造方法
US20190271887A1 (en) Display substrate, display panel, and method for preparing the same
JP3982730B2 (ja) 薄膜トランジスタアレイ基板の製造方法
KR100806892B1 (ko) 박막 트랜지스터 기판
US20160190342A1 (en) Active element and fabricating method thereof
KR100514764B1 (ko) 액정 표시 장치의 구조 및 그 액정 표시 장치 제조 방법
JP2019078799A (ja) 液晶表示装置

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20101215

Termination date: 20190419